TEXAS INSTRUMENTS PCM3002, PCM3003 Technical data
Lch In
Rch In
Analog Front-End
Delta-Sigma
Modulator
Digital
Decimation
Filter
Serial Interface
and
Mode Control
Digital Out
Mode Control
System Clock
B0006-01
Digital In
Digital
Interpolation
Filter
Lch Out
Rch Out
Low-Pass Filter
and
Output Buffer
Multilevel
Delta-Sigma
Modulator
*
* PCM3002 Only
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
16/20-BIT SINGLE-ENDED ANALOG INPUT/OUTPUT STEREO AUDIO CODECS
PCM3002
PCM3003
FEATURES
• Monolithic 20-Bit ∆ Σ ADC and DAC
• 16/20-Bit Input/Output Data
• Software Control: PCM3002
• Hardware Control: PCM3003
• Stereo ADC:
– Single-Ended Voltage Input
– Antialiasing Filter
– 64 × Oversampling
– High Performance
• THD+N: –86 dB
• SNR: 90 dB
• Dynamic Range: 90 dB
• Stereo DAC:
– Single-Ended Voltage Output
– Analog Low-Pass Filter
– 64 × Oversampling
– High Performance
• THD+N: –86 dB
• SNR: 94 dB
• Dynamic Range: 94 dB
• Special Features (PCM3002, PCM3003)
– Digital De-Emphasis: 32 kHz, 44.1 kHz,
48 kHz
– Power Down: ADC/DAC Independent
• Special Features (PCM3002)
– Digital Attenuation (256 Steps)
– Soft Mute
– Digital Loopback
– Four Alternative Audio Data Formats
• Sampling Rate: 4 kHz to 48 kHz
• Single 3-V Power Supply
• Small Package: SSOP-24
APPLICATIONS
• DVC Applications
• DSC Applications
• Portable/Mobile Audio Applications
DESCRIPTION
The PCM3002 and PCM3003 are low-cost,
single-chip stereo audio codecs (analog-to-digital and
digital-to-analog converters) with single-ended analog
voltage input and output.
The ADCs and DACs employ delta-sigma modulation
with 64-times oversampling. The ADCs include a
digital decimation filter, and the DACs include an
8-times oversampling digital interpolation filter. The
DACs also include digital attenuation, de-emphasis,
infinite zero detection, and soft mute to form a
complete subsystem. The PCM3002 and PCM3003
operate with left-justified (ADC) and right-justified
(DAC) formats, while the PCM3002 also supports
other formats, including the I2S data format.
The PCM3002 and PCM3003 provide a power-down
mode that operates on the ADCs and DACs independently.
The PCM3002 and PCM3003 are fabricated using a
highly advanced CMOS process, and are available in
a 24-pin SSOP package. The PCM3002 and
PCM3003 are suitable for a wide variety of
cost-sensitive consumer applications where good performance is required.
The PCM3002 programmable functions are controlled
by software. The PCM3003 functions, which are
controlled by hardware, include de-emphasis,
power-down, and audio data format selections.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
System Two, Audio Precision are trademarks of Audio Precision, Inc.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2004, Texas Instruments Incorporated
www.ti.com
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ELECTRICAL CHARACTERISTICS
All specifications at TA= 25 ° C, V
PARAMETER CONDITIONS
DIGITAL INPUT/OUTPUT
Input Logic
(1) (2) (3)
V
IH
(1) (2) (3)
V
IL
(2)
I
IN
(1) (3)
I
IN
Output Logic
(4)
V
OH
(4)
V
OL
(5)
V
OL
CLOCK FREQUENCY
f
s
ADC CHARACTERISTICS
Resolution 20 Bits
DC Accuracy
Dynamic Performance
(1) Pins 7, 8, 17 and 18: RST, ML, MD, and MC for the PCM3002; PDAD, PDDA, DEM1, and DEM0 for PCM3003 (Schmitt-trigger input
with 100-k Ω typical internal pulldown resistor)
(2) Pins 9, 10, 11, 15: SYSCLK, LRCIN, BCKIN, DIN (Schmitt-trigger input)
(3) Pin 16: 20BIT for PCM3003 (Schmitt-trigger input, 100-k Ω typical internal pulldown resistor)
(4) Pin 12: DOUT
(5) Pin 16: ZFLG for PCM3002 (open-drain output)
(6) See Application Bulletin SBAA033 for information relating to operation at lower sampling frequencies.
(7) High-pass filter for offset cancel
(8) fIN= 1 kHz, using the System Two™ audio measurement system by Audio Precision™ in rms mode with 20-kHz LPF, 400-Hz HPF used
for performance calculation.
Input logic level VDC
Input logic current µ A
Output logic level I
Sampling frequency 4
System clock frequency 384 f
Gain mismatch, channel- ± 1 ± 3 % of FSR
to-channel
Gain error ± 2 ± 5 % of FSR
Gain drift ± 20 ppm of FSR/ ° C
Bipolar zero error High-pass filter bypassed
Bipolar zero drift High-pass filter bypassed
(8)
THD+N dB
Dynamic range A-weighted 86 90 dB
Signal-to-noise ratio A-weighted 86 90 dB
Channel separation 84 88 dB
= V
DD
= 3 V, fS= 44.1 kHz, SYSCLK = 384 fS, and 16-bit data, unless otherwise noted
CC
PCM3002E/3003E
MIN TYP MAX UNITS
0.7 V
DD
0.3 V
DD
± 1
100
I
= –1 mA V
OUT
= 1 mA 0.3 VDC
OUT
I
= 1 mA 0.3
OUT
256 f
S
S
512 f
S
(7)
(7)
– 0.3
DD
(6)
44.1 48 kHz
1.024 11.2896 12.288
1.536 16.9344 18.432 MHz
2.048 22.5792 24.576
± 1.7 % of FSR
± 20 ppm of FSR/ ° C
VIN= –0.5 dB –86 –80
VIN= –60 dB –28
2
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SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA= 25 ° C, V
PARAMETER CONDITIONS
Digital Filter Performance
Pass band 0.454 f
Stop band 0.583 f
Pass-band ripple ± 0.05 dB
Stop-band attenuation –65 dB
Delay time 17.4/f
HPF frequency response –3 dB 0.019 f
Analog Input
Voltage range 0.6 V
Center voltage 0.5 V
Input impedance 30 k Ω
Antialiasing filter frequency –3 dB 150 kHz
response
DAC CHARACTERISTICS
Resolution 20 Bits
DC Accuracy
Gain mismatch, channel- ± 1 ± 3 % of FSR
to-channel
Gain error ± 1 ± 5 % of FSR
Gain drift ± 20 ppm of FSR/ ° C
Bipolar zero error ± 2.5 % of FSR
Bipolar zero drift ± 20 ppm of FSR/ ° C
Dynamic Performance
Digital Filter Performance
Analog Output
(9) f
THD+N dB
Dynamic range EIAJ, A-weighted 88 94 dB
Signal-to-noise ratio EIAJ, A-weighted 88 94 dB
Channel separation 86 91 dB
Pass band 0.445 f
Stop band 0.555 f
Pass-band ripple ± 0.17 dB
Stop-band attenuation –35 dB
Delay time 11.1/f
Voltage range 0.6 V
Center voltage 0.5 V
Load impedance AC coupling 10 k Ω
LPF frequency response f = 20 kHz –0.16 dB
= 1 kHz, using the System Two audio measurement system by Audio Precision in rms mode with 20-kHz LPF, 400-Hz HPF used
OUT
for performance calculation.
(9)
= V
DD
= 3 V, fS= 44.1 kHz, SYSCLK = 384 fS, and 16-bit data, unless otherwise noted
CC
PCM3002E/3003E
MIN TYP MAX UNITS
S
S
S
S
CC
CC
V
= 0 dB (full scale) –86 –80
OUT
V
= –60 dB –32
OUT
S
S
S
CC
CC
PCM3002
PCM3003
Hz
Hz
s
mHz
Vp-p
VDC
Hz
Hz
s
Vp-p
VDC
3
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PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA= 25 ° C, V
PARAMETER CONDITIONS
POWER SUPPLY REQUIREMENTS
VCC, V
TEMPERATURE RANGE
T
A
T
stg
θ
JA
(10) Applies for voltages between 2.4 V and 2.7 V for 0 ° C to 70 ° C and 256 fS/512 fSoperation (384 fSnot available)
(11) SYSCLK, BCKIN, and LRCIN are stopped.
Supply voltage
DD
Supply current
Power dissipation
Operation –25 85 ° C
Storage –55 125 ° C
Thermal resistance 100 ° C/W
= V
DD
= 3 V, fS= 44.1 kHz, SYSCLK = 384 fS, and 16-bit data, unless otherwise noted
CC
PCM3002E/3003E
MIN TYP MAX UNITS
–25 ° C to 85 ° C 2.7 3 3.6 VDC
0 ° C to 70 ° C
Operation, V
Power down, V
Operation, V
Power down
(10)
= V
CC
CC
(11)
3 V
= 3 V 18 24 mA
DD
= V
CC
, V
= 3 V 50 µ A
DD
= V
= 3 V 54 72 mW
DD
= V
CC
=
DD
2.4 3 3.6 VDC
150 µ W
PACKAGE/ORDERING INFORMATION
PRODUCT QUANTITY
PCM3002E 24-pin SSOP DB PCM3002E
PCM3003E 24-pin SSOP DB PCM3003E
PACKAGE PACKAGE PACKAGE ORDERING TRANSPORT
TYPE CODE MARKING NUMBER MEDIA
PCM3002E Rails 58
PCM3002E/2K Tape and reel 2000
PCM3003E Rails 58
PCM3003E/2K Tape and reel 2000
ABSOLUTE MAXIMUM RATINGS
Supply voltage VDD, VCC1, VCC2 –0.3 V to 6.5 V
Supply voltage differences ± 0.1 V
GND voltage differences ± 0.1 V
Digital input voltage –0.3 V to V
Analog input voltage –0.3 V to VCC1, VCC2 + 0.3 V, < 6.5 V
Power dissipation 300 mW
Input current (any pins except supplies) ± 10 mA
Operating temperature –25 ° C to 85 ° C
Storage temperature –55 ° C to 125 ° C
Lead temperature, soldering 260 ° C, 5 s
Package temperature (IR reflow, peak) 235 ° C
+ 0.3 V, < 6.5 V
DD
4
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1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC1
VCC1
VINR
V
REF
1
V
REF
2
V
IN
L
RST
ML
SYSCLK
LRCIN
BCKIN
DOUT
V
CC
2
AGND1
AGND2
V
COM
V
OUT
R
V
OUT
L
MC
MD
ZFLG
DIN
V
DD
DGND
PCM3002
(TOP VIEW)
P0004-02
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC1
VCC1
VINR
V
REF
1
V
REF
2
V
IN
L
PDAD
PDDA
SYSCLK
LRCIN
BCKIN
DOUT
V
CC
2
AGND1
AGND2
V
COM
V
OUT
R
V
OUT
L
DEM0
DEM1
20BIT
DIN
V
DD
DGND
PCM3003
(TOP VIEW)
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range
MIN NOM MAX UNIT
Analog supply voltage, VCC1, VCC2 2.7 3 3.6 V
Digital supply voltage, V
Analog input voltage, full scale (–0 dB) V
Digital input logic family CMOS
Digital input clock frequency
Analog output load resistance 10 k Ω
Analog output load capacitance 30 pF
Digital output load capacitance 10 pF
Operating free-air temperature, T
DD
= 3 V 1.8 Vp-p
CC
System clock 8.192 24.576 MHz
Sampling clock 32 48 kHz
A
2.7 3 3.6 V
–25 85 ° C
NAME PIN I/O DESCRIPTION
AGND1 23 – ADC analog ground
AGND2 22 – DAC analog ground
BCKIN 11 I Bit clock input
DGND 13 – Digital ground
DIN 15 I Data input
DOUT 12 O Data output
LRCIN 10 I Sample rate clock input (fs)
MC 18 I Bit clock for mode control
MD 17 I Serial data for mode control
ML 8 I Strobe pulse for mode control
(1) Schmitt-trigger input
(2) With 100-k Ω typical internal pulldown resistor
RST 7 I Reset, active LOW
SYSCLK 9 I System clock input
V
1 1, 2 – ADC analog power supply
CC
V
2 24 – DAC analog power supply
CC
V
COM
V
DD
PIN ASSIGNMENTS—PCM3002
21 – ADC/DAC common
14 – Digital power supply
(1)
(1)
(1)
(1) (2)
(1) (2)
(1) (2)
(1) (2)
(1)
5
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PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
NAME PIN I/O DESCRIPTION
VINL 6 I ADC analog input, Lch
VINR 3 I ADC analog input, Rch
V
L 19 O DAC analog output, Lch
OUT
V
R 20 O DAC analog output, Rch
OUT
V
1 4 – ADC reference 1
REF
V
2 5 – ADC reference 2
REF
ZFLG 16 O Zero flag output, active LOW
(3) Open-drain output
NAME PIN I/O DESCRIPTION
AGND1 23 – ADC analog ground
AGND2 22 – DAC analog ground
BCKIN 11 I Bit clock input
DEM0 18 I De-emphasis control 0
DEM1 17 I De-emphasis control 1
DGND 13 – Digital ground
DIN 15 I Data input
DOUT 12 O Data output
LRCIN 10 I Sample rate clock input (fs)
PDAD 7 I ADC power down, active LOW
PDDA 8 I DAC power down, active LOW
SYSCLK 9 I System clock input
V
1 1, 2 – ADC analog power supply
CC
V
2 24 – DAC analog power supply
CC
V
COM
V
DD
VINL 6 I ADC analog input, Lch
VINR 3 I ADC analog input, Rch
V
L 19 O DAC analog output, Lch
OUT
V
R 20 O DAC analog output, Rch
OUT
V
1 4 – ADC reference 1
REF
V
2 5 – ADC reference 2
REF
20BIT 16 I 20-bit format select
(1) Schmitt-trigger input
(2) With 100-k Ω typical internal pulldown resistor
21 – ADC/DAC common
14 – Digital power supply
PIN ASSIGNMENTS—PCM3002 (continued)
(3)
PIN ASSIGNMENTS—PCM3003
(1)
(1) (2)
(1) (2)
(1)
(1)
(1) (2)
(1) (2)
(1)
(1)(2)
6
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86
88
90
92
94
−25 0 25 50 75 100
TA − Free-Air Temperature − °C
Dynamic Range − dB
SNR
94
92
90
86
88
SNR − Signal-to-Noise Ratio − dB
G002
Dynamic Range
0.002
0.004
0.006
0.008
0.010
−25 0 25 50 75 100
TA − Free-Air Temperature − °C
THD+N − Total Harm. Dist. + Noise at −0.5 dB − %
−0.5 dB
5
4
3
1
2
−60 dB
G001
THD+N − Total Harm. Dist. + Noise at −60 dB − %
86
88
90
92
94
2.1 2.4 2.7 3.0 3.3 3.6 3.9
VCC − Supply Voltage − V
Dynamic Range − dB
94
92
90
86
88
SNR − Signal-to-Noise Ratio − dB
G004
Dynamic Range
SNR
0.002
0.004
0.006
0.008
0.010
2.1 2.4 2.7 3.0 3.3 3.6 3.9
VCC − Supply Voltage − V
THD+N − Total Harm. Dist. + Noise at −0.5 dB − %
5
4
3
1
2
THD+N − Total Harm. Dist. + Noise at −60 dB − %
G003
−60 dB
−0.5 dB
All specifications at TA= 25 ° C, V
ADC SECTION
TEMPERATURE TEMPERATURE
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
TYPICAL PERFORMANCE CURVES
= V
CC
= 3 V, fS= 44.1 kHz, f
DD
THD+N DYNAMIC RANGE and SNR
vs vs
SYSCLK
= 384 fS, and f
= 1 kHz, unless otherwise noted
SIGNAL
PCM3002
PCM3003
Figure 1. Figure 2.
THD+N DYNAMIC RANGE and SNR
vs vs
SUPPLY VOLTAGE SUPPLY VOLTAGE
Figure 3. Figure 4.
NOTE: All characteristics at supply voltages from 2.4 V to 2.7 V are measured at SYSCLK = 256 fS.
7
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86
88
90
92
94
Dynamic Range − dB
94
92
90
86
88
SNR − Signal-to-Noise Ratio − dB
G006
Dynamic Range
SNR
fS − Sampling Frequency − kHz
4832 44.1
0.002
0.004
0.006
0.008
0.010
fS − Sampling Frequency − kHz
THD+N − Total Harm. Dist. + Noise at −0.5 dB − %
5
4
3
1
2
G005
THD+N − Total Harm. Dist. + Noise at −60 dB − %
4832 44.1
−60 dB
−0.5 dB
90
92
94
96
98
−25 0 25 50 75 100
TA − Free-Air Temperature − °C
Dynamic Range − dB
SNR
98
96
94
90
92
SNR − Signal-to-Noise Ratio − dB
G008
Dynamic Range
0.002
0.004
0.006
0.008
0.010
−25 0 25 50 75 100
TA − Free-Air Temperature − °C
THD+N − Total Harm. Dist. + Noise at FS − %
FS
4
3
2
0
1
−60 dB
G007
THD+N − Total Harm. Dist. + Noise at −60 dB − %
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
TYPICAL PERFORMANCE CURVES (continued)
All specifications at TA= 25 ° C, V
SAMPLING FREQUENCY SAMPLING FREQUENCY
= V
CC
THD+N DYNAMIC RANGE and SNR
vs vs
= 3 V, fS= 44.1 kHz, f
DD
SYSCLK
= 384 fS, and f
= 1 kHz, unless otherwise noted
SIGNAL
DAC SECTION
Figure 5. Figure 6.
THD+N DYNAMIC RANGE and SNR
vs vs
TEMPERATURE TEMPERATURE
Figure 7. Figure 8.
8
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90
92
94
96
98
2.1 2.4 2.7 3.0 3.3 3.6 3.9
VCC − Supply Voltage − V
Dynamic Range − dB
98
96
94
90
92
SNR − Signal-to-Noise Ratio − dB
G010
Dynamic Range
SNR
0.002
0.004
0.006
0.008
0.010
2.1 2.4 2.7 3.0 3.3 3.6 3.9
VCC − Supply Voltage − V
THD+N − Total Harm. Dist. + Noise at FS − %
4
3
2
0
1
THD+N − Total Harm. Dist. + Noise at −60 dB − %
G009
−60 dB
FS
90
92
94
96
98
Dynamic Range − dB
98
96
94
90
92
SNR − Signal-to-Noise Ratio − dB
G012
Dynamic
Range
SNR
fS − Sampling Frequency − kHz
4832 44.1
256 fS, 512 f
S
384 f
S
0.002
0.004
0.006
0.008
0.010
fS − Sampling Frequency − kHz
THD+N − Total Harm. Dist. + Noise at FS − %
4
3
2
0
1
G011
THD+N − Total Harm. Dist. + Noise at −60 dB − %
4832 44.1
384 f
S
256 fS, 512 f
S
384 f
S
256 fS, 512 f
S
FS
−60 dB
TYPICAL PERFORMANCE CURVES (continued)
All specifications at TA= 25 ° C, V
SUPPLY VOLTAGE SUPPLY VOLTAGE
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
= V
CC
= 3 V, fS= 44.1 kHz, f
DD
SYSCLK
= 384 fS, and f
= 1 kHz, unless otherwise noted
SIGNAL
THD+N DYNAMIC RANGE and SNR
vs vs
PCM3002
PCM3003
Figure 9. Figure 10.
NOTE: All characteristics at supply voltages from 2.4 V to 2.7 V are measured at SYSCLK = 256 fS.
THD+N DYNAMIC RANGE and SNR
vs vs
Figure 11. Figure 12.
SAMPLING FREQUENCY and SYSTEM CLOCK SAMPLING FREQUENCY and SYSTEM CLOCK
9
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f − Frequency − kHz
−140
−120
−100
−80
−60
−40
−20
0
0 5 10 15 20 25
Amplitude − dB
G013
f − Frequency − kHz
−140
−120
−100
−80
−60
−40
−20
0
0 5 10 15 20 25
Amplitude − dB
G015
Signal Level − dB
−96 −84 −72 −60 −48 −36 −24 −12 0
THD+N − Total Harmonic Distortion + Noise − %
G017
0.001
0.1
100
0.01
1
10
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
TYPICAL PERFORMANCE CURVES (continued)
All specifications at TA= 25 ° C, V
OUTPUT SPECTRUM
ADCs
OUTPUT SPECTRUM (–0.5 dB, N = 8192) OUTPUT SPECTRUM (–60 dB, N = 8192)
= V
CC
= 3 V, fS= 44.1 kHz, f
DD
SYSCLK
= 384 fS, and f
= 1 kHz, unless otherwise noted
SIGNAL
10
Figure 13. Figure 14.
THD+N
vs
SIGNAL LEVEL
Figure 15.
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f − Frequency − kHz
−140
−120
−100
−80
−60
−40
−20
0
0 5 10 15 20 25
Amplitude − dB
G014
f − Frequency − kHz
−140
−120
−100
−80
−60
−40
−20
0
0 5 10 15 20 25
Amplitude − dB
G016
Signal Level − dB
−96 −84 −72 −60 −48 −36 −24 −12 0
THD+N − Total Harmonic Distortion + Noise − %
G018
0.001
0.1
100
0.01
1
10
TYPICAL PERFORMANCE CURVES (continued)
All specifications at TA= 25 ° C, V
DACs
OUTPUT SPECTRUM (0 dB, N = 8192) OUTPUT SPECTRUM (–60 dB, N = 8192)
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
= V
CC
= 3 V, fS= 44.1 kHz, f
DD
SYSCLK
= 384 fS, and f
= 1 kHz, unless otherwise noted
SIGNAL
Figure 16. Figure 17.
THD+N
vs
SIGNAL LEVEL
Figure 18.
11
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VCC − Supply Voltage − V
0
5
10
15
20
25
2.1 2.4 2.7 3.0 3.3 3.6 3.9
I
CC
+ I
DD
− mA
ADC and DAC
ADC
DAC
Power Down and Off
2.5
2.0
1.5
0
1.0
I
CC
+ I
DD
: Power Down and Off − mA
G020
0.5
TA − Free-Air Temperature − °C
0
5
10
15
20
25
−50 −25 0 25 50 75 100
I
CC
+ I
DD
− mA
ADC and DAC
ADC
DAC
Power Down and Off
2.5
2.0
1.5
0
1.0
I
CC
+ I
DD
: Power Down and Off − mA
G019
0.5
15
16
17
18
19
20
I
CC
+ I
DD
− mA
ADC and DAC
fS − Sampling Frequency − kHz
4832 44.1
G021
512 f
S
256 f
S
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
All specifications at TA= 25 ° C, V
SUPPLY CURRENT
CC
TYPICAL PERFORMANCE CURVES
= V
= 3 V, fS= 44.1 kHz, f
DD
= 384 fS, DIN = BPZ, and V
SYSCLK
IN
= BPZ, unless otherwise
noted
ICC+ I
DD
vs vs
SUPPLY VOLTAGE TEMPERATURE
Figure 19. Figure 20.
All characteristics at supply voltages from 2.4 V to
2.7 V are measured at SYSCLK = 256 fS.
ICC+ I
DD
12
ICC+ I
DD
vs
SAMPLING FREQUENCY
Figure 21.
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