TEXAS INSTRUMENTS PCM1753 Technical data
Burr-Brown Products
from Texas Instruments
SLES092A – OCTOBER 2003 – REVISED AUGUST 2004
PCM1753
PCM1754
PCM1755
24-BIT, 192 kHz SAMPLING ENHANCED MULTI-LEVEL, DELTA-SIGMA,
AUDIO DIGITAL-TO-ANALOG CONVERTER
FEATURES
D 24-Bit Resolution
D Analog Performance (V
− Dynamic Range: 106 dB
− SNR: 106 dB, Typical
− THD+N: 0.002%, Typical
− Full-Scale Output: 4 V p-p, Typical
= 5 V):
CC
D 4×/8× Oversampling Digital Filter:
− Stop-Band Attenuation: –50 dB
− Pass-Band Ripple: ±0.04 dB
D Sampling Frequency: 5 kHz to 200 kHz
D System Clock: 128 f
512 fS, 768 fS, 1152 fS With Auto Detect
, 192 fS, 256 fS, 384 fS,
S
D Software Control (PCM1753, PCM1755):
− Accepts 16-, 18-, 20-, and 24-Bit Audio
Formats: Standard, I2S, and Left-Justified
− Digital Attenuation: 0 dB to –63 dB,
0.5 dB/Step
− Digital De-Emphasis
− Digital Filter Rolloff: Sharp or Slow
− Soft Mute
− Zero Flags for Each Output
− Open-Drain Output Zero Flag (PCM1755)
D Hardware Control (PCM1754):
− I2S and 16-Bit Word, Right-Justified
− 44.1 kHz Digital De-Emphasis
− Soft Mute
− Zero Flag for L-, R-Channel Common
Output
D Power Supply: 5-V Single Supply
D Small 16-Lead SSOP Package, Lead-Free
APPLICATIONS
D A/V Receivers
D DVD Movie Players
D DVD Add-On Cards For High-End PCs
D DVD Audio Players
D HDTV Receivers
D Car Audio Systems
D Other Applications Requiring 24-Bit Audio
DESCRIPTION
The PCM1753/54/55 is a CMOS, monolithic, integrated
circuit, which includes stereo digital-to-analog converters
and support circuitry in a small 16-lead SSOP package.
The data converters use TI’s enhanced multilevel
delta-sigma architecture, which employs 4th-order noise
shaping and 8-level amplitude quantization to achieve
excellent dynamic performance and improved tolerance to
clock jitter. The PCM1753/54/55 accepts industrystandard audio data formats with 16- to 24-bit data,
providing easy interfacing to audio DSP and decoder
chips. Sampling rates up to 200 kHz are supported. A full
set of user-programmable functions is accessible through
a three-wire serial control port, which supports register
write functions.
The PCM1753/55 is pin compatible with the PCM1748,
PCM1742, and PCM1741, except for pin 5.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
Audio Precision and System Two are trademarks of Audio Precision, Inc.
Other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2004, Texas Instruments Incorporated
PCM1753
PARAMETER
TEST CONDITIONS
UNIT
Audio data interface format
Audio data bit length
PCM1754
PCM1755
SLES092A – OCTOBER 2003 – REVISED AUGUST 2004
PACKAGE/ORDERING INFORMATION
PRODUCT PACKAGE
PCM1753DBQ 16-pin SSOP 16DBQ –25°C to 85°C PCM1753
PCM1754DBQ 16-pin SSOP 16DBQ –40°C to 85°C PCM1754
PCM1755DBQ 16-pin SSOP 16DBQ –25°C to 85°C PCM1755
(1)
For the most current specification and package information, see the TI Web site at www.ti.com.
PACKAGE
CODE
OPERATION
TEMPERATURE
RANGE
PACKAGE
MARKING
www.ti.com
ORDERING
NUMBER
PCM1753DBQ Tube
PCM1753DBQR Tape and reel
PCM1754DBQ Tube
PCM1754DBQR Tape and reel
PCM1755DBQ Tube
PCM1755DBQR Tape and reel
TRANSPORT MEDIA
(1)
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
Supply voltage: V
Ground voltage differences: AGND, DGND ±0.1 V
Input voltage –0.3 V to 6.5 V
Input current (any pins except supplies) ±10 mA
Ambient temperature under bias –40°C to 125°C
Storage temperature –55°C to 150°C
Junction temperature 150°C
Lead temperature (soldering) 260°C, 5 s
Package temperature (IR reflow, peak) 260°C
(1)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , a nd
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
CC
(1)
UNIT
–0.3 V to 6.5 V
ELECTRICAL CHARACTERISTICS
All specifications at TA = 25°C, VCC = 5 V , fS = 44.1 kHz, system clock = 384 fS and 24-bit data, unless otherwise noted
PCM1753DBQ, PCM1754DBQ,
PCM1755DBQ
MIN TYP MAX
Standard, I2S, left-justified
16-, 18-, 20-, 24-bit, selectable
128 fS, 192 fS, 256 fS, 384 fS,
512 fS, 768 fS, 1152 f
S
Resolution 24 Bits
DATA FORMAT
Audio-data interface format
Audio-data bit length
Audio data format MSB first, 2s complement
f
S
Sampling frequency 5 200 kHz
System clock frequency
PARAMETER TEST CONDITIONS
PCM1753
PCM1755
PCM1754 I2S, standard
PCM1753
PCM1755
PCM1754 16–24-bit (I2S), 16-bit (standard)
UNIT
2
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PARAMETER
TEST CONDITIONS
UNIT
THD+N at V
OUT
0 dB
THD+N at V
OUT
60 dB
Dynamic range
dB
Signal to noise ratio
dB
Channel separation
dB
SLES092A – OCTOBER 2003 – REVISED AUGUST 2004
ELECTRICAL CHARACTERISTICS (CONTINUED)
All specifications at TA = 25°C, VCC = 5 V , fS = 44.1 kHz, system clock = 384 fS and 24-bit data, unless otherwise noted
PCM1753DBQ, PCM1754DBQ,
PARAMETER TEST CONDITIONS
DIGITAL INPUT/OUTPUT
Logic family TTL compatible
V
IH
V
IL
I
IH
I
IL
I
IH
I
IL
V
OH
V
OL
DYNAMIC PERFORMANCE
(1)
(1)
(2)
(2)
(3)
(4)
Input logic level
Input logic current
Output logic level
THD+N at V
THD+N at V
OUT
OUT
(5) (6)
= 0 dB
= –60 dB
Dynamic range
Signal-to-noise ratio
Channel separation
Level linearity error V
DC ACCURACY
Gain error ±1 ±6 % of FSR
Gain mismatch, channel-to-channel ±1 ±3 % of FSR
Bipolar zero error V
ANALOG OUTPUT
Output voltage Full scale (0 dB) 80% of V
Center voltage 50% of V
Load impedance AC-coupled load 5 kΩ
DIGITAL FILTER PERFORMANCE
FILTER CHARACTERISTICS (SHARP ROLLOFF)
Pass band ±0.04 dB 0.454 f
Stop band 0.546 f
Pass-band ripple ±0.04 dB
Stop-band attenuation Stop band = 0.546 f
VIN = V
CC
VIN = 0 V –10
VIN = V
CC
VIN = 0 V –10
IOH = –1 mA 2.4
IOL = 1 mA 0.4
fS = 44.1 kHz 0.002% 0.006%
fS = 96 kHz 0.003%
f
= 192 kHz 0.004%
S
fS = 44.1 kHz 0.65%
fS = 96 kHz 0.8%
fS=192 kHz 0.95%
EIAJ, A-weighted, fS = 44.1 kHz 100 106
A-weighted, fS = 96 kHz 104
A-weighted, f
= 192 kHz 102
S
EIAJ, A-weighted, fS = 44.1 kHz 100 106
A-weighted, fS = 96 kHz 104
A-weighted, f
= 192 kHz 102
S
fS = 44.1 kHz 97 103
fS = 96 kHz 101
fS =192 kHz 100
= –90 dB ±0.5 dB
OUT
= 0.5 VCC at BPZ ±30 ±60 mV
OUT
S
PCM1755DBQ
MIN TYP MAX
2.0
65 100
CC
CC
s
–50 dB
PCM1753
PCM1754
PCM1755
0.8
10
s
UNIT
VDC
µA
VDC
dB
dB
dB
Vp-p
VDC
3
PCM1753
PARAMETER
TEST CONDITIONS
UNIT
ICCSupply current
mA
Power dissipation
mW
Operation temperature
PCM1754
PCM1755
SLES092A – OCTOBER 2003 – REVISED AUGUST 2004
ELECTRICAL CHARACTERISTICS (CONTINUED)
All specifications at TA = 25°C, VCC = 5 V , fS = 44.1 kHz, system clock = 384 fS and 24-bit data, unless otherwise noted
PCM1753DBQ, PCM1754DBQ,
PARAMETER TEST CONDITIONS
FILTER CHARACTERISTICS (SLOW ROLLOFF, PCM1753/PCM1755)
Pass band ±0.5 dB 0.198 f
Stop band 0.884 f
Pass-band ripple ±0.5 dB
Stop-band attenuation Stop band = 0.884 f
S
Delay time 18/f
De-emphasis error ±0.1 dB
ANALOG FILTER PERFORMANCE
Frequency response
POWER SUPPLY REQUIREMENTS
V
CC
Voltage range 4.5 5 5.5 VDC
(6)
At 20 kHz –0.03 dB
At 44 kHz –0.20 dB
fS = 44.1 kHz 16 21
I
CC
Supply current
fS = 96 kHz 25
f
= 192 kHz 30
S
fS = 44.1 kHz 80 105
Power dissipation
fS = 96 kHz 125
f
= 192 kHz 150
S
TEMPERATURE RANGE
PCM1753
Operation temperature
PCM1755
PCM1754 –40 85 °C
θ
JA
(1)
(2)
(3)
(4)
(5)
(6)
Thermal resistance 16-pin SSOP 115 °C/W
Pins 16, 1, 2, 3: SCK, BCK, DATA, LRCK.
Pins 13–15: MD, MC, ML (PCM1753/PCM1755). Pins 12–15: TEST, DEMP, MUTE, FMT (PCM1754).
Pins 11, 12: ZEROR, ZEROL (PCM1753). Pin 11: ZEROA (PCM1754).
Pins 11, 12: ZEROR, ZEROL (PCM1753/PCM1755). Pin 11: ZEROA (PCM1754).
Analog performance specifications are measured using the System Twot Cascade audio measurement system by Audio Precisiont in the
averaging mode.
Conditions in 192-kHz operation are system clock = 128 fS and oversampling rate = 64 fS of register 18.
PCM1755DBQ
MIN TYP MAX
s
–35 dB
s
–25 85 °C
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s
UNIT
s
mA
mW
4
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PIN ASSIGNMENTS
PCM1753
PCM1754
PCM1755
SLES092A – OCTOBER 2003 – REVISED AUGUST 2004
PCM1753/PCM1755
(TOP VIEW)
BCK
DATA
LRCK
DGND
NC
V
CC
V
OUT
V
OUT
1
2
3
4
5
6
L
R
7
8
16
15
14
13
12
11
10
9
FUNCTIONAL BLOCK DIAGRAM
BCK
LRCK
DATA
Audio
Serial
Port
SCK
ML
MC
MD
ZEROL/NA
ZEROR/ZEROA
V
COM
AGND
BCK
DATA
LRCK
DGND
NC
V
CC
V
OUT
V
OUT
PCM1754
(TOP VIEW)
1
2
3
4
5
6
L
R
DAC
7
8
Output Amp
and
Low-Pass Filter
16
15
14
13
12
11
10
SCK
FMT
MUTE
DEMP
TEST
ZEROA
V
COM
9
AGND
V
OUT
L
(FMT) ML
(MUTE) MC
(DEMP) MD
(TEST)
SCK
†
Open-Drain Output for the PCM1755
( ): PCM1754
Serial
Control
Port
System
Clock
Manager
Oversampling
Digital
Function
Control
System Clock
4y/8y
Filter
and
Zero Detect
†
ZEROL/NA
Enhanced
Multilevel
Delta-Sigma
Modulator
†
(ZEROA)
ZEROR/ZEROA
DAC
Power Supply
CC
DGND
V
Output Amp
and
Low-Pass Filter
AGND
V
V
COM
OUT
R
5
PCM1753
PCM1754
PCM1755
SLES092A – OCTOBER 2003 – REVISED AUGUST 2004
www.ti.com
Terminal Functions
TERMINAL
NAME NO.
I/O DESCRIPTION
PCM1753/PCM1755
AGND 9 – Analog ground
BCK 1 I Audio data bit clock input
DATA 2 I Audio data digital input
DGND 4 – Digital ground
LRCK 3 I L-channel and R-channel audio data latch enable input
MC 14 I Mode control clock input
MD 13 I Mode control data input
ML 15 I Mode control latch input
(1)
(1)
(1)
NC 5 –
SCK 16 I System clock input
V
CC
V
COM
V
L 7 O Analog output for L-channel
OUT
V
R 8 O Analog output for R-channel
OUT
6 – Analog power supply, 5 V
10 – Common voltage decoupling
ZEROR/ZEROA 11 O Zero flag output for R-channel/Zero flag output for L-/R-channels
ZEROL/NA 12 O Zero flag output for L-channel/Not assigned
(2)
PCM1754
AGND 9 – Analog ground
BCK 1 I Audio-data bit-clock input
DATA 2 I Audio-data digital input
DEMP 13 I De-emphasis control
(1)
DGND 4 – Digital ground
FMT 15 I Data format select
(1)
LRCK 3 I L-channel and R-channel audio data latch enable input
MUTE 14 I Analog mixing control
(1)
NC 5 –
SCK 16 I System clock input
TEST 12 I Test pin. Ground or open
V
CC
V
COM
V
L 7 O Analog output for L-channel
OUT
V
R 8 O Analog output for R-channel
OUT
6 – Analog power supply, 5 V
10 – Common voltage decoupling
(1)
ZEROA 11 O Zero flag output for L/R channels
(1)
Schmitt-trigger input with internal pulldown.
(2)
Open-drain output (PCM1755).
(2)
6
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TYPICAL PERFORMANCE CURVES
DIGITAL FILTER (DE-EMPHASIS OFF)
PCM1753
PCM1754
PCM1755
SLES092A – OCTOBER 2003 – REVISED AUGUST 2004
AMPLITUDE
vs
FREQUENCY
0
−20
−40
−60
−80
Amplitude – dB
−100
−120
−140
01234
Frequency [× fS]
Figure 1. Frequency Response, Sharp Rolloff
AMPLITUDE
vs
FREQUENCY
0.05
0.04
0.03
0.02
0.01
0.00
−0.01
Amplitude – dB
−0.02
−0.03
−0.04
−0.05
0.0 0.1 0.2 0.3 0.4 0.5
Frequency [× fS]
Figure 2. Pass-Band Ripple, Sharp Rolloff
AMPLITUDE
vs
FREQUENCY
0
−20
−40
−60
−80
Amplitude – dB
−100
−120
−140
01234
Frequency [× fS]
Figure 3. Frequency Response, Slow Rolloff
AMPLITUDE
vs
FREQUENCY
5
4
3
2
1
0
−1
Amplitude – dB
−2
−3
−4
−5
0.0 0.1 0.2 0.3 0.4 0.5
Frequency [× fS]
Figure 4. Transition Characteristics,
Slow Rolloff
All specifications at TA = 25_C, VCC = 5 V , fS = 44.1 kHz, system clock = 384 fS, and 24-bit data, unless otherwise noted
7
PCM1753
PCM1754
PCM1755
SLES092A – OCTOBER 2003 – REVISED AUGUST 2004
DE-EMPHASIS CURVES
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DE-EMPHASIS LEVEL
vs
FREQUENCY
0
−1
−2
−3
−4
−5
−6
−7
De-emphasis Level – dB
−8
−9
−10
02468101214
f – Frequency – kHz
fS = 32 kHz
Figure 5
DE-EMPHASIS ERROR
vs
FREQUENCY
0.5
fS = 32 kHz
0.4
0.3
0.2
0.1
0.0
−0.1
−0.2
De-emphasis Error – dB
−0.3
−0.4
−0.5
0 2 4 6 8 10 12 14
f – Frequency – kHz
Figure 6
DE-EMPHASIS LEVEL
vs
FREQUENCY
0
−1
−2
−3
−4
−5
−6
−7
De-emphasis Level – dB
−8
−9
−10
02468101214161820
f – Frequency – kHz
fS = 44.1 kHz
0.5
fS = 44.1 kHz
0.4
0.3
0.2
0.1
0.0
−0.1
−0.2
De-emphasis Error – dB
−0.3
−0.4
−0.5
0 2 4 6 8 101214161820
Figure 7
All specifications at TA = 25_C, VCC = 5 V , fS = 44.1 kHz, system clock = 384 fS, and 24-bit data, unless otherwise noted
DE-EMPHASIS ERROR
vs
FREQUENCY
f – Frequency – kHz
Figure 8
8
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DE-EMPHASIS CURVES (CONTINUED)
PCM1753
PCM1754
PCM1755
SLES092A – OCTOBER 2003 – REVISED AUGUST 2004
DE-EMPHASIS LEVEL
vs
FREQUENCY
0
−1
−2
−3
−4
−5
−6
−7
De-emphasis Level – dB
−8
−9
−10
0 2 4 6 8 10121416182022
f – Frequency – kHz
fS = 48 kHz
0.5
fS = 48 kHz
0.4
0.3
0.2
0.1
0.0
−0.1
−0.2
De-emphasis Error – dB
−0.3
−0.4
−0.5
0 2 4 6 8 10121416182022
Figure 9
All specifications at TA = 25_C, VCC = 5 V , fS = 44.1 kHz, system clock = 384 fS, and 24-bit data, unless otherwise noted
DE-EMPHASIS ERROR
vs
FREQUENCY
f – Frequency – kHz
Figure 10
9
PCM1753
PCM1754
PCM1755
SLES092A – OCTOBER 2003 – REVISED AUGUST 2004
ANALOG DYNAMIC PERFORMANCE (SUPPLY VOLTAGE CHARACTERISTICS)
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TOTAL HARMONIC DISTORTION + NOISE
vs
SUPPLY VOLTAGE
10
192 kHz, 128 f
1
44.1 kHz, 384 f
0.1
192 kHz, 128 f
0.01
0.001
THD+N – Total Harmonic Distortion + Noise – %
0.0001
4.0 4.5 5.0 5.5 6.0
VCC – Supply Voltage – V
S
96 kHz, 384 f
S
96 kHz, 384 f
S
44.1 kHz, 384 f
Figure 11
S
S
–60 dB
S
0 dB
DYNAMIC RANGE
vs
SUPPLY VOLTAGE
110
108
44.1 kHz, 384 f
106
104
102
Dynamic Range – dB
100
98
96
4.0 4.5 5.0 5.5 6.0
VCC – Supply Voltage – V
S
96 kHz, 384 f
192 kHz, 128 f
S
Figure 12
S
SIGNAL-to-NOISE RATIO
vs
SUPPLY VOLTAGE
110
108
44.1 kHz, 384 f
106
104
192 kHz, 128 f
102
100
SNR – Signal-to-Noise Ratio – dB
98
96
4.0 4.5 5.0 5.5 6.0
VCC – Supply Voltage – V
S
96 kHz, 384 f
S
S
110
108
106
104
102
100
Channel Separation – dB
98
96
4.0 4.5 5.0 5.5 6.0
Figure 13
All specifications at TA = 25_C, VCC = 5 V , fS = 44.1 kHz, system clock = 384 fS, and 24-bit data, unless otherwise noted
CHANNEL SEPARATION
vs
SUPPLY VOLTAGE
44.1 kHz, 384 f
96 kHz, 384 f
192 kHz, 128 f
VCC – Supply Voltage – V
Figure 14
S
S
S
10
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