Texas Instruments OPA2350EA, OPA350EA, OPA2350PA, OPA2350UA, OPA350PA Schematic [ru]

...
1
(−40dBc)
0.1
(−60dBc)
0.01
(−80dBc)
(−100dBc)
0.0001
(−120dBc)
Harmonic Distortion (%)
Frequency (Hz)
1k 10k 100k 1M
G = 1 VO= 2.5V
PP
RL= 600Ω
3rd−Harmonic
2nd−Harmonic
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Reference Design
OPA350,OPA2350,OPA4350
SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
OPAx350 High-Speed, Single-Supply, Rail-to-Rail Operational Amplifiers MicroAmplifier
Series

1 Features 3 Description

1
Rail-to-Rail Input
Rail-to-Rail Output (Within 10 mV)
Wide Bandwidth: 38 MHz
High Slew Rate: 22 V/μs
Low Noise: 5 nV/Hz
Low THD+Noise: 0.0006%
Unity-Gain Stable
MicroSize Packages
Single, Dual, and Quad

2 Applications

Cell Phone PA Control Loops
Driving A/D Converters is to within 10 mV of the supply rails, with a 10-kΩ
Video Processing
Data Acquisition
Process Controls
Audio Processing
Communications
Active Filters
Test Equipment
OPAx350 Harmonic Distortion
The OPA350 series of rail-to-rail CMOS operational amplifiers are optimized for low voltage, single-supply operation. Rail-to-rail input and output, low noise (5 nV/Hz), and high speed operation (38 MHz, 22 V/μs) make the amplifiers ideal for driving sampling Analog­to-Digital (A/D) converters. They are also suited for cell phone PA control loops and video processing (75-Ω drive capability), as well as audio and general purpose applications. Single, dual, and quad versions have identical specifications for maximum design flexibility.
The OPA350 series operates on a single supply as low as 2.5 V, with an input common-mode voltage range that extends 300 mV below ground and 300 mV above the positive supply. Output voltage swing
load. Dual and quad designs feature completely independent circuitry for lowest crosstalk and freedom from interaction.
The single (OPA350) and dual (OPA2350) come in the miniature MSOP-8 surface mount, SO-8 surface mount, and DIP-8 packages. The quad (OPA4350) packages are in the space-saving SSOP-16 surface mount and SO-14 surface mount. All are specified from 40°C to 85°C and operate from 55°C to 150°C.
Device Information
PART NUMBER PACKAGE BODY SIZE (NOM)
MSOP (8) 3.00 mm × 3.00 mm
OPA350 SOIC (8) 3.91 mm × 4.90 mm
PDIP (8) 6.35 mm × 9.81 mm MSOP (8) 3.00 mm × 3.00 mm
OPA2350 SOIC (8) 3.91 mm × 4.90 mm
PDIP (8) 6.35 mm × 9.81 mm
OPA4350
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
SSOP (16) 3.90 mm × 4.90 mm SOIC (14) 3.91 mm × 8.65 mm
(1)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
OPA350,OPA2350,OPA4350
SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
www.ti.com

Table of Contents

1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings...................................... 4
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information: OPA350 and OPA2350........... 5
6.5 Thermal Information: OPA4350................................ 5
6.6 Electrical Characteristics........................................... 6
6.7 Typical Characteristics.............................................. 8
7 Detailed Description............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagram....................................... 12
7.3 Feature Description................................................. 12
7.4 Device Functional Modes........................................ 17
8 Application and Implementation ........................ 18
8.1 Application Information............................................ 18
8.2 Typical Applications ................................................ 18
9 Power Supply Recommendations...................... 22
10 Layout................................................................... 22
10.1 Layout Guidelines ................................................. 22
10.2 Layout Example .................................................... 23
11 Device and Documentation Support................. 24
11.1 Device Support .................................................... 24
11.2 Documentation Support ....................................... 24
11.3 Related Links ........................................................ 24
11.4 Community Resources.......................................... 25
11.5 Trademarks........................................................... 25
11.6 Electrostatic Discharge Caution............................ 25
11.7 Glossary................................................................ 25
12 Mechanical, Packaging, and Orderable
Information........................................................... 25

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (January 2005) to Revision D Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1
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Product Folder Links: OPA350 OPA2350 OPA4350
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Out D
In D
+In D
V
+In C
In C
Out C
NC
Out A
In A
+In A
+V
+In B
In B
Out B
NC
A D
B C
1
2
3
4
8
7
6
5
V+
Out B
−In B
+In B
Out A
−In A
+In A
A
B
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Out D
In D
+In D
V
+In C
In C
Out C
Out A
In A
+In A
V+
+In B
In B
Out B
A D
B C
1
2
3
4
8
7
6
5
NC
V+
Output
NC
NC
−In
+In
V
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5 Pin Configuration and Functions

OPA350: P, D, and DGK Packages
8-Pin PDIP, SOIC, and VSSOP
Top View
OPA2350: P, D, and DGK Packages
8-Pin PDIP, SOIC, and VSSOP
Top View
OPA350,OPA2350,OPA4350
SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
D Package
14-Pin SOIC
Top View
DBQ Package
16-Pin SSOP
Top View
Pin Functions
PIN
NAME
OPA350 OPA2350 OPA4350 SO-14 OPA4350 SSOP
NO. NO. NO. NO.
NC 1, 5, 8 8, 9 No internal connection –In 2 I Inverting input +In 3 I Noninverting input V– 4 4 11 13 I Negative power supply Output 6 O Output V+ 7 8 4 4 I Positive power supply Out A 1 1 1 O Output channel A –In A 2 2 2 I Inverting input channel A +In A 3 3 3 I Noninverting input channel A +In B 5 5 5 I Noninverting input channel B –In B 6 6 6 I Inverting input channel B Out B 7 7 7 O Output channel B Out C 8 10 O Output channel C –In C 9 11 I Inverting input channel C +In C 10 12 I Noninverting input channel C +In D 12 14 I Noninverting input channel D –In D 13 15 I Inverting input channel D Out D 14 16 O Output channel D
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I/O DESCRIPTION
OPA350,OPA2350,OPA4350
SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)
Supply voltage 7 V
Signal input terminals
(2)
Open short circuit current
(3)
Voltage (V) 0.3 (V+) + 0.3 V Current 10 mA
Operating temperature –55 150 °C Lead temperature (soldering, 10 s) 300 °C Junction temperature 150 °C
T
Storage temperature –55 150 °C
stg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should
be current-limited to 10 mA or less.
(3) Short-circuit to ground, one amplifier per package.

6.2 ESD Ratings

OPA350, OPA2350, OPA4350 (ALL PACKAGE TYPES)
V
(ESD)
OPA350, OPA2350, OPA4350 (SOIC PACKAGES ONLY)
V
(ESD)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
Electrostatic discharge ±1500 V
Charged-device model (CDM), per JEDEC specification JESD22-
(2)
C101
(1)
MIN MAX UNIT
Continuous
VALUE UNIT
(1)
±1000 V

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Power supply voltage, (V+)-(V-) 2.7 (±1.35) 5 (±2.5) 5.5 (±2.75) V Specified temperature –40 25 85 °C Operating temperature –55 25 150 °C
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SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015

6.4 Thermal Information: OPA350 and OPA2350

OPA350, OPA2350
THERMAL METRIC
(1)
DGK (VSSOP) P (PDIP) D (SOIC) UNIT
8 PINS 8 PINS 8 PINS
R R R
ψ ψ
R
Junction-to-ambient thermal resistance 169.2 53.1 140.1 °C/W
θJA
Junction-to-case (top) thermal resistance 62.8 42.5 89.8 °C/W
θJC(top)
Junction-to-board thermal resistance 89.8 30.3 80.6 °C/W
θJB
Junction-to-top characterization parameter 7.5 19.7 28.7 °C/W
JT
Junction-to-board characterization parameter 88.2 30.2 80.1 °C/W
JB
Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W
θJC(bot)
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Thermal Information: OPA4350

OPA4350
THERMAL METRIC
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
R
θJC(bot)
Junction-to-ambient thermal resistance 83.8 115.8 °C/W Junction-to-case (top) thermal resistance 70.7 67 °C/W Junction-to-board thermal resistance 59.5 58.3 °C/W Junction-to-top characterization parameter 11.6 19.9 °C/W Junction-to-board characterization parameter 37.7 57.9 °C/W Junction-to-case (bottom) thermal resistance N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(1)
D (SOIC) DBQ (SSOP) UNIT
14 PINS 16 PINS
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SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
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6.6 Electrical Characteristics

VS= 2.7 V to 5.5 V; All specifications at TA= 25°C, RL= 1 kΩ connected to VS/2 and V
PARAMETER TEST CONDITIONS MIN TYP
OFFSET VOLTAGE
VS= 5 V ±150 ±500 µV
V
PSRR VS= 2.7 V to 5.5 V, VCM= 0 V µV/V
Input offset voltage ±1 mV
OS
vs Power-supply rejection ratio
Channel separation (dual, quad) DC 0.15 µV/V
INPUT BIAS CURRENT
I
I
Input bias current pA
B
Input offset current ±0.5 ±10 pA
OS
NOISE
Input voltage noise, f = 100 Hz to 400 kHz 4 μVrms
e
Input voltage noise density, f = 10 kHz 7 nV/Hz
n
Input current noise density, f = 100 kHz 5 nV/Hz
i
Current noise density, f = 10 kHz 4 fA/√Hz
n
INPUT VOLTAGE RANGE
V
Common-mode voltage range TA= 40°C to 85°C –0.1 (V+) + 0.1 V
CM
CMRR Common-mode rejection ratio dB
INPUT IMPEDANCE
Differential Ω || pF Common-mode Ω || pF
OPEN-LOOP GAIN
OL
Open-loop voltage gain
A
FREQUENCY RESPONSE (CL= 100 pF)
GBW Gain-bandwidth product G = 1 38 MHz SR Slew rate G = 1 22 V/µs
Settling time G = ±1, 2-V Step µs
Overload recovery time VIN× G = V
THD+N Total harmonic distortion + noise RL= 600 Ω, VO= 2.5 V
Differential gain error G = 2, RL= 600 Ω, VO= 1.4 V Differential phase error G = 2, RL= 600 Ω, VO= 1.4 V
OUTPUT
V
I I C
Voltage output swing
OUT
OUT SC
LOAD
(4)
from rail
Output current ±40 short circuit current ±80 mA Capacitive load drive See Typical Characteristics
TA= 40°C to 85°C
vs Temperature TA= –40°C to 85°C ±4 μV/°C
vs Temperature See Typical Characteristics
VS= 2.7 V, 0.1 V < VCM< 2.8 V 66 84 VS= 5.5 V, 0.1 V < VCM< 5.6 V 74 90 TA= 40°C to 85°C,
VS= 5.5 V, 0.1 V < VCM< 5.6 V
RL= 10 kΩ, 50 mV < VO< (V+) –50 mV 100 122
RL= 10 kΩ, 50 mV < VO< (V+) –50 mV 100 TA= –40°C to 85°C
RL= 1 kΩ, 200 mV < VO< (V+) –200 mV 100 120
RL= 1 kΩ, 200 mV < VO< (V+) –200 mV 100
0.1% 0.22
0.01% 0.5
S
(2)
, G = 1, f = 1 kHz 0.0006%
PP
(3) (3)
RL= 10 kΩ, AOL≥ 100 dB 10 50 TA= –40°C to
85°C
RL= 10 kΩ, AOL≥ 100 dB 50 mV
RL= 1 kΩ, AOL≥ 100 dB 25 200
= VS/2, unless otherwise noted.
OUT
(1)
40 150
±0.5 ±10
74
1013|| 2.5 1013|| 6.5
0.1 µs
0.17%
0.17 °
(5)
MAX UNIT
175
dB
mA
(1) VS= 5 V (2) V (3) NTSC signal generator used. See Figure 31 for test circuit.
= 0.25 V to 2.75 V
OUT
(4) Output voltage swings are measured between the output and power supply rails. (5) See Figure 17.
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Electrical Characteristics (continued)
OPA350,OPA2350,OPA4350
SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
VS= 2.7 V to 5.5 V; All specifications at TA= 25°C, RL= 1 kΩ connected to VS/2 and V
PARAMETER TEST CONDITIONS MIN TYP
POWER SUPPLY
V
I
TEMPERATURE RANGE
Operating voltage range TA= 40°C to 85°C 2.7 5.5 V
S
Minimum operating voltage 2.5 V
Quiescent current
Q
(per amplifier)
Specified range –40 85 °C Operating range –55 150 °C
TA= –40°C to 85°C
IO= 0 mA
= VS/2, unless otherwise noted.
OUT
(1)
5.2 7.5
MAX UNIT
8.5
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1
0.1
0.01
0.001
0.0001
THD+N (%)
Frequency (Hz)
10 100 1k 10k 100k
RL= 600Ω
G = 100, 3VPP(VO= 1V to 4V)
G = 10, 3VPP(VO= 1V to 4V)
G = 1, 3VPP(VO= 1V to 4V) Input goes through transition region
G = 1, 2.5VPP(VO= 0.25V to 2.75V) Input does NOT go through transition region
1
(−40dBc)
0.1
(−60dBc)
0.01
(−80dBc)
0.001
(−100dBc)
0.0001
(−120dBc)
Harmonic Distortion (%)
Frequency (Hz)
1k 10k 100k 1M
G = 1 VO= 2.5V
PP
RL= 600Ω
3rd−Harmonic
2nd−Harmonic
Frequency (Hz)
Channel Separation (dB)
140
130
120
110
100
90
80
70
60
10010 1k 1M100k10k 10M
Dual and quad devices.
100k
10k
1k
100
10
1
10k
1k
100
10
1
0.1
Voltage Noise (nV
Hz)
Frequency (Hz)
10 100 1k 10k 100k 1M 10M
Current Noise (fA
Hz)
Voltage Noise
Current Noise
100
90
80
70
60
50
40
30
20
10
0
PSRR, CMRR (dB)
Frequency (Hz)
10 100 1k 10k 100k 1M 10M
PSRR
CMRR
(V
S
= +5V
V
CM
=−0.1V to 5.1V)
0.1 1
160
140
120
100
80
60
40
20
0
0
45
90
135
180
Phase (
)
Frequency (Hz)
10 100 1k 10k 100k 1M 10M 100M
G
φ
Voltage Gain (dB)
OPA350,OPA2350,OPA4350
SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015

6.7 Typical Characteristics

All specifications at TA= 25°C, VS= 5 V, and RL= 1 kΩ connected to VS/2, unless otherwise noted.
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Figure 1. Open-Loop Gain and Phase vs Frequency
Figure 3. Input Voltage and Current Noise Spectral Density
vs Frequency
Figure 2. Power Supply and Common-Mode Rejection Ratio
vs Frequency
Figure 4. Channel Separation vs Frequency
Figure 5. Total Harmonic Distortion + Noise vs Frequency
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Figure 6. Harmonic Distortion + Noise vs Frequency
Product Folder Links: OPA350 OPA2350 OPA4350
Supply Voltage (V)
Quiescent Current (mA)
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Per Amplifier
Temperature ( °C)
Quiescent Current (mA)
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
100
90
80
70
60
50
40
30
Short−Circuit Current (mA)
−75−50−
25 0 25 50 75 100 125
I
Q
+I
SC
I
SC
Temperature ( °C)
Slew Rate (V/
µ
s)
40
35
30
25
20
15
10
5
0
−75−50−
25 0 25 50 75 1 00 125
Negative Slew Rate
Positive Slew Rate
100
90
80
70
60
CMRR (dB)
110
100
90
80
70
PSRR (dB)
Temperature ( °C )
−75 −50 −25 0 25 50 75 100 125
CMRR, VS= 5.5V
(VCM=−0.1V to +5.6V)
CMRR, VS= 2.7V
(V
CM
=− 0.1V to +2.8V)
PSRR
0.5
0.4
0.3
0.2
0.1
0
Differential Gain (%)
Differential Phase (°
)
Resistive Load (Ω)
0 100 200 300 500400 600 800700 900 100
0
G = 2 V
O
= 1.4V NTSC Signal Generator See Figure 6 for test circuit.
Phase
Gain
130
125
120
115
110
Open−Loop Gain (dB)
Temperature ( °C)
75−50−25 0 25 5 0 75 100 125
RL= 600
RL= 1k
RL= 10k
OPA350,OPA2350,OPA4350
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SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
Typical Characteristics (continued)
All specifications at TA= 25°C, VS= 5 V, and RL= 1 kΩ connected to VS/2, unless otherwise noted.
Figure 7. Differential Gain and Phase vs Resistive Load
Figure 9. Common-Mode and Power-Supply Rejection Ratio
vs Temperature
Figure 8. Open-Loop Gain vs Temperature
Figure 10. Slew Rate vs Temperature
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Figure 11. Quiescent Current and short circuit Current vs
Temperature
Product Folder Links: OPA350 OPA2350 OPA4350
Figure 12. Quiescent Current vs Supply Voltage
140
130
120
110
100
90
80
70
60
Open−Loop Gain (dB)
Output Voltage Swing from Rails (mV)
0 20 40 6 0 10080 120 160140 180 200
I
OUT
= 4.2mA
I
OUT
= 250µA
I
OUT
= 2.5mA
Output Current (mA)
Output Voltage (V)
V+
(V+)−1
(V+)−2
(V−)+2
(V−)+1
(V−)
0
±
10
±
20
±
30
±
40
+25
°C
+125
°C
55
°C
55
°C
+125
°C
+25
°C
Depending on circuit configuration (including closed−loop gain) performance may be degraded in shaded region.
100M1M 10M
Frequency (Hz)
100k
6
5
4
3
2
1
0
Output Voltage (V
PP
)
Maximum output voltage without slew rate−induced distortion.
VS= 2.7V
VS= 5.5V
Frequency (Hz)
Output Impedance (
)
100
10
1
0.1
0.01
0.001
0.0001 1 10 100 1k 10k 100k 1M 10M 100
M
G = 100
G = 10
G = 1
Common−Mode Voltage (V)
Input Bias Current (pA)
1.5
1.0
0.5
0.0
0.5
−0.5 0.0 0.5 1.0 2.01.5 2.5 3.0 3.5 4.0 5.04.5 5.5
Input Bias Current (pA)
Temperature (
°C)
−75−50−
25 0 25 50 75 100 125
1k
100
10
1
0.1
OPA350,OPA2350,OPA4350
SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
Typical Characteristics (continued)
All specifications at TA= 25°C, VS= 5 V, and RL= 1 kΩ connected to VS/2, unless otherwise noted.
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Figure 13. Input Bias Current vs Temperature
Figure 15. Closed-Loop Output Impedance vs Frequency
Figure 14. Input Bias Current vs Input Common-Mode
Voltage
Figure 16. Maximum Output Voltage vs Frequency
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Figure 17. Output Voltage Swing vs Output Current
Figure 18. Open-Loop Gain vs Output Voltage Swing
Product Folder Links: OPA350 OPA2350 OPA4350
100ns/div
50mV/div
200ns/div
1V/div
10
1
0.1
Settling Time (
µ
s)
Closed−Loop Gain (V/V)
1
10
100
0.1%
0.01%
1M100 1k 10k 100k
Load Capacitance (pF)
10
80
70
60
50
40
30
20
10
0
Overshoot (%)
G = 1
G=−1
G =±10
Offset Voltage Drift (µV/
°C)
20
18
16
14
12
10
8
6
4
2
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Percent of Amplifiers (%)
Typical production distribution of packaged units.
Offset Voltage (µV)
18
16
14
12
10
8
6
4
2
0
Percent of Amplifiers (%)
500
450
400
350
300
250
200
150
100
50
0
50
100
150
200
250
300
350
400
450
500
Typical distribution of
packaged units.
OPA350,OPA2350,OPA4350
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SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
Typical Characteristics (continued)
All specifications at TA= 25°C, VS= 5 V, and RL= 1 kΩ connected to VS/2, unless otherwise noted.
Figure 19. Offset Voltage Production Distribution
Figure 21. Small-Signal Overshoot vs Load Capacitance
Figure 20. Offset Voltage Drift Production Distribution
Figure 22. Settling Time vs Closed-Loop Gain
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Figure 23. Small-Signal Step Response Figure 24. Large-Signal Step Response
CL= 100 pF CL= 100 pF
Product Folder Links: OPA350 OPA2350 OPA4350
Reference
Current
V+
V
IN-
V
IN+
V
(Ground)
-
V
BIAS2
V
BIAS1
Class AB
Control
Circuitry
V
O
OPA350,OPA2350,OPA4350
SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
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7 Detailed Description

7.1 Overview

The OPA350 series rail-to-rail CMOS operational amplifiers are optimized for low voltage, single-supply operation. Rail-to-rail input and output, low noise (5 nV/Hz), and high speed operation (38 MHz, 22 V/μs) make the amplifiers ideal for driving sampling Analog-to-Digital (A/D) converters. They are also suited for cell phone PA control loops and video processing (75-Ω drive capability), as well as audio and general purpose applications. Single, dual, and quad versions have identical specifications for maximum design flexibility.

7.2 Functional Block Diagram

7.3 Feature Description

The OPA350 series of operational amplifiers (op amps) are fabricated on a state-of-the-art 0.6 micron CMOS process. They are unity-gain stable and suitable for a wide range of general purpose applications. Rail-to-rail input and output make them ideal for driving sampling A/D converters. They are also suited for controlling the output power in cell phones. These applications often require high speed and low noise. In addition, the OPA350 series offers a low-cost solution for general-purpose and consumer video applications (75-Ω drive capability).
Excellent AC performance makes the OPA350 series suited for audio applications. Their bandwidth, slew rate, low noise (5 nV/Hz), low THD (0.0006%), and small package options are ideal for these applications. The class AB output stage is capable of driving 600-Ω loads connected to any point between V+ and ground.
Rail-to-rail input and output swing significantly increases dynamic range, especially in low voltage supply applications. Figure 25 shows the input and output waveforms for the OPA350 in unity-gain configuration. Operation is from a single 5-V supply with a 1-kΩ load connected to VS/2. The input is a 5 VPPsinusoid. Output voltage swing is approximately 4.95 VPP.
Power supply pins should be bypassed with 0.01-μF ceramic capacitors.
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VS= +5, G = +1, RL= 1k
5V
V
IN
0
5V
V
OUT
0
1.25V/div
OPA350,OPA2350,OPA4350
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SBOS099D –SEPTEMBER 2000–REVISED DECEMBER 2015
Feature Description (continued)
Figure 25. Rail-to-Rail Input and Output

7.3.1 Operating Voltage

OPA350 series operational amplifiers are fully specified from 2.7 V to 5.5 V. Supply voltage may range from 2.5 V to 5.5 V. Parameters are tested over the specified supply range: a feature of the OPA350 series. In addition, many specifications apply from 40°C to 85°C. Most behavior remains virtually unchanged throughout the full operating voltage range. Parameters that vary significantly with operating voltage or temperature are shown in
Typical Characteristics.

7.3.2 Rail-to-Rail Input

The tested input common-mode voltage range of the OPA350 series extends 100 mV beyond the supply rails. This is achieved with a complementary input stage: an N-channel input-differential pair in parallel with a P­channel differential pair, as shown in Figure 26. The N-channel pair is active for input voltages close to the positive rail, typically (V+) – 1.8 V to 100 mV above the positive supply, while the P-channel pair is on for inputs from 100 mV below the negative supply to approximately (V+) – 1.8 V. There is a small transition region, typically (V+) – 2 V to (V+) – 1.6 V, in which both pairs are on. This 400-mV transition region can vary ±400 mV with process variation. Thus, the transition region (both input stages on) can range from (V+) – 2.4 V to (V+) – 2 V on the low end, up to (V+) – 1.6 V to (V+) – 1.2 V on the high end.
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