Texas Instruments LM5156-Q1, LM51561-Q1 Datasheet

BIAS

VCC

GATE

GND

COMP

PGOOD

DITHOFF

UVLO/SYNC

LOAD

SUPPLY

Product Folder

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LM5156-Q1,LM51561-Q1

SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

LM5156x-Q1 2.2-MHz Wide VIN 65-V Non-synchronous Boost/SEPIC/Flyback Controller

with Dual Random Spread Spectrum

1 Features

• AEC-Q100 qualified for automotive applications – Temperature grade 1: –40°C to +125°C T

• Functional Safety-Capable – Documentation available to aid functional

safety system design

• Suited for wide input operating range car battery applications

– 3.5-V to 60-V Operating range (65-V abs max) – 2.97-V to 16-V When BIAS = VCC – Minimum boost supply voltage 1.5 V when

BIAS ≥ 3.5 V – Input transient protection up to 65 V – Minimized battery drain

– Low shutdown current (IQ≤ 2.6 µA)

– Low operating current (IQ≤ 490 µA)

• Small solution size and low cost – Maximum switching frequency of 2.2 MHz – 12-Pin WSON package (3 mm × 2 mm) with

wettable flanks

– Integrated error amplifier allows primary-side

regulation without optocoupler (flyback)

– Minimized undershoot during cranking (start-

stop application)

• EMI mitigation – Selectable dual random spread spectrum – Lead-less package

• Higher efficiency with low-power dissipation – 100-mV ±7% accurate current limit threshold – Strong 1.5-A peak standard MOSFET driver – Supports external VCC supply

• Accurate ±1% accuracy feedback reference

• Programmable extra slope compensation

• Adjustable soft start

• PGOOD indicator

• Create a custom design using the LM5156x-Q1 with the WEBENCH®power designer

2 Applications

• Automotive 12-V or 24-V battery application

• Automotive start-stop application

• High voltage LiDAR power supply

• Multiple-output flyback without optocoupler

• Automotive rear-lights LED bias supply

• Wide input boost, SEPIC, flyback power module

• Audio amplifier application

• Battery-powered boost, SEPIC, flyback

3 Description

The LM5156x-Q1 (LM5156-Q1 and LM51561-Q1) device is a wide input range, non-synchronous boost controller that uses peak current mode control. The device can be used in boost, SEPIC, and flyback topologies.

The LM5156x-Q1 device can start up from a 1-cell battery with a minimum of 2.97 V if the BIAS pin is connected to the VCC pin. It can operate with the input supply voltage as low as 1.5 V if the BIAS pin is greater than 3.5 V.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)

LM5156x-Q1 WSON (12) 3.00 mm × 2.00 mm (1) For all available packages, see the orderable addendum at

the end of the data sheet.

(1)

• Avoid AM band interference and crosstalk – Optional clock synchronization

Typical Boost Application

– Dynamically programmable switching

frequency from 100 kHz to 2.2 MHz

• Integrated protection features – Constant peak current limiting over input

voltage

– Optional hiccup mode overload protection (see

the Device Comparison Table) – Programmable line UVLO – OVP protection

– Thermal shutdown

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

LM5156-Q1,LM51561-Q1

SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

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1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Description (continued)......................................... 3

6 Device Comparison Table..................................... 3

7 Pin Configuration and Functions......................... 4

8 Specifications......................................................... 5

8.1 Absolute Maximum Ratings ...................................... 5

8.2 ESD Ratings.............................................................. 5

8.3 Recommended Operating Conditions....................... 6

8.4 Thermal Information.................................................. 6

8.5 Electrical Characteristics........................................... 6

8.6 Typical Characteristics.............................................. 8

9 Detailed Description............................................ 11

9.1 Overview ................................................................. 11

9.2 Functional Block Diagram....................................... 11

9.3 Feature Description................................................. 12

9.4 Device Functional Modes........................................ 25

10 Application and Implementation........................ 26

10.1 Application Information.......................................... 26

10.2 Typical Application ................................................ 26

10.3 System Examples ................................................. 30

11 Power Supply Recommendations ..................... 36

12 Layout................................................................... 36

12.1 Layout Guidelines ................................................. 36

12.2 Layout Examples................................................... 37

13 Device and Documentation Support................. 39

13.1 Device Support...................................................... 39

13.2 Documentation Support ........................................ 39

13.3 Related Links ........................................................ 39

13.4 Receiving Notification of Documentation Updates 39

13.5 Support Resources ............................................... 40

13.6 Trademarks........................................................... 40

13.7 Electrostatic Discharge Caution............................ 40

13.8 Glossary................................................................ 40

14 Mechanical, Packaging, and Orderable

Information........................................................... 40

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Original (January 2020) to Revision A Page

• Changed device status from Advance Information to Production Data ................................................................................. 1

Product Folder Links: LM5156-Q1 LM51561-Q1

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SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

5 Description (continued)

The internal VCC regulator also supports BIAS pin operation up to 60 V (65-V absolute maximum) for automotive load dump. The switching frequency is dynamically programmable with an external resistor from 100 kHz to 2.2 MHz. Switching at 2.2 MHz minimizes AM band interference and allows for a small solution size and fast transient response. To reduce the EMI of the power supply, the device provides a selectable dual random spread spectrum which reduces the EMI over the wide frequency range.

The device features a 1.5-A standard MOSFET driver and a low 100-mV current limit threshold. The device also supports the use of an external VCC supply to improve efficiency. Low operating current and pulse-skipping operation improve efficiency at light loads.

The device has built-in protection features such as cycle-by-cycle current limit, overvoltage protection, line UVLO, and thermal shutdown. Hiccup mode overload protection is available in the LM51561-Q1 device option. Additional features include low shutdown IQ, programmable soft start, programmable slope compensation, precision reference, power-good indicator, and external clock synchronization.

6 Device Comparison Table

DEVICE OPTION HICCUP MODE PROTECTION INTERNAL REFERENCE

LM5156-Q1 Disabled 1 V

LM51561-Q1 Enabled 1 V

Product Folder Links: LM5156-Q1 LM51561-Q1

BIAS

GATE

VCC

GND

COMP

PGOOD

UVLO/SYNC

DITHOFF

LM5156-Q1,LM51561-Q1

SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

7 Pin Configuration and Functions

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12-Pin WSON With Wettable Flanks

DSS Package

Transparent Top View

Pin Functions

NO. NAME

1 BIAS P Supply voltage input to the VCC regulator. Connect a bypass capacitor from this pin to GND. 2 VCC P

3 GATE O

4 GND G

5 CS I

6 COMP O

7 DITHOFF I

8 FB I

9 SS I

10 RT I

11 PGOOD O

UVLO/SYNC/

— EP —

(1) G = Ground, I = Input, O = Output, P = Power

TYPE

(1)

DESCRIPTION

Output of the internal VCC regulator and supply voltage input of the MOSFET driver. Connect a ceramic bypass capacitor from this pin to GND.

N-channel MOSFET gate drive output. Connect directly to the gate of the N-channel MOSFET through a short, low inductance path.

Ground pin. Connect directly to the ground connection of the sense resistor through a low inductance wide and short path.

Current sense input pin. Connect to the positive side of the current sense resistor through a short path.

Output of the internal transconductance error amplifier. Connect the loop compensation components between this pin and GND.

Spread spectrum selection pin. Internal spread spectrum (Clock dithering) is disabled when the pin is connected to the VCC pin. Connecting the pin to GND enables the internal spread spectrum.

Inverting input of the error amplifier. Connect a voltage divider from the output to this pin to set output voltage in boost/SEPIC topologies. Connect the low-side feedback resistor to GND.

Soft-start time programming pin. An external capacitor and an internal current source set the ramp rate of the internal error amplifier reference during soft start. Connect the ground connection of the capacitor to GND.

Switching frequency setting pin. The switching frequency is programmed by a single resistor between RT and GND.

Power-good indicator. An open-drain output which goes low if FB is below the under voltage threshold. Connect a pullup resistor to the system voltage rail.

Undervoltage lockout programming pin. The converter start-up and shutdown levels can be programmed by connecting this pin to the supply voltage through a resistor divider. The internal clock

can be synchronized to an external clock by applying a negative pulse signal into the UVLO/SYNC/EN pin. This pin must not be left floating. Connect to BIAS pin if not used. Connect the low-side UVLO resistor to GND.

Exposed pad of the package. The exposed pad must be connected to GND and the large ground copper plane to decrease thermal resistance.

Product Folder Links: LM5156-Q1 LM51561-Q1

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SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

8 Specifications

8.1 Absolute Maximum Ratings

Over the recommended operating junction temperature range

BIAS to GND –0.3 65 UVLO to GND –0.3 V SS to GND

Input

RT to GND FB to GND –0.3 4.0 CS to GND(DC) –0.3 0.3 CS to GND(50ns transient) –1 DITHOFF to GND -0.3 18 VCC to GND –0.3 18

Output

GATE to GND (50ns transient) –1 PGOOD to GND

COMP to GND Junction temperature, T Storage temperature, T

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) This pin is not specified to have an external voltage applied. (3) 18 V or V (4) The maximum current sink is limited to 1 mA when V

+ 0.3 V whichever is lower

BIAS

(5) This pin has an internal max voltage clamp which can handle up to 1.6 mA. (6) High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.

(2) (2)

(4)

(5)

(6)

stg

PGOOD>VBIAS

(1)

MIN MAX UNIT

+0.3

BIAS

–0.3 3.8 –0.3 3.8

(3)

–0.3 18

–0.3

–40 150 –55 150

°C

8.2 ESD Ratings

(1)

All pins ±500 Corner pins ±750

(ESD)

Electrostatic discharge

Human-body model (HBM), per AEC Q100-002 HBM ESD Classification Level 2

Charged-device model (CDM), per AEC Q100-011 CDM ESD Classification Level C4B

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

VALUE UNIT

±2000

Product Folder Links: LM5156-Q1 LM51561-Q1

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8.3 Recommended Operating Conditions

Over the recommended operating junction temperature range

BIAS

VCC

DITHOFF

UVLO

SYNC

Bias input VCC voltage DITHOFF input 0 16 V UVLO input 0 60 V FB input 0 4.0 V Typical switching frequency 100 2200 kHz Synchronization pulse frequency 100 2200 kHz Operating junction temperature

(1) Operating Ratings are conditions under the device is intended to be functional. For specifications and test conditions, see Electrical

Characteristics.

(2) BIAS pin operating range is from 2.97 V to 16 V when VCC is directly connected to BIAS. BIAS pin operating range is from 3.5 V to 60

V when VCC is supplied from the internal VCC regulator. (3) This pin voltage should be less than V (4) High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.

(2)

(3)

(4)

+ 0.3 V.

BIAS

(1)

MIN NOM MAX UNIT

2.97 60 V

2.97 16 V

–40 150 °C

8.4 Thermal Information

LM5156x-Q1

THERMAL METRIC

θJA

θJC(top)

θJB

θJC(bot)

Junction-to-ambient thermal resistance (LM5156EVM-BST) 33.2 °C/W Junction-to-ambient thermal resistance 58.2 °C/W Junction-to-case (top) thermal resistance 60.5 °C/W Junction-to-board thermal resistance 27.2 °C/W Junction-to-top characterization parameter (LM5156EVM-BST) 0.9 °C/W Junction-to-top characterization parameter 1.8 °C/W Junction-to-board characterization parameter (LM5156EVM-BST) 14.5 °C/W Junction-to-board characterization parameter 27.2 °C/W Junction-to-case (bottom) thermal resistance 4.7 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

(1)

UNITDSS(WSON)

12 PINS

8.5 Electrical Characteristics

Typical values correspond to TJ= 25°C. Minimum and maximum limits apply over TJ= -40°C to 125°C. Unless otherwise stated, V

SUPPLY CURRENT

SHUTDOWN(BIAS)

OPERATING(BIAS)

VCC REGULATOR

VCC-REG

VCC-UVLO(RISING)

VCC-CL

ENABLE

EN(RISING)

EN(FALLING)

EN(HYS)

= 12V, RT= 9.09kΩ

BIAS

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

BIAS shutdown current V BIAS operating current

VCC regulation V VCC regulation V

= 12 V, V

BIAS

= 12 V, V

BIAS

, RT= 220 kΩ

REF

= 8 V, No load 6.5 6.85 7 V

BIAS

= 8 V, I

BIAS

= 0 V 2.6 5 uA

UVLO

= 2.0 V, VFB=

UVLO

= 35 mA 6.5 V

VCC

490 550 uA

VCC UVLO threshold VCC rising 2.75 2.85 2.95 V VCC UVLO hysteresis VCC falling 0.063 V VCC sourcing current limit V

BIAS

= 10 V, V

= 0 V 35 110 mA

VCC

Enable threshold EN rising 0.4 0.52 0.7 V Enable threshold EN falling 0.33 0.49 0.63 V Enable hysteresis EN falling 0.03 V

Product Folder Links: LM5156-Q1 LM51561-Q1

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SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

Electrical Characteristics (continued)

Typical values correspond to TJ= 25°C. Minimum and maximum limits apply over TJ= -40°C to 125°C. Unless otherwise stated, V

UVLO/SYNC

UVLO(RISING)

UVLO(FALLING)

UVLO(HYS)

UVLO

SPREAD SPECTRUM

DITHOFF(RISING)

DITHOFF(FALLING)

DITHOFF(HYS)

PULSE WIDTH MODULATION

fsw1 Switching frequency RT= 220 kΩ, V fsw2 Switching frequency RT= 9.09 kΩ, V t

ON(MIN)

MAX1

MAX2

CURRENT SENSE

SLOPE

CLTH

HICCUP MODE PROTECTION (LM51561)

ERROR AMPLIFIER

REF

Gm Transconductance 2 mA/V

OVP

OVTH

PGOOD

UVTH

MOSFET DRIVER

THERMAL SHUTDOWN

TSD

= 12V, RT= 9.09kΩ

BIAS

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

UVLO / SYNC threshold UVLO rising 1.425 1.5 1.575 V UVLO / SYNC threshold UVLO falling 1.370 1.45 1.520 V UVLO / SYNC threshold

hysteresis UVLO hysteresis current V

Clock dithering threshold DITHOFF rising, V Clock dithering threshold DITHOFF falling, V Clock dithering threshold

hysteresis

Soft-start current 9 10 11 uA SS pull-down switch R

Minimum on-time RT= 9.09 kΩ 50 ns Maximum duty cycle limit RT= 9.09 kΩ, V Maximum duty cycle limit RT= 220 kΩ, V

Peak slope compensation current RT= 220 kΩ 22.5 30 37.5 uA Current Limit threshold (CS-

GND)

Hiccup enable cycles 64 Cycles Hiccup timer reset cycles 8 Cycles

FB reference LM5156, LM51561 0.99 1 1.01 V

COMP sourcing current V COMP clamp voltage COMP rising (V COMP clamp voltage COMP falling 1 1.1 V

Over-voltage threshold FB rising (referece to V Over-voltage threshold FB falling (referece to V

PGOOD pull-down switch R Under-voltage threshold FB falling (referece to V Under-voltage threshold FB rising (referece to V

High-state voltage drop 100 mA sinking 0.25 V Low-state voltage drop 100 mA sourcing 0.15 V

Thermal shutdown threshold Temperature rising 175 °C Thermal shutdown hysteresis 15 °C

DSON

UVLO falling 0.05 V

= 1.6 V 4 5 6 uA

UVLO

= 4 V 1.1 1.7 2.1 V

BIAS

= 4 V 0.6 1.2 1.8 V

BIAS

DITHOFF falling, V

= 4 V 0.5 V

BIAS

55 Ω

= 4 V 85 100 115 kHz

BIAS

= 4 V 1980 2200 2420 kHz

BIAS

= 4 V 80 85 90 %

BIAS

= 4 V 90 93 96 %

BIAS

93 100 107 mV

= 1.2V 180 uA

COMP

= 2.0 V) 2.5 2.8 V

UVLO

) 107 110 113 %

REF

) 105 %

REF

1 mA sinking 90 Ω

DSON

) 87 90 93 %

REF

) 95 %

REF

Product Folder Links: LM5156-Q1 LM51561-Q1

Duty Cycle (%)

Peak Inductor Current in Current Limit (A)

0 10 20 30 40 50 60 70 80 90 100

FSW=440kHz, RS=6m:, LM=1.2PH, V

LOAD

=10V

D005

RSL=0: RSL=1k:

Temperature (qC)

Current Limit Threshold (mV)

-40 -20 0 20 40 60 80 100 120 140 160

100

101

102

103

104

105

D006

VCC

(mA)

VCC

(V)

0 20 40 60 80 100 120

D003

BIAS

(V)

Voltage (V)

0 2 4 6 8 10 12

D004

BIAS VCC

RT Resistor (k:)

Frequency (kHz)

910 20 30 40 50 60 70 100 200 250

200

400

600

800

1000

1200

1400

1600

1800

2000

2200

2400

D001D001

Temperature (qC)

Frequency, RT=220k: (kHz)

Frequency, RT=9.09k: (kHz)

-40 -20 0 20 40 60 80 100 120 140 160

90 2000

92 2040

94 2080

96 2120

98 2160

100 2200

102 2240

104 2280

106 2320

108 2360

110 2400

RT=9.09kOhm

RT=220kOhm

D002

RT=220k: RT=9.09k:

LM5156-Q1,LM51561-Q1

SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

8.6 Typical Characteristics

Figure 1. Frequency vs RT Resistance Figure 2. Frequency vs Temperature

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Figure 3. V

VCC

vs I

Figure 5. Peak Current Limit vs Duty Cycle Figure 6. Current Limit Threshold vs Temperature

VCC

Product Folder Links: LM5156-Q1 LM51561-Q1

Figure 4. V

VCC

vs V

BIAS

(No Load)

Temperature (qC)

BIAS Shutdown Current (PA)

-40 -20 0 20 40 60 80 100 120 140 160

2.4

2.6

2.8

3.2

3.4

3.6

3.8

4.2

4.4

4.6

D011

BIAS=12V BIAS=45V

Frequency (kHz)

Minimum On-Time (ns)

0 250 500 750 1000 1250 1500 1750 2000 2250 2500

100

120

140

160

180

200

D012

BIAS

(V)

BIAS Operating Current (PA)

5 10 15 20 25 30 35 40 45 50 55 60

470

480

490

500

510

520

530

D009

VFB=V

REF

, RT=221k:, V

VCC

=7V, COMP=1.75V

VBIAS (V)

BIAS Shutdown Current (PA)

0 5 10 15 20 25 30 35 40 45 50 55 60

0.5

1.5

2.5

3.5

4.5

D010

Temperature (qC)

FB Reference (V)

-40 -20 0 20 40 60 80 100 120 140 160

0.99

0.992

0.994

0.996

0.998

1.002

1.004

1.006

1.008

1.01

D007D007D007

Temperature (qC)

EN Threshold (V)

-40 -20 0 20 40 60 80 100 120 140 160

0.43

0.44

0.45

0.46

0.47

0.48

0.49

0.5

0.51

0.52

0.53

0.54

0.55

0.56

D008

EN Falling EN Rising

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Typical Characteristics (continued)

Figure 7. FB Reference vs Temperature Figure 8. EN Threshold vs Temperature

LM5156-Q1,LM51561-Q1

SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

Figure 9. I

OPERATING(BIAS)

Figure 11. I

Including RT Current vs V

SHUTDOWN

BIAS

Figure 10. I

vs Temperature Figure 12. t

Product Folder Links: LM5156-Q1 LM51561-Q1

SHUTDOWN(BIAS)

vs Frequency

ON(MIN)

vs V

BIAS

Temperature (qC)

UVLO Threshold (V)

-40 -20 0 20 40 60 80 100 120 140 160

1.4

1.42

1.44

1.46

1.48

1.5

1.52

1.54

1.56

D015

UVLO rising UVLO falling

Frequency (kHz)

Maximum Duty Cycle Limit (%)

0 250 500 750 1000 1250 1500 1750 2000 2250

D016

Temperature (qC)

Soft-Start Current (PA)

-40 -20 0 20 40 60 80 100 120 140 160

9.2

9.4

9.6

9.8

10.2

10.4

10.6

10.8

D013

VCC

(V)

Peak Driver Current (A)

2 4 6 8 10 12 14 16

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

D014

Isource (A) Isink (A)

LM5156-Q1,LM51561-Q1

SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

Typical Characteristics (continued)

Figure 13. ISSvs Temperature Figure 14. Peak Driver Current vs VCC

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Figure 15. UVLO Threshold vs Temperature Figure 16. Maximum Duty Cycle vs Frequency

Product Folder Links: LM5156-Q1 LM51561-Q1

BIAS

VCC

PGOOD

LOAD

SUPPLY

OVTH

UVTH

VCC

Regulator

BIAS

VCC_EN

VCC

UVLO

VCC_OK

OUT

LOAD

SLOPE

GATE

CS1

CS2

S Q

Clock

Generator

GND

Clock_Sync

CS1

CSTH

CS2

PWM Comparator

C/L Comparator

COMP

REF

Optional

Hiccup Mode

UVLO

UVLO/ SYNC

VCC_EN

SYNC

Detector

Clock_Sync

TSD

VCC_OK

RUN

SUPPLY

UVLO

UVLOT

UVLOB

FBT

FBB

VCC

OVP

COMP

OVP

TSD

DITHOFF

LM5156-Q1,LM51561-Q1

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9 Detailed Description

9.1 Overview

The LM5156x-Q1 device is a wide input range, non-synchronous boost controller that uses peak-current-mode control. The device can be used in boost, SEPIC, and flyback topologies.

The device can start up from a 1-cell battery with a minimum of 2.97 V if the BIAS pin is connected to the VCC pin. It can operate with the input supply voltage as low as 1.5 V if the BIAS pin is greater than 3.5 V. The internal VCC regulator also supports BIAS pin operation up to 60 V (65-V absolute maximum) for automotive load dump. The switching frequency is dynamically programmable with an external resistor from 100 kHz to 2.2 MHz. Switching at 2.2 MHz minimizes AM band interference and allows for a small solution size and fast transient response. To reduce the EMI of the power supply, the device provides an optional dual random spread spectrum, which reduces the EMI over the wide frequency span.

The device features a 1.5-A standard MOSFET driver and a low 100-mV current limit threshold. The device also supports the use of an external VCC supply to improve efficiency. Low operating current and pulse skipping operation improve efficiency at light loads.

The device has built-in protection features such as cycle-by-cycle current limit, overvoltage protection, line UVLO, and thermal shutdown. Hiccup mode overload protection is available in the LM51561-Q1 device option. Additional features include low shutdown IQ, programmable soft start, programmable slope compensation, precision reference, power good indicator, and external clock synchronization.

9.2 Functional Block Diagram

Product Folder Links: LM5156-Q1 LM51561-Q1

UVLO

UVLO/

SYNC

VCC_EN

SUPPLY

UVLO

UVLOT

UVLOB

RUN

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SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

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9.3 Feature Description

9.3.1 Line Undervoltage Lockout (UVLO/SYNC/EN pin)

The device has a dual-level UVLO circuit. During power-on, if the BIAS pin voltage is greater than 2.7 V, and the UVLO pin voltage is in between the enable threshold (VEN) and the UVLO threshold (V (see the Clock Synchronization (UVLO/SYNC/EN Pin) section for more details), the device starts up and an internal configuration starts. The device typically requires a 65-µs internal start-up delay before entering standby mode. In standby mode, the VCC regulator and RT regulator are operational, SS pin is grounded, and there is no switching at the GATE output.

Figure 17. Line UVLO and Enable

) for more than 1.5 µs

UVLO

When the UVLO pin voltage is above the UVLO threshold, the device enters run mode. In the run mode, a softstart sequence starts if the VCC voltage is greater than 4.5 V, or 50 µs after the VCC voltage exceeds the 2.85-V VCC UV threshold (V

VCC-UVLO

), whichever comes first. UVLO hysteresis is accomplished with an internal 50-mV voltage hysteresis and an additional 5-μA current source that is switched on or off. When the UVLO pin voltage exceeds the UVLO threshold, the current source is enabled to quickly raise the voltage at the UVLO pin. When the UVLO pin voltage falls below the UVLO threshold, the current source is disabled, causing the voltage at the UVLO pin to fall quickly. When the UVLO pin voltage is less than the enable threshold (VEN), the device enters shutdown mode after a 35-µs (typical) delay with all functions disabled.

Product Folder Links: LM5156-Q1 LM51561-Q1

BIAS

= V

SUPPLY

UVLO

VCC

GATE

2.7 V

0.52 V

2.85 V

50-µs

VCC UV delay

1.5 V

1 V

SS 1 V=V

LOAD(TARGET)

LOAD

Shutdown

Standby

4.5 V

UVLO should be greater than

0.55 V more than 1.5µs to start-up

1.5 µs

65-µs (typical)

internal start-up delay

SS is grounded

with 2 cycles

delay

> 35 µs

LOAD

65-µs (typical)

internal start-up delay

UVLO

VCC

LOAD

GATE

2.7 V

0.55 V

2.85 V

50-µs

VCC UV delay

1.5 V

1 V

SS 1 V

LOAD(TARGET)

LOAD

Shutdown

Standby

4.5 V

UVLO should be greater than

0.55 V more than 1.5 µs to start-up

1.5 µs

> 3 cycles

SS is grounded

with 2 cycles

delay

65-µs (typical)

internal start-up delay

BIAS

= V

SUPPLY

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Feature Description (continued)

LM5156-Q1,LM51561-Q1

SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

Figure 18. Boost Start-Up Waveforms

Case 1: Start-Up by 2.85-V VCC UVLO, UVLO Toggle After Start-Up

Figure 19. Boost Start-Up Waveforms

Case2: Start-Up When VCC > 4.5 V, EN Toggle After Start-Up

Product Folder Links: LM5156-Q1 LM51561-Q1

SUPPLY

UVLOT

UVLOB

UVLOS

UVLO

UVLO/SYNC

UVLO

RUN

UVLO(RISING) UVLOT

UVLOB

SUPPLY(ON) UVLO(RISING)

V R

V V



UVLO(FALLING)

SUPPLY(ON) SUPPLY(OFF)

UVLO(RISING)

UVLOT

UVLO

V V

u 

LM5156-Q1,LM51561-Q1

SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

www.ti.com

Feature Description (continued)

The external UVLO resistor divider must be designed so that the voltage at the UVLO pin is greater than 1.5 V (typical) when the input voltage is in the desired operating range. The values of R calculated as shown in Equation 1 and Equation 2.

where

• V

SUPPLY(ON)

• V

SUPPLY(OFF)

UVLO capacitor (C

is the desired start-up voltage of the converter.

is the desired turnoff voltage of the converter. (1)

) is required in case the input voltage drops below V

UVLO

SUPPLY(OFF)

up or during a severe load transient at the low input voltage. If the required UVLO capacitor is large, an additional series UVLO resistor (R

) can be used to quickly raise the voltage at the UVLO pin when the 5-μA

UVLOS

hysteresis current turns on.

UVLOT

and R

UVLOB

can be

momentarily during start-

(2)

Figure 20. Line UVLO Using Three UVLO Resistors

Do not leave the UVLO pin floating. Connect to the BIAS pin if not used.

9.3.2 High Voltage VCC Regulator (BIAS, VCC Pin)

The device has an internal wide input VCC regulator which is sourced from the BIAS pin. The wide input VCC regulator allows the BIAS pin to be connected directly to supply voltages from 3.5 V to 60 V.

The VCC regulator turns on when the device is in the standby or run mode. When the BIAS pin voltage is below the VCC regulation target, the VCC output tracks the BIAS with a small dropout voltage. When the BIAS pin voltage is greater than the VCC regulation target, the VCC regulator provides 6.85-V supply for the N-channel MOSFET driver.

The VCC regulator sources current into the capacitor connected to the VCC pin with a minimum of 35-mA capability. The recommended VCC capacitor value is from 1 µF to 4.7 µF.

The device supports a wide input range from 3.5 V to 60 V in normal configuration. By connecting the BIAS pin directly to the VCC pin, the device supports inputs from 2.97 V to 16 V. This configuration is recommended when the device starts up from a 1-cell battery.

Product Folder Links: LM5156-Q1 LM51561-Q1

BIAS

VCC

GATE

GND

COMP

PGOOD

DITHOFF

UVLO/SYNC

LOAD

SUPPLY

LOAD

UVLO > V

UVLO(RISING)

BIAS

VCC

GATE

GND

COMP

PGOOD

DITHOFF

UVLO/SYNC

LOAD

SUPPLY

(2.97V  16V)

LM5156-Q1,LM51561-Q1

www.ti.com

SNVSBI7A –JANUARY 2020–REVISED JUNE 2020

Feature Description (continued)

Figure 21. 2.97-V Start-Up (BIAS = VCC)

The minimum supply voltage after start-up can be further decreased by supplying the BIAS pin from the boost converter output or from an external power supply as shown in Figure 22.

Figure 22. Decrease the Minimum Operating Voltage After Start-Up

In flyback topology, the internal power dissipation of the device can be decreased by supplying the VCC using an additional transformer winding. In this configuration, the external VCC supply voltage must be greater than the VCC regulation target (V

VCC-REG

), and the BIAS pin voltage must be greater the VCC voltage because the VCC

regulator includes a diode between VCC and BIAS.

Product Folder Links: LM5156-Q1 LM51561-Q1

+ 34 hidden pages

Texas Instruments LM5156-Q1, LM51561-Q1 Datasheet

1 Features

2 Applications

3 Description

Table of Contents

4 Revision History

5 Description (continued)

6 Device Comparison Table

7 Pin Configuration and Functions

8 Specifications

8.1 Absolute Maximum Ratings

8.2 ESD Ratings

8.3 Recommended Operating Conditions

8.4 Thermal Information

8.5 Electrical Characteristics

8.6 Typical Characteristics

9 Detailed Description

9.1 Overview

9.2 Functional Block Diagram

9.3 Feature Description

9.3.1 Line Undervoltage Lockout (UVLO/SYNC/EN pin)

9.3.2 High Voltage VCC Regulator (BIAS, VCC Pin)