LM3674 2MHz, 600mA Step-Down DC-DC Converter in SOT-23
Check for Samples: LM3674
1
FEATURES
2
•600mA Max Load Current
•Input Voltage Range from 2.7V to 5.5V
•Available in Fixed and Adjustable Output
Voltages Ranging from 1.0V to 3.3V
•Operates from a Single Li-Ion Cell Battery
•Internal Synchronous Rectification for High
Efficiency
•Internal Soft Start
•0.01 µA Typical Shutdown Current
•2 MHz PWM Fixed Switching Frequency (typ)
•5-Pin SOT-23 Package
•Current Overload Protection and Thermal
Shutdown Protection
APPLICATIONS
•Mobile Phones
•PDAs
•MP3 Players
•Portable Instruments
•W-LAN
•Digital Still Cameras
•Portable Hard Disk Drives
SNVS405F –DECEMBER 2005–REVISED MAY 2013
DESCRIPTION
TheLM3674step-downDC-DCconverteris
optimized for powering low voltage circuits from a
single Li-Ion cell battery and input voltage rails from
2.7V to 5.5V. It provides up to 600mA load current,
over the entire input voltage range. There are several
fixed output voltages and adjustable output voltage
versions.
The device offers superior features and performance
for mobile phones and similar portable systems.
During PWM mode, the device operates at a fixedfrequency of 2 MHz (typ). Internal synchronous
rectification provides high efficiency during Pulse
WidthModulation(PWM)modeoperation.In
shutdown mode, the device turns off and reduces
battery consumption to 0.01 µA (typ).
The LM3674 is available in a 5-pin SOT-23 package
in leaded (PB) and lead-free (NO PB) versions. A
high switching frequency of 2 MHz (typ) allows use of
only three tiny external surface-mount components,
an inductor and two ceramic capacitors.
TYPICAL APPLICATION CIRCUITS
Figure 1. Typical Application Circuit
1
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Power supply input. Connect to the input filter capacitor ( Figure 1).
Enable input. The device is in shutdown mode when voltage to this pin is <0.4V and enable when
>1.0V. Do not leave this pin floating.
Feedback analog input. Connect to the output filter capacitor for fixed voltage versions. For adjustable
the adjustable version.
Product Folder Links: LM3674
LM3674
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
VINPin: Voltage to GND−0.2V to 6.0V
EN, FB, SW Pin:(GND−0.2V) to
(VIN+ 0.2V)
Continuous Power Dissipation
Junction Temperature (T
(3)
)+125°C
J-MAX
Internally Limited
Storage Temperature Range−65°C to +150°C
Maximum Lead Temperature260°C
(Soldering, 10 sec.)
ESD Rating
(4)
2 kV
Human Body model: All Pins
Machine Model: All Pins200V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings may not imply performance limits. For performance limits and associated
test conditions, see the Electrical Characteristics tables.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) In Applications where high power dissipation and /or poor package resistance is present, the maximum ambient temperature may have
to be derated. Maximum ambient temperature (T
maximum power dissipation of the device in the application (P
in the application, as given by the following equation: T
at different ambient temperatures.
) is dependent on the maximum operating junction temperature (T
A-MAX
A-MAX
) and the junction to ambient thermal resistance of the package (θJA)
D-MAX
= T
J-MAX
- (θJAx P
). Refer to Dissipation ration table for P
D-MAX
J-MAX
D-MAX
), the
values
(4) The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin (MIL-STD-883 3015.7). National Semiconductor recommends that all intergrated circuits be
handled with appropriate precautions. Failure to observe proper ESD handling techniques can result in damage.
(4)
(1)(2)(3)
2.7V to 5.5V
Operating Ratings
Input Voltage Range
Recommended Load Current0A to 600 mA
Junction Temperature (TJ) Range−30°C to +125°C
Ambient Temperature (TA) Range−30°C to +85°C
(1) In Applications where high power dissipation and /or poor package resistance is present, the maximum ambient temperature may have
to be derated. Maximum ambient temperature (T
maximum power dissipation of the device in the application (P
in the application, as given by the following equation: T
at different ambient temperatures.
) is dependent on the maximum operating junction temperature (T
A-MAX
A-MAX
) and the junction to ambient thermal resistance of the package (θJA)
D-MAX
= T
J-MAX
- (θJAx P
). Refer to Dissipation ration table for P
D-MAX
J-MAX
D-MAX
), the
values
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings may not imply performance limits. For performance limits and associated
test conditions, see the Electrical Characteristics tables.
(3) All voltages are with respect to the potential at the GND pin.
(4) Input voltage range recommended for ideal applications performance for the specified output voltages are given below
VIN= 2.7V to 5.5V for 1.0V ≤ V
VIN= ( V
OUT
+ V
DROP OUT
Thermal Properties
) to 5.5V for 1.8 ≤ V
(1)
OUT
< 1.8V
≤ 3.3V Where V
OUT
DROP OUT
= I
LOAD
* (R
DSON (P)
+ R
INDUCTOR
)
over operating free-air temperature range (unless otherwise noted)
Junction-to-Ambient Thermal Resistance (θJA) (SOT-23) for a 2 layer board
Junction-to-Ambient Thermal Resistance (θJA) (SOT-23) for a 4 layer board
(1) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ= 150°C (typ.) and
disengages at TJ= 130°C
(2) Junction to ambient thermal resistance (θJA) is highly application and board layout dependent. In applications where high power
dissipation exists, special care must be given to thermal dissipation issues in board design. Value specified here 250°C/W is based on
measurement results using a 2 layer, 4" X 3", 2 oz. Cu board as per JEDEC standards. The θJAis 130°C/W if a 4 layer, 4" X 3", 2/1/1/2
Limits in standard typeface are for TJ= 25°C. Limits in boldface type apply over the full operating junction temperature range
(−30°C ≤ TJ≤ 125°C). Unless otherwise noted, specifications apply to the LM3674 with VIN= EN = 3.6V
ParameterTest ConditionMinTypMaxUnits
V
FB
Feedback Voltage
Line Regulation2.7V ≤ VIN≤ 5.5V0.083%/V
Load Regulation100 mA ≤ IO≤ 600 mA0.0010%/mA
V
REF
I
SHDN
I
Q
R
DSON (P)
R
DSON (N)
I
LIM
V
IH
V
IL
I
EN
F
OSC
Internal Reference VoltageSee
Shutdown Supply CurrentEN = 0V0.011µA
DC Bias Current into V
Pin-Pin Resistance for PFETISW= 200mA380500mΩ
Pin-Pin Resistance for NFETISW= 200mA250400mΩ
Switch Peak Current LimitOpen Loop
Logic High Input1.0V
Logic Low Input0.4V
Enable (EN) Input Current0.011µA
Internal Oscillator FrequencyPWM Mode1.622.6MHz
(1) All voltages are with respect to the potential at the GND pin.
(2) Min and Max limits are specified by design, test or statistical analysis. Typical numbers represent the most likely norm.
(3) The parameters in the electrical characteristic table are tested at VIN= 3.6V unless otherwise specified. For performance over the input
voltage range refer to datasheet curves.
(4) ADJ configured to 1.5V output.
(5) For V
(6) For the ADJ version the resistor dividers should be selected such that at the desired output voltage, the voltage at the FB pin is 0.5V.
less than 2.5V, VIN= 3.6V, for V
OUT
(7) Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Electrical Characteristic
table reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Closed
loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops
by 10%.
(4)(5)
IO= 10mA-4+4%
IO= 100 mA
VIN= 3.6V
(6)
IN
No load, device is not switching300600µA
(FB=0V)
(7)
greater than or equal to 2.5V, VIN= V
OUT
OUT
83010201200mA
+1.
0.5V
Dissipation Rating
over operating free-air temperature range (unless otherwise noted)
The LM3674, a high efficiency step down DC-DC switching buck converter, delivers a constant voltage from a
single Li-Ion battery and input voltage rails from 2.7V to 5.5V to portable devices such as cell phones and PDAs.
Using a voltage mode architecture with synchronous rectification, the LM3674 has the ability to deliver up to 600
mA depending on the input voltage, output voltage, ambient temperature and the inductor chosen.
There are two modes of operation depending on the current required - Pulse Width Modulation (PWM), and
shutdown. The device operates in PWM throughout the I
the lowest current consumption (I
SHUTDOWN
= 0.01 µA typ).
range. Shutdown mode turns off the device, offering
OUT
Additional features include soft-start, under voltage protection, current overload protection, and thermal overload
protection. As shown in Figure 1, only three external power components are required for implementation.
The part uses an internal reference voltage of 0.5V. It is recommended to keep the part in shutdown until the
input voltage is 2.7V or higher.
CIRCUIT OPERATION
During the first portion of each switching cycle, the control block in the LM3674 turns on the internal PFET
switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The
inductor limits the current to a ramp with a slope of:
(1)
by storing energy in a magnetic field. During the second portion of each cycle, the controller turns the PFET
switch off, blocking current flow from the input, and then turns the NFET synchronous rectifier on. The inductor
draws current from ground through the NFET to the output filter capacitor and load, which ramps the inductor
current down with a slope of:
(2)
The output filter stores charge when the inductor current is high, and releases it when the inductor current is low,
smoothing the voltage across the load.
The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the
load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and
synchronous rectifier at the SW pin to a low-pass filter formed by the inductor and output filter capacitor. The
output voltage is equal to the average voltage at the SW pin.
PWM OPERATION
During Pulse Width Modulation (PWM) operation the converter operates as a voltage-mode controller with input
voltage feed forward. This allows the converter to achieve excellent load and line regulation. The DC gain of the
power stage is proportional to the input voltage. To eliminate this dependence, feed forward inversely
proportional to the input voltage is introduced.
While in PWM mode, the output voltage is regulated by switching at a constant frequency and then modulating
the energy per cycle to control power to the load. At the beginning of each clock cycle the PFET switch is turned
on and the inductor current ramps up until the comparator trips and the control logic turns off the switch.
The current limit comparator can also turn off the switch in case the current limit of the PFET is exceeded. Then
the NFET switch is turned on and the inductor current ramps down. The next cycle is initiated by the clock
turning off the NFET and turning on the PFET.
While in PWM mode, the LM3674 uses an internal NFET as a synchronous rectifier to reduce rectifier forward
voltage drop and associated power loss. Synchronous rectification provides a significant improvement in
efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier
diode.
Current Limiting
A current limit feature allows the LM3674 to protect itself and external components during overload conditions.
PWM mode implements current limiting using an internal comparator that trips at 1020 mA (typ). If the output is
shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration
until the inductor current falls below a low threshold, ensuring inductor current has more time to decay, thereby
preventing runaway.
SOFT-START
The LM3674 has a soft-start circuit that limits in-rush current during start-up. During start-up the switch current
limit is increased in steps. Soft start is activated only if EN goes from logic low to logic high after Vin reaches
2.7V. Soft start is implemented by increasing switch current limit in steps of 70mA, 140mA, 280mA, and 1020mA
(typ. switch current limit). The start-up time thereby depends on the output capacitor and load current demanded
at start-up. Typical start-up times with 10µF output capacitor and 300mA load current is 350µs and with 10mA
load current is 240µs.
LDO - LOW DROP OUT OPERATION
The LM3674-ADJ can operate at 100% duty cycle (no switching, PMOS switch completely on) for low drop out
support of the output voltage. In this way the output voltage will be controlled down to the lowest possible input
voltage. When the device operates near 100% duty cycle, the output voltage supply ripple is slightly higher,
approximately 25mV.
The minimum input voltage needed to support the output voltage is:
V
= I
I
LOAD
R
DSON (P)
R
INDUCTOR
IN,MIN
LOAD
* (R
DSON (P)
+ R
INDUCTOR
Load current
Drain to source resistance of PFET switch in the triode region
Inductor resistance
) + V
OUT
(3)
APPLICATION INFORMATION
OUTPUT VOLTAGE SELECTION FOR ADJUSTABLE (LM3674-ADJ)
to FB then to GND. V
will be adjusted to make FB equal to 0.5V. The resistor from FB to GND (R2) should be
OUT
200 kΩ to keep the current drawn through this network small but large enough that it is not susceptible to noise.
If R2is 200KΩ, and given the VFBis 0.5V, then the current through the resistor feedback network will be 2.5µA.
The output voltage of the adjustable parts can be programmed through the resistor network connected from V
•R2= Resistor from FB to GND (Ω)
For any output voltage greater than or equal to 1.0V a frequency zero must be added at 45KHz for stability. The
formula is:
(5)
For output voltages greater than or equal to 2.5V, a pole must also be placed at 45KHz as well. If the pole and
zero are at the same frequency the formula for calculation of C2 is:
(6)
The formula for location of zero and pole frequency created by adding C1,C2 are given below. It can be seen
that by adding C1, a zero as well as a higher frequency pole is introduced.
(7)
See the LM3674-ADJ Configurations for Various V
table. Table 1
OUT
Table 1. Adjustable LM3674 Configurations for Various V
There are two main considerations when choosing an inductor: the inductor should not saturate, and the inductor
current ripple should be small enough to achieve the desired output voltage ripple. Different saturation current
rating specifications are followed by different manufacturers so attention must be given to details. Saturation
current ratings are typically specified at 25°C. However, ratings at the maximum ambient temperature of
application should be requested from the manufacturer. The minimum value of inductance to ensure good
performance is 1.76µH at I
(typ) dc current over the ambient temperature range. Shielded inductors
LIM
radiate less noise and should be preferred.
There are two methods to choose the inductor saturation current rating.
Method 1:
The saturation current is greater than the sum of the maximum load current and the worst case average to peak
inductor current. This can be written as:
•L: min inductor value including worst case tolerances (30% drop can be considered for method 1)
•f: minimum switching frequency (1.6 MHz)
•V
: output voltage
OUT
Method 2:
A more conservative and recommended approach is to choose an inductor that has saturation current rating
greater than the max current limit of 1200 mA.
A 2.2 µH inductor with a saturation current rating of at least 1200 mA is recommended for most applications. The
inductor’s resistance should be less than around 0.3Ω for good efficiency. Table 2 lists suggested inductors and
suppliers. For low-cost applications, an unshielded bobbin inductor is suggested. For noise critical applications, a
toroidal or shielded-bobbin inductor should be used. A good practice is to lay out the board with overlapping
footprints of both types for design flexibility. This allows substitution of a low-noise toroidal inductor, in the event
that noise from low-cost bobbin models is unacceptable.
Table 2. Suggested Inductors and Their Suppliers
ModelVendorDimensions LxWxH (mm)D.C.R (max)
DO3314-222MXCoilcraft3.3 x 3.3 x 1.4200 mΩ
LPO3310-222MXCoilcraft3.3 x 3.3 x 1.0150 mΩ
ELL5GM2R2NPanasonic5.2 x 5.2 x 1.553 mΩ
CDRH2D14NP-2R2NCSumida3.2 x 3.2 x 1.5594 mΩ
INPUT CAPACITOR SELECTION
A ceramic input capacitor of 4.7 µF, 6.3V is sufficient for most applications. Place the input capacitor as close as
possible to the VINpin of the device. A larger value may be used for improved input voltage filtering. Use X7R or
X5R types; do not use Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting
case sizes like 0805 and 0603. The minimum input capacitance to ensure good performance is 2.2µF at 3Vdc bias; 1.5µF at 5V dc bias including tolerances and over ambient temperature range. The input filter
capacitor supplies current to the PFET switch of the LM3674 in the first half of each cycle and reduces voltage
ripple imposed on the input power source. A ceramic capacitor’s low ESR provides the best noise filtering of the
input voltage spikes due to this rapidly changing current. Select a capacitor with sufficient ripple current rating.
The input current ripple can be calculated as:
(10)
OUTPUT CAPACITOR SELECTION
A ceramic output capacitor of 10 µF, 6.3V is sufficient for most applications. Use X7R or X5R types; do not use
Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0805 and
0603. DC bias characteristics vary from manufacturer to manufacturer and dc bias curves should be requested
from them as part of the capacitor selection process.
The minimum output capacitance to ensure good performance is 5.75µF at 1.8V dc bias including
tolerances and over ambient temperature range. The output filter capacitor smoothes out current flow from
the inductor to the load, helps maintain a steady output voltage during transient load changes and reduces
output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR to
perform these functions.
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance
of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss
in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or
instability.
Figure 22. Board Layout Design Rules for the LM3674
Good layout for the LM3674 can be implemented by following a few simple design rules, as illustrated in .
1. Place the LM3674, inductor and filter capacitors close together and make the traces short. The traces
between these components carry relatively high switching currents and act as antennas. Following this rule
reduces radiated noise. Special care must by given to place the input filter capacitor very close to the VINand
GND pin.
2. Arrange the components so that the switching current loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor, through the LM3674 and inductor to the output filter
capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled
up from ground, through the LM3674 by the inductor, to the output filter capacitor and then back through
ground, forming a second current loop. Routing these loops so the current curls in the same direction
prevents magnetic field reversal between the two half-cycles and reduces radiated noise.
3. Connect the ground pins of the LM3674, and filter capacitors together using generous component-side
copper fill as a pseudo-ground plane. Then, connect this to the ground-plane (if one is used) with several
vias. This reduces ground-plane noise by preventing the switching currents from circulating through the
ground plane. It also reduces ground bounce at the LM3674 by giving it a low-impedance ground connection.
4. Use wide traces between the power components and for power connections to the DC-DC converter circuit.
This reduces voltage errors caused by resistive losses across the traces.
5. Route noise sensitive traces, such as the voltage feedback path, away from noisy traces between the powercomponents. The voltage feedback trace must remain close to the LM3674 circuit and should be direct but
should be routed opposite to noisy components. This reduces EMI radiated onto the DC-DC converter’s own
voltage feedback trace. A good approach is to route the feedback trace on another layer and to have a
ground plane between the top layer and layer on which the feedback trace is routed. In the same manner for
the adjustable part it is desired to have the feedback dividers on the bottom layer.
6. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocksand other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced through
distance.
In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board,
arrange the CMOS digital circuitry around it (since this also generates noise), and then place sensitive
preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a
metal pan and power to it is post-regulated to reduce conducted noise, using low-dropout linear regulators.
Changes from Revision E (April 2013) to Revision FPage
•Changed layout of National Data Sheet to TI format .......................................................................................................... 15
LM3674MFX-2.8ACTIVESOT-23DBV53000TBDCall TICall TI-30 to 85SLZB
LM3674MFX-2.8/NOPBACTIVESOT-23DBV53000Green (RoHS
LM3674MFX-ADJACTIVESOT-23DBV53000TBDCall TICall TI-30 to 85SLTB
LM3674MFX-ADJ/NOPBACTIVESOT-23DBV53000Green (RoHS
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Package Type Package
(1)
Drawing
Pins Package
Qty
Eco Plan
(2)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
Lead/Ball FinishMSL Peak Temp
(3)
CU SNLevel-1-260C-UNLIM-30 to 85SNNB
CU SNLevel-1-260C-UNLIM-30 to 85SLZB
CU SNLevel-1-260C-UNLIM-30 to 85SLTB
Op Temp (°C)Top-Side Markings
(4)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
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