Texas Instruments JM38510-65706BEA, SN54HC365J, SN74HC365D, SN74HC365DR, SN74HC365N Datasheet
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SN54HC365, SN74HC365
HEX BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS308B – JANUARY 1996 – REVISED MA Y 1997
D
High-Current 3-State Outputs Drive Bus
Lines, Buffer Memory Address Registers,
or Drive up to 15 LSTTL Loads
D
True Outputs
D
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
These hex buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. The ’HC365 contain six independent
buffers/drivers with dual-gated output-enable
(OE1
and OE2) inputs. When OE1 and OE2 are
both low, the device passes noninverted data from
the A inputs to the Y outputs. If either (or both)
output-enable terminal(s) is high, the outputs are
in the high-impedance state.
The SN54HC365 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC365 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer/driver)
INPUTS
OE1 OE2 A
H X X Z
X HX Z
L LH H
L L L L
OUTPUT
Y
SN54HC365 ...J OR W PACKAGE
SN74HC365 . . . D OR N PACKAGE
SN54HC365 . . . FK PACKAGE
Y1
A2
NC
Y2
A3
NC – No internal connection
(TOP VIEW)
OE1
1
A1
2
Y1
3
A2
4
5
Y2
6
A3
7
Y3
GND
8
(TOP VIEW)
A1
3212019
4
5
6
7
8
910111213
Y3
OE1
GND
NC
NC
16
15
14
13
12
11
10
9
V
Y4
CC
V
CC
OE2
A6
Y6
A5
Y5
A4
Y4
OE2
18
17
16
15
14
A4
A6
Y6
NC
A5
Y5
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
SN54HC365, SN74HC365
HEX BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS308B – JANUARY 1996 – REVISED MA Y 1997
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
†
OE1
OE2
A1
A2
A3
A4
A5
A6
1
15
2
4
6
10
12
14
&
EN
logic diagram (positive logic)
OE1
OE2
1
15
23
A1
Y1
11
13
3
Y1
5
Y2
7
Y3
9
Y4
Y5
Y6
To Five Other Channels
Pin numbers shown are for the D, J, N, and W packages.
absolute maximum ratings over operating free-air temperature range
‡
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
(VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OK
Continuous output current, IO (VO = 0 to VCC) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
(see Note 2): D package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
N package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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