Datasheet INA208, INA208AIDRG4 Datasheet (Texas Instruments)

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INA20x
INA20x
INA20x
FEATURES DESCRIPTION
1
2
3
4
5
10
9
8
7
6
V
IN+
V
IN-
CMP1 OUT
CMP2 OUT
CMP1 RESET
V
S
OUT
CMP1 IN+
CMP2 IN-
GND
INA206 INA208-
MSOP-10
0.6V REF
V
IN+
V
IN-
CMP1 RESET
V
S
INA206 INA208-
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1.2V REF OUT
CMP1 OUT
CMP2 OUT
CMP2 DELAY
OUT
CMP1 IN /0.6V REF-
CMP1 IN+
CMP2 IN-
CMP2 IN+/0.6V REF
GND
SO-14, TSSOP-14
1.2V REF
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
Unidirectional Measurement
Current-Shunt Monitor with Dual Comparators
COMPLETE CURRENT SENSE SOLUTION
The INA206, INA207, and INA208 are a family of unidirectional, current-shunt monitors with voltage
DUAL COMPARATORS:
output, dual comparators, and voltage reference. The
Comparator 1 with Latch
INA206, INA207, and INA208 can sense drops
Comparator 2 with Optional Delay
across shunts at common-mode voltages from –16V
COMMON-MODE RANGE: –16V to +80V to +80V. The INA206, INA207, and INA208 are available with three output voltage scales: 20V/V,
HIGH ACCURACY: 3.5% (max) OVER TEMP
50V/V, and 100V/V, with up to 500kHz bandwidth.
BANDWIDTH: 500kHz
The INA206, INA207, and INA208 also incorporate
QUIESCENT CURRENT: 1.8mA
two open-drain comparators with internal 0.6V
PACKAGES: SO-14, TSSOP-14, MSOP-10
references. On 14-pin versions, the comparator references can be overridden by external inputs. Comparator 1 includes a latching capability, and Comparator 2 has a user-programmable delay on
NOTEBOOK COMPUTERS
14-pin versions. 14-pin versions also provide a 1.2V
CELL PHONES
reference output.
TELECOM EQUIPMENT
The INA206, INA207, and INA208 operate from a
AUTOMOTIVE
single +2.7V to +18V supply. They are specified over
POWER MANAGEMENT the extended operating temperature range of –40 ° C
BATTERY CHARGERS
to +125 ° C.
WELDING EQUIPMENT
RELATED PRODUCTS
FEATURES PRODUCT
Variant of INA206–INA208 Comparator 2 INA203–INA205 polarity
DEVICE GAIN
Current-shunt monitor with single INA200–INA202
INA206 20V/V
comparator and V
REF
INA207 50V/V
Current-shunt monitor only INA193–INA198
INA208 100V/V
Current-shunt monitor with split stages for INA270–INA271 filter options
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
(1)
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
EXTERNAL INTERNAL
COMP1 AND COMP1 AND
PACKAGE PACKAGE 1.2V COMP2 COMP2 COMP2
PRODUCT GAIN PACKAGE-LEAD DESIGNATOR MARKING REF OUT REF INPUTS 0.6V REF DELAY PIN
SO-14 D INA206A X X X X
INA206 20V/V MSOP-10 DGS BQQ X
TSSOP-14 PW INA206A X X X X
SO-14 D INA207A X X X X
INA207 50V/V MSOP-10 DGS BQR X
TSSOP-14 PW INA207A X X X X
SO-14 D INA208A X X X X
INA208 100V/V MSOP-10 DGS BQS X
TSSOP-14 PW INA208A X X X X
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com . Packages listed above but not found in the Package Option Addendum are preview packages.
INA206, INA207, INA208 UNIT
Supply Voltage, V+ 18 V
Differential (V
IN+
) – (V
IN–
) –18 to +18 V
Current-Shunt Monitor Analog Inputs, V
IN+
and V
IN–
Common-Mode –16 to +80 V Comparator Analog Input and Reset Pins GND 0.3 to (V+) + 0.3 V Analog Output, Out Pin GND 0.3 to (V+) + 0.3 V Comparator Output, Out Pin GND 0.3 to 18 V V
REF
and CMP2 Delay Pin GND 0.3 to 10 V Input Current Into Any Pin 5 mA Operating Temperature –55 to +150 ° C Storage Temperature –65 to +150 ° C Junction Temperature +150 ° C
Human Body Model (HBM) 4000 V
ESD Ratings
Charged Device Model (CDM) 500 V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported.
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ELECTRICAL CHARACTERISTICS
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
Boldface limits apply over the specified temperature range, TA= –40 ° C to +125 ° C.
At TA= +25 ° C, VS= +12V, V
IN+
= 12V, V
SENSE
= 100mV, RL= 10k to GND, R
PULL-UP
= 5.1k each connected from
CMP1 OUT and CMP2 OUT to VS, and CMP1 IN+ = 1V and CMP2 IN– = GND, unless otherwise noted.
INA206, INA207, INA208
CURRENT-SHUNT MONITOR
PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT
INPUT
Full-Scale Sense Input Voltage V
SENSE
V
SENSE
= V
IN+
– V
IN–
0.15 (VS– V
0.25)/Gain
Common-Mode Input Range V
CM
–16 80 V
Common-Mode Rejection Ratio CMRR V
IN+
= –16V to +80V 80 100 dB
over Temperature V
IN+
= +12V to +80V 100 123 dB
Offset Voltage RTI
(1)
V
OS
± 0.5 ± 2.5 mV +25 ° C to +125 ° C ± 3 mV –40 ° C to +25 ° C ± 3.5 mV
vs Temperature dV
OS
/dT –40 ° C to +125 ° C 5 μ V/ ° C
vs Power-Supply PSR V
OUT
= 2V, V
IN+
= 18V, 2.7V 2.5 100 μ V/V
Input Bias Current, V
IN–
Pin I
B
± 9 ± 16 μ A
OUTPUT (V
SENSE
20mV)
Gain: INA206 G 20 V/V Gain: INA207 50 V/V Gain: INA208 100 V/V Gain Error V
SENSE
= 20mV to 100mV ± 0.2 ± 1 %
over Temperature V
SENSE
= 20mV to 100mV ± 2 %
Total Output Error
(2)
V
SENSE
= 120mV, VS= +16V ± 0.75 ± 2.2 %
over Temperature V
SENSE
= 120mV, VS= +16V ± 3.5 %
Nonlinearity Error
(3)
V
SENSE
= 20mV to 100mV ± 0.002 %
Output Impedance R
O
1.5
Maximum Capacitive Load No Sustained Oscillation 10 nF
OUTPUT (V
SENSE
< 20mV)
(4)
INA206, INA207, INA208 –16V VCM< 0V 300 mV INA206 0V VCM≤ VS, VS= 5V 0.4 V INA207 0V VCM≤ VS, VS= 5V 1 V INA208 0V VCM≤ VS, VS= 5V 2 V INA206, INA207, INA208 VS< VCM≤ 80V 300 mV
VOLTAGE OUTPUT
(5)
Output Swing to the Positive Rail V
IN–
= 11V, V
IN+
= 12V (V+) – 0.15 (V+) – 0.25 V
Output Swing to GND
(6)
V
IN–
= 0V, V
IN+
= –0.5V (V
GND
) + 0.004 (V
GND
) + 0.05 V
FREQUENCY RESPONSE
Bandwidth: INA206 BW C
LOAD
= 5pF 500 kHz
Bandwidth: INA207 C
LOAD
= 5pF 300 kHz
Bandwidth: INA208 C
LOAD
= 5pF 200 kHz
Phase Margin C
LOAD
< 10pF 40 Degrees Slew Rate 1 V/ μ s Settling Time (1%) V
SENSE
= 10mV
PP
to 100mV
PP
, 2 μ s
C
LOAD
= 5pF
NOISE, RTI
Output Voltage Noise Density 40 nV/ Hz
(1) Offset is extrapolated from measurements of the output at 20mV and 100mV V
SENSE
. (2) Total output error includes effects of gain error and VOS. (3) Linearity is best fit to a straight line. (4) For details on this region of operation, see the Accuracy Variations as a Result of V
SENSE
and Common-Mode Voltage section in the
Applications Information .
(5) See Typical Characteristics curve Output Swing vs Output Current . (6) Specified by design.
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ELECTRICAL CHARACTERISTICS
V
THRESHOLD
Input Voltage
0.592 0.6
a) CMP1
V
THRESHOLD
Input Voltage
0.6080.6
b) CMP2
Hysteresis=V – 8mV
THRESHOLD
Hysteresis=V – 8mV
THRESHOLD
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
Boldface limits apply over the specified temperature range, TA= –40 ° C to +125 ° C.
At TA= +25 ° C, VS= +12V, V
IN+
= 12V, V
SENSE
= 100mV, RL= 10k to GND, R
PULL-UP
= 5.1k each connected from
CMP1 OUT and CMP2 OUT to VS, unless otherwise noted.
INA206, INA207, INA208
COMPARATOR PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
Offset Voltage Comparator Common-Mode Voltage = Threshold Voltage 2 mV
Offset Voltage Drift, Comparator 1 ± 2 μ V/ ° C Offset Voltage Drift, Comparator 2 +5.4 μ V/ ° C
Threshold TA= +25 ° C 590 600 610 mV
over Temperature 586 614 mV
Hysteresis
(1)
, CMP1 TA= –40 ° C to +85 ° C –8 mV
Hysteresis
(1)
, CMP2 TA= –40 ° C to +85 ° C 8 mV
INPUT BIAS CURRENT
(2)
CMP1 IN+, CMP2 IN– 0.005 10 nA
vs Temperature 15 nA
INPUT IMPEDANCE
Pins 3 and 6 (14-pin packages only) 10 k
INPUT RANGE
CMP1 IN+ and CMP2 IN– 0V to VS– 1.5V V Pins 3 and 6 (14-pin packages only)
(3)
0V to VS– 1.5V V
OUTPUT
Large-Signal Differential Voltage Gain CMP V
OUT
1V to 4V, RL≥ 15k connected to 5V 200 V/mV
High-Level Output Current VID= 0.4V, VOH= V
S
0.0001 1 μ A
Low-Level Output Voltage VID= –0.6V, IOL= 2.35mA 220 300 mV
RESPONSE TIME
(4)
Comparator 1 RLto 5V, CL= 15pF, 100mV Input Step with 5mV Overdrive 1.3 μ s Comparator 2 RLto 5V, CL= 15pF, 100mV Input Step with 5mV Overdrive, 1.3 μ s
C
DELAY
Pin Open
RESET
RESET Threshold
(5)
1.1 V Logic Input Impedance 2 M Minimum RESET Pulse Width 1.5 μ s RESET Propagation Delay 3 μ s Comparator 2 Delay Equation
(6)
C
DELAY
= tD/5 μ F
Comparator 2 Delay t
D
C
DELAY
= 0.1 μ F 0.5 s
(1) Hysteresis refers to the threshold (the threshold specification applies to a rising edge of a noninverting input) of a falling edge on the
noninverting input of the comparator. Refer to Figure 1 . (2) Specified by design. (3) See the Comparator Maximum Input Voltage Range section in the Applications Information . (4) The comparator response time specified is the interval between the input step function and the instant when the output crosses 1.4 V. (5) RESET input has an internal 2M (typical) pull-down. Leaving RESET open results in a LOW state, with transparent comparator
operation. (6) The Comparator 2 delay applies to both rising and falling edges of the comparator output.
Figure 1. Comparator Hysteresis
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ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
Boldface limits apply over the specified temperature range, TA= –40 ° C to +125 ° C.
At TA= +25 ° C, VS= +12V, V
IN+
= 12V, V
SENSE
= 100mV, RL= 10k to GND, R
PULL-UP
= 5.1k each connected from
CMP1 OUT and CMP2 OUT to VS, unless otherwise noted.
INA206, INA207, INA208
REFERENCE PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT
REFERENCE VOLTAGE
1.2V
REFOUT
Output Voltage 1.188 1.2 1.212 V
Reference Drift dV
OUT
/dT TA= –40 ° C to +85 ° C 40 100 ppm/ ° C
0.6V
REF
Output Voltage 0.6 V
(Pins 3 and 6 of 14-pin packages only)
Reference Drift dV
OUT
/dT TA= –40 ° C to +85 ° C 40 100 ppm/ ° C
LOAD REGULATION dV
OUT
/dI
LOAD
Sourcing 0mA < I
SOURCE
< 0.5mA 0.4 2 mV/mA
Sinking 0mA < I
SINK
< 0.5mA 0.4 mV/mA
LOAD CURRENT I
LOAD
1 mA
LINE REGULATION dV
OUT
/dV
S
2.7V < VS< 18V 30 μ V/V
CAPACITIVE LOAD
Reference Output Max. Capacitive Load No Sustained Oscillations 10 nF
OUTPUT IMPEDANCE
Pins 3 and 6 of 14-Pin Packages Only 10 k
Boldface limits apply over the specified temperature range, TA= –40 ° C to +125 ° C. At TA= +25 ° C, VS= +12V, V
IN+
= 12V, V
SENSE
= 100mV, RL= 10k to GND, R
PULL-UP
= 5.1k each connected from
CMP1 OUT and CMP2 OUT to VS, and CMP1 IN+ = 1V and CMP2 IN– = GND, unless otherwise noted.
INA206, INA207, INA208
GENERAL PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLY Operating Power Supply V
S
+2.7 +18 V
Quiescent Current I
Q
V
OUT
= 2V 1.8 2.2 mA
over Temperature V
SENSE
= 0mV 2.8 mA
Comparator Power-On Reset Threshold
(1)
1.5 V
TEMPERATURE
Specified Temperature Range –40 +125 ° C Operating Temperature Range –55 +150 ° C Storage Temperature Range –65 +150 ° C Thermal Resistance θ
JA
MSOP-10 Surface-Mount 200 ° C/W SO-14, TSSOP-14 Surface-Mount 150 ° C/W
(1) The INA206, INA207, and INA208 are designed to power-up with the comparator in a defined reset state as long as CMP1 RESET is
open or grounded. The comparator will be in reset as long as the power supply is below the voltage shown here. The comparator will assume a state based on the comparator input above this supply voltage. If CMP1 RESET is high at power-up, the comparator output comes up high and requires a reset to assume a low state, if appropriate.
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TYPICAL CHARACTERISTICS
45
40
35
30
25
20
15
10
5
10k 100k
Gai
n (dB)
Frequency (Hz)
1M
G = 100
C
LOAD
= 1000pF
G = 50
G=20
45
40
35
30
25
20
15
10
5
10k 100k
Gain (dB)
Frequency (Hz)
1M
G = 100
G=50
G=20
20
18
16
14
12
10
8
6
4
2
0
20 100 500400
300
200 600 700
V (V)
OUT
V (mV)
SENSE
900800
50V/V
20V/V
100V/V
140
130
120
110
100
90
80
70
60
50
40
10 100 10k
1k
Frequency (Hz)
100k
CMRR
PSR
Common --Mode and
Power--Supply Rejection (dB)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0 50 100 150 200 250
300 350
V
SENSE
(mV)
450400 500
Output Error
(% error of the ideal output value)
0.1
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
O
utput Error (% )
Common--Mode Voltage (V)
76
...
80
–8 8
–4 4
0
–12 12
–16 16 20
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
All specifications at TA= +25 ° C, VS= +12V, V
IN+
= 12V, and V
SENSE
= 100mV, unless otherwise noted.
GAIN vs FREQUENCY GAIN vs FREQUENCY
Figure 2. Figure 3.
COMMON-MODE AND POWER-SUPPLY REJECTION
GAIN PLOT vs FREQUENCY
Figure 4. Figure 5.
OUTPUT ERROR vs V
SENSE
OUTPUT ERROR vs COMMON-MODE VOLTAGE
Figure 6. Figure 7.
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12
11
10
9
8
7
6
5
4
3
2
1
0
5
0 15 20
Out
put Voltage (V)
Output Current (mA)
25
30
+25 C°
+25 C°
–40 C°
–40 C°
+125 C°
+125 C°
V =12V
S
Sourcin g Current
V =3V
S
Sourcin g Current
Output stage is designed to source current. Current sinkingcapabiltyis approximately400 A.m
10
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
I
(mA)
Q
Output Voltage (V)
0
1 2
3
4
5
6
7
8 9 10
2.50
2.25
2.00
1.75
1.50
1.25
1.00
I (mA)
Q
V (V)
CM
V =100mV
SENSE
V =0mV
SENSE
V =12V
S
V =12V
S
V =2.7V
S
V =2.7V
S
–16
–12
–8
–4
0
4
8
12
16 20
24 28 32 36
34
30
26
22
18
14
10
6
2.5
3.5 4.5 5.5 6.5 7.5 8.5 9.5 11.5 17
10.5
O
utput Short--Circuit Current (mA)
Supply Voltage (V)
18
+125 C°
+25 C°
–40 C°
Out
put Voltage (50mV/div)
Time(2 s/div)m
G = 20
V
SENSE
=10mVto20mV
Output Voltage (500mV/div)
Time(2 s/div)m
G = 20
V
SENSE
=10mVto100mV
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
POSITIVE OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT QUIESCENT CURRENT vs OUTPUT VOLTAGE
Figure 8. Figure 9.
QUIESCENT CURRENT OUTPUT SHORT-CIRCUIT CURRENT
vs COMMON-MODE VOLTAGE vs SUPPLY VOLTAGE
Figure 10. Figure 11.
STEP RESPONSE STEP RESPONSE
Figure 12. Figure 13.
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Out
put Voltage (50mV/div)
Time(2 s/div)m
G = 20
V
SENSE
=90mVto100mV
Output Voltage (100mV/div)
Time(5 s/div)m
G = 50
V
SENSE
=10mVto20mV
Ou
tput Voltage (1V/div)
Time(5 s/div)m
G = 50
V
SENSE
=10mVto100mV
Output Voltage (100mV/div)
Time(5 s/div)m
G = 50
V
SENSE
=90mVto100mV
Ou
tput Voltage (2V/div)
Time(10 s/div)m
V
SENSE
=10mVto100mV
G=100
600
500
400
300
200
100
0
0
1
V (mV)
OL
I (mA)
SINK
6
2
3
4
5
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
STEP RESPONSE STEP RESPONSE
Figure 14. Figure 15.
STEP RESPONSE STEP RESPONSE
Figure 16. Figure 17.
STEP RESPONSE COMPARATOR V
OL
vs I
SINK
Figure 18. Figure 19.
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600
599
598
597
596
595
594
593
592
591
590
2
4
Comparator
TripPoint(mV)
Supply Voltage (V)
18
6 8 10
12 14
16
602
601
600
599
598
597
596
–50 –25
Comparator Trip Point (mV)
Temperature ( C)°
125
0 25 50
75
100
200
175
150
125
100
75
50
0 20
Pro
pagation Delay (ns)
Overdrive Voltage (mV)
200
40 60 80 100 120 140 160 180
14
13
12
11
10
0 20
Propagation Delay ( s)
m
Overdrive Voltage (mV)
200
40 60 80 100 120 140 160 180
1.2
1.0
0.8
0.6
0.4
0.2
0
2
4
Re
set Voltage (V)
Supply Voltage (V)
18
6 8 10
12 14
16
300
275
250
225
200
175
150
125
–50 –25
P
ropagation Delay (ns)
Temperature ( C)°
125
0 25 50
75
100
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
COMPARATOR TRIP POINT vs SUPPLY VOLTAGE COMPARATOR TRIP POINT vs TEMPERATURE
Figure 20. Figure 21.
COMPARATOR 1 PROPAGATION DELAY COMPARATOR 2 PROPAGATION DELAY
vs OVERDRIVE VOLTAGE vs OVERDRIVE VOLTAGE
Figure 22. Figure 23.
COMPARATOR RESET VOLTAGE COMPARATOR 1 PROPAGATION DELAY
vs SUPPLY VOLTAGE vs TEMPERATURE
Figure 24. Figure 25.
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Input
200mV/div
Output
2V/div
V =5mV
OD
2 s/divm
1000
100
10
1
0.1
0.01
0.001 0.01 0.1
1
10
Pro
pagation Delay (ms)
Delay Capacitance (nF)
100
Input
200mV/div
Output
2V/div
V =5mV
OD
5 s/divm
1.22
1.21
1.20
1.19
1.18 –50 –25
V
REF
(V)
Temperature ( C)°
125
0 25 50
75
100
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
COMPARATOR 2 PROPAGATION DELAY
vs CAPACITANCE COMPARATOR 1 PROPAGATION DELAY
Figure 26. Figure 27.
COMPARATOR 2 PROPAGATION DELAY REFERENCE VOLTAGE vs TEMPERATURE
Figure 28. Figure 29.
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APPLICATIONS INFORMATION
BASIC CONNECTION
POWER SUPPLY
Normal Case 1: V
SENSE
20mV, V
CM
V
S
G +
V
OUT1
* V
OUT2
100mV * 20mV
(1)
ACCURACY VARIATIONS AS A RESULT OF
VOSRTI (Referred−To−Input)+
ǒ
V
OUT1
G
Ǔ
* 100mV
(2)
INA206
x20
Load
5V Supply
V
S
OUT
CMP1 IN–/0.6REF
CMP1 IN+
CMP2 IN–
CMP2 IN+/0.6 REF
GND
V
IN+
V
IN–
1.2V REF OUT
CMP1 OUT
CMP2 OUT
CMP2 DELAY
CMP1
RESET
1.2V REF
Transparent/Reset
Latch
LoadSupply
–18Vto+80V
R
3m
SHUNT
W
R
4.7k
PULL-UP
W
R
4.7k
PULL-UP
W
Optional Delay Capacitor
0.2 Fm
Current Shunt
Monitor Output
C
0.01 F
BYPASS
m
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
This section addresses the accuracy of these specific operating regions:
Figure 30 shows the basic connection of the INA206,
Normal Case 1:
INA207, and INA208. The input pins, V
IN+
and V
IN–
,
V
SENSE
20mV, V
CM
V
S
should be connected as closely as possible to the shunt resistor to minimize any resistance in series Normal Case 2: with the shunt resistance. V
SENSE
20mV, V
CM
< V
S
Power-supply bypass capacitors are required for Low V
SENSE
Case 1:
stability. Applications with noisy or high impedance V
SENSE
< 20mV, –16V V
CM
< 0
power supplies may require additional decoupling
Low V
SENSE
Case 2:
capacitors to reject power-supply noise. Connect
V
SENSE
< 20mV, 0V V
CM
V
S
bypass capacitors close to the device pins.
Low V
SENSE
Case 3:
V
SENSE
< 20mV, VS< V
CM
80V
The input circuitry of the INA206, INA207, and INA208 can accurately measure beyond the power-supply voltage, V+. For example, the V+ This region of operation provides the highest power supply can be 5V, whereas the load accuracy. Here, the input offset voltage is power-supply voltage is up to +80V. The output characterized and measured using a two-step voltage range of the OUT terminal, however, is method. First, the gain is determined by Equation 1 . limited by the voltages on the power-supply pin.
where:
V
SENSE
AND COMMON-MODE VOLTAGE
V
OUT1
= Output Voltage with V
SENSE
= 100mV
The accuracy of the INA206, INA207, and INA208
V
OUT2
= Output Voltage with V
SENSE
= 20mV
current-shunt monitors is a function of two main variables: V
SENSE
(V
IN+
V
IN–
) and common-mode
Then the offset voltage is measured at
voltage, V
CM
, relative to the supply voltage, VS. V
CM
V
SENSE
= 100mV and referred to the input (RTI) of
is expressed as (V
IN+
+ V
IN–
)/2; however, in practice,
the current-shunt monitor, as shown in Equation 2 .
V
CM
is seen as the voltage at V
IN+
because the
voltage drop across V
SENSE
is usually small.
Figure 30. INA20x Basic Connection
11
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Low V
SENSE
Case 2: V
SENSE
< 20mV, 0V V
CM
V
S
Normal Case 2: V
SENSE
20mV, V
CM
< V
S
Low V
SENSE
Case 1:
NOTE:(1)INA206V TestedLimit=0.4V.
OUT
INA207V TestedLimit=1V.
OUT
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
2
V (V)
OUT
V (mV)
SENSE
24
Ideal
INA208V TestedLimit
OUT
(1)
V TestedLimitat
0mV,0
OUT
V = V V .
SENSE CM1 S
££
V , ,and illustratethevariance fromparttopartofthe thatcancause maximum with
CM2
V V
V
V V <20mV.
CM3 CM4
CM
OUT SENSE
V
CM2
V
CM1
V
CM3
V
CM4
6 8 10
12 14
16 18 20
22
4
SELECTING R
S
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
2
V (V)
OUT
V (mV)
SENSE
20
Actual
Ideal
4
6 8 10
12 14
16 18
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
In the Typical Characteristics, the Output Error vs
Common-Mode Voltage curve shows the highest
This region of operation is the least accurate for the
accuracy for the this region of operation. In this plot,
INA206 family. To achieve the wide input
V
S
= 12V; for V
CM
12V, the output error is at its
common-mode voltage range, these devices use two
minimum. This case is also used to create the V
SENSE
op amp front ends in parallel. One op amp front end
20mV output specifications in the Electrical
operates in the positive input common-mode voltage
Characteristics table.
range, and the other in the negative input region. For this case, neither of these two internal amplifiers dominates and overall loop gain is very low. Within this region, V
OUT
approaches voltages close to linear
This region of operation has slightly less accuracy
operation levels for Normal Case 2. This deviation
than Normal Case 1 as a result of the common-mode
from linear operation becomes greatest the closer
operating area in which the part functions, as seen in
V
SENSE
approaches 0V. Within this region, as V
SENSE
the Output Error vs Common-Mode Voltage curve.
approaches 20mV, device operation is closer to that
As noted, for this graph V
S
= 12V; for V
CM
< 12V, the
described by Normal Case 2. Figure 32 illustrates
Output Error increases as V
CM
becomes less than
this behavior for the INA208. The V
OUT
maximum
12V, with a typical maximum error of 0.005% at the
peak for this case is tested by maintaining a constant
most negative V
CM
= –16V.
VS, setting V
SENSE
= 0mV and sweeping V
CM
from 0V
to VS. The exact V
CM
at which V
OUT
peaks during this
V
SENSE
< 20mV, –16V V
CM
< 0; and test varies from part to part, but the V
OUT
maximum
Low V
SENSE
Case 3:
peak is tested to be less than the specified V
OUT
V
SENSE
< 20mV, V
S
< V
CM
80V
Tested Limit.
Although the INA206 family of devices are not designed for accurate operation in either of these regions, some applications are exposed to these conditions; for example, when monitoring power supplies that are switched on and off while V
S
is still applied to the INA206, INA207, or INA208. It is important to know what the behavior of the devices will be in these regions.
As V
SENSE
approaches 0mV, in these V
CM
regions, the device output accuracy degrades. A larger-than-normal offset can appear at the current-shunt monitor output with a typical maximum value of V
OUT
= 300mV for V
SENSE
= 0mV. As V
SENSE
approaches 20mV, V
OUT
returns to the expected output value with accuracy as specified in the Electrical Characteristics. Figure 31 illustrates this effect using the INA208 (Gain = 100).
Figure 32. Example for Low V
SENSE
Case 2
(INA208, Gain = 100)
The value chosen for the shunt resistor, RS, depends on the application and is a compromise between small-signal accuracy and maximum permissible voltage loss in the measurement line. High values of R
S
provide better accuracy at lower currents by minimizing the effects of offset, while low values of R
S
minimize voltage loss in the supply line. For most
applications, best performance is attained with an R
S
value that provides a full-scale shunt voltage range of 50mV to 100mV. Maximum input voltage for accurate measurements is (V
S
0.2)/Gain.
Figure 31. Example for Low V
SENSE
Cases 1 and 3
(INA208, Gain = 100)
12
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TRANSIENT PROTECTION
INPUT FILTERING
Gain Error% + 100 *ǒ100
5kW
5kW ) R
FILT
Ǔ
(3)
OUTPUT VOLTAGE RANGE
Load
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1.2V REF OUT
CMP1 OUT
CMP2 OUT
CMP2 DELAY
CMP1
RESET
V
IN+
V
IN–
OUT
CMP1 IN+
CMP2 IN–
CMP2 IN+/0.6V REF
GND
INA206–INA208
SO--14, TSSOP--14
1.2V REF
CMP1IN–/0.6VREF
V
S
R
SHUNT
<<R
3m
FILTER
W
R
FILTER
<100W R
FILTER
<100W
V
SUPPLY
C
FILTER
f
–3dB
f
–3dB
=
1
2 (2R Cp
FILTER FILTER
)
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
illustrated when using the INA208 (a gain of 100 version), where a 100mV full-scale input from the
The –16V to +80V common-mode range of the
shunt resistor requires an output voltage swing of
INA206, INA207, and INA208 is ideal for
+10V, and a power-supply voltage sufficient to
withstanding automotive fault conditions ranging from
achieve +10V on the output.
12V battery reversal up to +80V transients, since no additional protective components are needed up to those levels. In the event that the INA206, INA207, and INA208 are exposed to transients on the inputs
An obvious and straightforward location for filtering is
in excess of their ratings, then external transient
at the output of the INA206, INA207, and INA208
absorption with semiconductor transient absorbers
series; however, this location negates the advantage
(zeners or Transzorbs) will be necessary. Use of
of the low output impedance of the internal buffer.
MOVs or VDRs is not recommended except when
The only other option for filtering is at the input pins
they are used in addition to a semiconductor
of the INA206, INA207, and INA208, which is
transient absorber. Select the transient absorber
complicated by the internal 5k + 30% input
such that it will never allow the INA206, INA207, and
impedance; this is shown in Figure 33 . Using the
INA208 to be exposed to transients greater than
lowest possible resistor values minimizes both the
+80V (that is, allow for transient absorber tolerance,
initial shift in gain and effects of tolerance. The effect
as well as additional voltage due to transient
on initial gain is given by Equation 3 :
absorber dynamic impedance). Despite the use of internal zener-type ESD protection, the INA206, INA207, and INA208 do not lend themselves to using external resistors in series with the inputs since the
Total effect on gain error can be calculated by
internal gain resistors can vary up to ± 30% but are
replacing the 5k term with 5k 30%, (or 3.5k )
closely matched. (If gain accuracy is not important,
or 5k + 30% (or 6.5k ). The tolerance extremes of
then resistors can be added in series with the
R
FILT
can also be inserted into the equation. If a pair
INA206, INA207, and INA208 inputs with two equal
of 100 1% resistors are used on the inputs, the
resistors on each input.)
initial gain error will be 1.96%. Worst-case tolerance conditions will always occur at the lower excursion of the internal 5k resistor (3.5k ), and the higher
The output of the INA206, INA207, and INA208 is
excursion of R
FILT
3% in this case. accurate within the output voltage swing range set by the power supply pin, V+. This performance is best
Figure 33. Input Filter (Gain Error –1.5% to –2.2%)
13
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COMPARATOR DELAY (14-Pin Version Only)
C
DELAY
(in mF) +
t
D
5
(4)
REFERENCE
COMPARATOR
U2
U1
0.6V
1.2V
I2 120nA
I1 120nA
C
DELAY
0V
0.6V
V
IN
CMP Out
RESET
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
Note that the specified accuracy of the INA206, INA207, and INA208 must then be combined in
The Comparator 2 programmable delay is controlled
addition to these tolerances. While this discussion
by a capacitor connected to the CMP2 Delay Pin;
treated accuracy worst-case conditions by combining
see Figure 30 . The capacitor value (in μ F) is
the extremes of the resistor values, it is appropriate
selected by using Equation 4 :
to use geometric mean or root sum square calculations to total the effects of accuracy variations.
A simplified version of the delay circuit for Comparator 2 is shown in Figure 34 . The delay comparator consists of two comparator stages with
The INA206, INA207, and INA208 include an internal
the delay between them. Note that I1 and I2 cannot
voltage reference that has a load regulation of
be turned on simultaneously; I1 corresponds to a U1
0.4mV/mA (typical), and not more than 100ppm/ ° C of
low output and I2 corresponds to a U1 high output.
drift. Only the 14-pin package allows external access
Using an initial assumption that the U1 output is low,
to reference voltages, where voltages of 1.2V and
I1 is on, then U2 +IN is zero. If U1 goes high, I2
0.6V are both available. Output current versus output
supplies 120nA to C
DELAY
. The voltage at U2 +IN
voltage is illustrated in the Typical Characteristics
begins to ramp toward a 0.6V threshold. When the
section.
voltage crosses this threshold, the U2 output goes high while the voltage at U2 +IN continues to ramp up to a maximum of 1.2V when given sufficient time
The INA206, INA207, and INA208 devices
(twice the value of the delay specified for C
DELAY
).
incorporate two open-drain comparators. These
This entire sequence is reversed when the
comparators typically have 2mV of offset and a 1.3 μ s
comparator outputs go low, so that returning to low
(typical) response time. The output of Comparator 1
exhibits the same delay.
latches and is reset through the CMP1 RESET pin, as shown in Figure 35 . This configuration applies to both the 10- and 14-pin versions. Figure 34 illustrates the comparator delay.
The 14-pin versions of the INA206, INA207, and INA208 include additional features for comparator functions. The comparator reference voltage of both Comparator 1 and Comparator 2 can be overridden by external inputs for increased design flexibility. Comparator 2 has a programmable delay.
Figure 34. Simplified Model of the Comparator 2
Delay Circuit
Figure 35. Comparator 1 Latching Capability
14
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INA206
x20
12V Supply
12V Load
Shutdown
Warning
3.3V Supply
V
S
OUT
CMP1 IN+
CMP2 IN–
CMP2 IN+/0.6 REF
GND
V
IN+
V
IN–
1.2V REF OUT
CMP1 OUT
CMP2 OUT
CMP2 DELAY
CMP1
RESET
2.5V Reference
1.2V REF
CMP1IN–/0.6REF
R
3m
SHUNT
W
C
0.1 F (0.5s)
DELAY
m
COMPARATOR MAXIMUM INPUT VOLTAGE
20kW 20kW
CMP2 IN+
CMP1 IN–
1.2V
i 1mA£
INA206
x20
Load
5V Supply
V
S
OUT
CMP1 IN+
CMP2 IN–
CMP2 IN+/0.6 REF
GND
1.2V REF OUT
CMP1 OUT
CMP2 OUT
CMP2 DELAY
CMP1
RESET
1.2V REF
Transparent/Reset
Latch
V < 11.2V
LoadSupply
–18Vto+80V
Current Shunt
Monitor Output
CMP1IN–/0.6REF
C
0.01 F
BYPASS
m
V
IN+
V
IN–
R
SHUNT
R
4.7k
PULL-UP
W
R
4.7k
PULL-UP
W
Optional Delay Capacitor
0.2 Fm
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
Figure 36. Server 12V Supply Current Monitor
It is important to note what will happen if events total of 20V. The exact limit depends on the available occur more rapidly than the delay timeout; for voltage and whether either or both inputs are subject example, when the U1 output goes high (turning on to the large voltage. When making this I2), but returns low (turning I1 back on) prior to determination, consider the 20k from each input reaching the 0.6V transition for U2. The voltage at back to the comparator. Figure 38 shows the U2 +IN ramps back down at a rate determined by the maximum input voltage that avoids creating a value of C
DELAY
, and only returns to zero if given reference error when driving both inputs (an
sufficient time. equivalent resistance back into the reference of
10k ).
In essence, when analyzing Comparator 2 for behavior with events more rapid than its delay setting, use the model shown in Figure 34 .
RANGE
The maximum voltage at the comparator input for normal operation is up to (V+) 1.5V. There are special considerations when overdriving the reference inputs (pins 3 and 6). Driving either or both inputs high enough to drive 1mA back into the reference introduces errors into the reference.
Figure 37. Limit Current Into Reference 1mA
Figure 37 shows the basic input structure. A general
guideline is to limit the voltage on both inputs to a
Figure 38. Overdriving Comparator Inputs Without Generating a Reference Error
15
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INA206
x20
1.2V REF OUT
CMP1 OUT
CMP2 OUT CMP2 DELAY
CMP1
RESET
V
S
OUT
CMP1 IN+
CMP2 IN–
CMP2 IN+/0.6 REF
GND
1.2V REF
PWMOUT
Load
Supply
5V Supply
R
1k1W
R
4.02k2W
CMP1IN–/0.6REF
D1
1N5711
D1
1N5711
V
IN+
V
IN–
C
0.27 F
RAMP
m
R
4.99k
RAMP
W
R
1k
PULL-UP
W
Q MMDT2907A
1A
,Q
1B
R
3m
SHUNT
W
R
L
V
IN+
Load
Load Supply
INA193
A2
Supply
5kW5kW
GND
OUT
INA206
x20
1.2V REF OUT
CMP1 OUT
CMP2 OUT
CMP2 DELAY
CMP1 RESET
V
S
OUT
CMP1 IN+
CMP2 IN–
CMP2 IN+/0.6 REF
GND
1.2V REF
A1
V
IN–
V
S+
+5V Supply
R
SHUNT
R
1k
PULL-UP
W
CMP1IN–/0.6REF
V
IN+
V
IN–
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
Figure 39. PWM Output Current-Shunt Monitor
Figure 40. Bi-Directional Current Comparator
16
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a) Generic Window Comparator
c) Window Comparator with Individual Dividers
b) Window Comparator with +1.2V Upper Limit and +0.6V Lower Limit
INA206
x20
V
IN+
V
IN–
1.2V REF OUT
CMP1 OUT
CMP2 OUT CMP2 DELAY
CMP1
RESET
V
S
OUT
CMP1 IN+
CMP2 IN–
CMP2 IN+/0.6 REF
GND
1.2V REF
Load
Supply
+5V Supply
LowerWindow
Voltage
UpperWindow
Voltage
CMP1IN–/0.6REF
R
SHUNT
R
1k
PULL-UP
W
V
IN+
V
IN–
V
S
INA206
x20
1.2V REF OUT
CMP1 OUT
CMP2 OUT CMP2 DELAY
CMP1
RESET
OUT
CMP1 IN+
CMP2 IN–
CMP2 IN+/0.6 REF
GND
1.2V REF
Load
Supply
+5V Supply
CMP1IN–/0.6REF
R
SHUNT
R
1k
PULL-UP
W
R
2
V
IN–
INA206
x20
1.2V REF OUT
CMP1 OUT
CMP2 OUT CMP2 DELAY
CMP1 RESET
OUT
CMP1 IN+
CMP2 IN+/0.6 REF
GND
1.2V REF
Load
Supply
+5V Supply
R
1k
PULL-UP
W
V
IN+
V
S
CMP2 IN–
CMP1IN–/0.6REF
R
SHUNT
R
1
R
3
R
4
V =
UPPER
0.6(R + )1R
2
R
2
V =
LOWER
0.6(R + )3R
4
R
4
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
Figure 41. Using the INA206, INA207, and INA208 as Window Comparators
17
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INA206
x20
1.2V REF OUT
CMP1 OUT
CMP2 OUT
CMP2 DELAY
CMP1
RESET
OUT
CMP1 IN+
CMP2 IN–
CMP2 IN+/0.6 REF
GND
1.2V REF
Load
Power Good
Supply
Analog Current Signal
+5V Supply
R
2
R
1
R
3
R
4
V =
UPPER
0.6(R + )1R
2
R
2
V =
LOWER
0.6(R + )3R
4
R
4
R
SHUNT
R
1k
PULL-UP
W
V
S
CMP1 IN–/0.6REF
V
IN+
V
IN–
INA206 INA207 INA208
SBOS360C – JUNE 2006 – REVISED JUNE 2007
Figure 42. Analog Output Current-Shunt Monitor with Comparators Used as Power-Supply
Under-Limit/Over-Limit or Power-Good Detector
18
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PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
INA206AID ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA206AIDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA206AIDGSR ACTIVE MSOP DGS 10 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA206AIDGST ACTIVE MSOP DGS 10 250 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA206AIDR ACTIVE SOIC D 14 2500 Green(RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA206AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA207AID ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA207AIDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA207AIDGSR ACTIVE MSOP DGS 10 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA207AIDGST ACTIVE MSOP DGS 10 250 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA207AIDR ACTIVE SOIC D 14 2500 Green(RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA207AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA208AID ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA208AIDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA208AIDGSR ACTIVE MSOP DGS 10 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA208AIDGST ACTIVE MSOP DGS 10 250 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA208AIDR ACTIVE SOIC D 14 2500 Green(RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA208AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
PACKAGE OPTION ADDENDUM
www.ti.com
28-Jun-2007
Addendum-Page 1
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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PACKAGE OPTION ADDENDUM
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28-Jun-2007
Addendum-Page 2
TAPE AND REEL INFORMATION
PACKAGE MATERIALS INFORMATION
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2-Jul-2007
Pack Materials-Page 1
Device Package Pins Site Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm)W(mm)
Pin1
Quadrant
INA206AIDGSR DGS 10 MLA 330 12 5.3 3.4 1.4 8 12 Q1 INA206AIDGST DGS 10 MLA 178 12 5.3 3.4 1.4 8 12 Q1
INA206AIDR D 14 MLA 330 16 6.5 9.5 2.1 8 16 Q1 INA207AIDGSR DGS 10 MLA 330 12 5.3 3.4 1.4 8 12 Q1 INA207AIDGST DGS 10 MLA 178 12 5.3 3.4 1.4 8 12 Q1
INA207AIDR D 14 MLA 330 16 6.5 9.0 2.1 8 16 Q1 INA208AIDGSR DGS 10 MLA 330 12 5.3 3.4 1.4 8 12 Q1 INA208AIDGST DGS 10 MLA 178 12 5.3 3.4 1.4 8 12 Q1
INA208AIDR D 14 MLA 330 16 6.5 9.0 2.1 8 16 Q1
TAPE AND REEL BOX INFORMATION
Device Package Pins Site Length (mm) Width (mm) Height (mm)
INA206AIDGSR DGS 10 MLA 346.0 346.0 29.0 INA206AIDGST DGS 10 MLA 342.9 336.6 28.58
INA206AIDR D 14 MLA 346.0 346.0 33.0 INA207AIDGSR DGS 10 MLA 346.0 346.0 29.0 INA207AIDGST DGS 10 MLA 342.9 336.6 28.58
INA207AIDR D 14 MLA 346.0 346.0 33.0 INA208AIDGSR DGS 10 MLA 346.0 346.0 29.0 INA208AIDGST DGS 10 MLA 342.9 336.6 28.58
INA208AIDR D 14 MLA 346.0 346.0 33.0
PACKAGE MATERIALS INFORMATION
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2-Jul-2007
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
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2-Jul-2007
Pack Materials-Page 3
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65
M
0,10
0,10
0,25
0,50
0,75
0,15 NOM
Gage Plane
28
9,80
9,60
24
7,90
7,70
2016
6,60
6,40
4040064/F 01/97
0,30
6,60 6,20
8
0,19
4,30
4,50
7
0,15
14
A
1
1,20 MAX
14
5,10
4,90
8
3,10
2,90
A MAX
A MIN
DIM
PINS **
0,05
4,90
5,10
Seating Plane
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153
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