www.ti.com
INA166
INA166
Low-Noise, Low-Distortion, G = 2000
INSTRUMENTATION AMPLIFIER
FEATURES
● LOW NOISE: 1.3nV/√Hz at 1kHz
● LOW THD+N: 0.09% at 1kHz
● WIDE BANDWIDTH: 450kHz
● WIDE SUPPLY RANGE: ±4.5V to ±18V
● HIGH CMR: > 100dB
● GAIN SET WITH EXTERNAL RESISTOR
● SO-14 SURFACE-MOUNT PACKAGE
DESCRIPTION
The INA166 is a very low-noise, low-distortion, monolithic instrumentation amplifier. Its current-feedback
circuitry achieves very wide bandwidth and excellent
dynamic response over a wide range of gain. It is ideal
for low-level signals such as microphones or hydrophones. Many industrial, instrumentation, and medical
applications also benefit from its low noise and wide
bandwidth.
4
–
V
IN
3
A1
3kΩ
APPLICATIONS
● MOVING-COIL TRANSDUCER AMPLIFIERS
● DIFFERENTIAL RECEIVERS
● BRIDGE TRANSDUCER AMPLIFIERS
● MICROPHONE AND HYDROPHONE
Unique distortion cancellation circuitry reduces distortion to extremely low levels, even in high gain.
The INA166 provides near-theoretical noise performance for 200Ω source impedance. Its differential
input, low noise, and low distortion provide superior
performance as a low-level signal amplifier.
The INA166 is available in a space-saving SO-14
surface-mount package, specified for operation over
the –40°C to +85°C temperature range.
1
V
O
1
6kΩ 60kΩ
PREAMPS
INA166
Sense
8
30.3Ω
3kΩ
12
5
+
V
IN
Copyright © 2000, Texas Instruments Incorporated SBOS178 Printed in U.S.A. December, 2000
A2
6kΩ 60kΩ
14 11 6
V
2
O
A3
V+ V–
9
Ref
10
G = 2000
V
O
SPECIFICATIONS: VS = ±5V
TA = +25°C and at rated supplies, VS = ±5V, RL = 2kΩ connected to ground, G = 2000, unless otherwise noted.
INA166UA
PARAMETER CONDITIONS MIN TYP MAX UNITS
GAIN
Gain Error ±0.3 ±1%
Gain Temp Drift Coefficient ±10 ppm/°C
Nonlinearity ±0.005 % of FS
INPUT REFERRED NOISE
Voltage Noise R
f
= 1kHz 1.3 nV/√Hz
O
f
= 100Hz 1.6 nV/√Hz
O
f
= 10Hz 2 nV/√Hz
O
Current Noise
f
= 1kHz 0.8 pA/√Hz
O
INPUT OFFSET VOLTAGE
Input Offset Voltage V
vs Temperature T
vs Power Supply V
S
INPUT VOLTAGE RANGE
Common-Mode Voltage Range V
Common-Mode Rejection V
CM
INPUT BIAS CURRENT
Initial Bias Current 2.5 12 µA
vs Temperature 15 nA/°C
Initial Offset Current 0.1 1 µA
vs Temperature 0.5 nA/°C
INPUT IMPEDANCE
DYNAMIC RESPONSE
Bandwidth, Small Signal, –3dB 450 kHz
Slew Rate 15 V/µs
THD+Noise, f = 1kHz 0.09 %
Settling Time, 0.1% 5V Step 2.5 µs
0.01% 5V Step 3.5 µs
Overload Recovery 50% Overdrive 1 µs
OUTPUT
Voltage R
L
Load Capacitance Stability 1000 pF
Short-Circuit Current Continuous-to-Common ±60 mA
POWER SUPPLY
Rated Voltage ±5V
Voltage Range ±4.5 ±18 V
Current, Quiescent I
TEMPERATURE RANGE
Specification –40 +85 °C
Operating –40 +125 °C
Thermal Resistance,
θ
JA
= 0Ω
SOURCE
= V
CM
A
= ±4.5V to ±18V ±1 ±3 µV/V
V
= ±1V, R
= 0V ±50 ±250 µV
OUT
= T
to T
MIN
MAX
+
–
– V
= 0V (V+) – 4 (V+) – 3V
IN
IN
+
–
– V
= 0V (V–) + 4 (V–) + 3 V
IN
IN
= 0Ω 100 120 dB
SRC
±2.5 µV/°C
Differential 60 2MΩ pF
Common-Mode 60 2MΩ pF
= 2kΩ to Ground (V+) – 2 (V+) – 1.8 V
(V–) + 2 (V–) + 1.8 V
= 0mA ±10 ±12 mA
O
100 °C/W
2
INA166
SBOS178
PIN CONFIGURATION
Top View
1
V
1
O
2
NC
3
GS1
–
4
V
IN
+
5
V
IN
6
V–
7
NC
NC = No Internal Connection
SO-14
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
14
VO2
13
NC
12
GS2
11
V+
10
Ref
9
V
O
8
Sense
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage ....................................................................... ±18V
Signal Input Terminals, Voltage
Output Short-Circuit to Ground ............................................... Continuous
Operating Temperature .................................................. –55°C to +125°C
Storage Temperature ..................................................... –55°C to +125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those specified is not implied.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals
that can swing more than 0.5V beyond the supply rails should be current
limited to 10mA or less.
Current
(2)
.................. (V–) – 0.5V to (V+) + 0.5V
(2)
.................................................... 10mA
(1)
PACKAGE/ORDERING INFORMATION
PACKAGE
PRODUCT PACKAGE NUMBER MARKING NUMBER
DRAWING PACKAGE ORDERING TRANSPORT
INA166UA SO-14 Surface Mount 235 INA166UA INA166UA Rails
"" " "INA166UA/2K5 Tape and Reel
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces
of “INA166UA/2K5” will get a single 2500-piece Tape and Reel.
(1)
MEDIA
INA166
SBOS178
3
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±5V, RL = 2kΩ, CL = 50pF, G = 2000, unless otherwise noted.
70
60
50
40
30
Gain (dB)
20
10
0
10k 100k 1M 10M
100
10
GAIN vs FREQUENCY
Frequency (Hz)
NOISE VOLTAGE (RTI) vs FREQUENCY
1
VO = 5Vrms
R
= 10kΩ
L
0.1
THD+N (%)
0.01
100 1k 10k 100k
10.0
1
THD+N vs FREQUENCY
Frequency (Hz)
CURRENT NOISE SPECTRAL DENSITY
Noise (RTI) (nV/√Hz)
1
10 100 1k 10k
Frequency (Hz)
140
120
100
80
60
40
Input Referred CMR (dB)
20
0
10 1M
CMR vs FREQUENCY
100 1k 10k 100k
Frequency (Hz)
Current Noise Density (pA/√Hz)
0.1
1 10 100 1k 10k
Frequency (Hz)
POWER-SUPPLY REJECTION
140
120
100
80
60
40
Power-Supply Rejection (dB)
20
0
11M10 100 1k 10k 100k
vs FREQUENCY
Frequency (Hz)
4
INA166
SBOS178
TYPICAL PERFORMANCE CURVES (Cont.)
SMALL-SIGNAL RESPONSE
500mV/div
2.5µs/div
At TA = +25°C, VS = ±5V, RL = 2kΩ, CL = 50pF, G = 2000, unless otherwise noted.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
V+
(V+)–2
(V+)–4
(V+)–6
(V–)+6
(V–)+4
Output Voltage to Rail (V)
(V–)+2
V–
0 102030405060
Output Current (mA)
LARGE-SIGNAL RESPONSE
5V/div
2.5µs/div
INA166
SBOS178
5
APPLICATIONS INFORMATION
Figure 1 shows the basic connections required for operation.
Power supplies should be bypassed with 0.1µF tantalum capacitors near the device pins. The output Sense (pin 8) and output
Reference (pin 10) should be low-impedance connections. Resistance of greater than 5Ω in series with these connections will
degrade the common-mode rejection of the INA166.
The input stage design used to achieve this low noise, results
in relatively high input bias current and input bias current
noise. As a result, the INA166 may not provide the best
noise performance with a source impedance greater than
10kΩ. For source impedance greater than 10kΩ, other instrumentation amplifiers may provide improved noise performance.
GAIN
Gain of the INA166 is internally set for G = 2000. Input stage
(A1, A2) gain is 200 and the output stage gain (A3) is 10.
Internal resistor values are laser trimmed for accurate ratios to
achieve excellent gain accuracy and common-mode rejection,
but absolute resistor values are approximately ±20%. Nominal
resistor values are shown.
Although the INA166 is primarily intended for fixed-gain
applications, the gain can be increased by connecting a gainset resistor, R
, between pin 3 and pin 12 The nominal gain
G
will be:
G
=+2000
60000
R
G
Accuracy of the 60000 term in this equation is approximately ±20%. The stability and temperature drift of R
contributes to the overall gain accuracy and these effects can
be inferred from this gain equation.
NOISE PERFORMANCE
The INA166 provides very low-noise with low-source impedance. Its 1.3nV/√Hz voltage noise delivers near-theoretical noise performance with a source impedance of 200Ω.
INPUT CONSIDERATIONS
Very low source impedance (less than 10Ω) can cause the
INA166 to oscillate. This depends on circuit layout, signal
source, and input cable characteristics. An input network
consisting of a small inductor and resistor, as shown in
Figure 2, can greatly reduce any tendency to oscillate. This
is especially useful if a variety of input sources are to be
connected to the INA166. Although not shown in other
figures, this network can be used as needed with all applications shown.
47Ω
–
V
IN
G
+
V
IN
1.2µH
1.2µH
47Ω
11
6
V+
4
11
3
12
5
INA166
6
V–
8
9
10
FIGURE 2. Input Stabilization Network.
V
O
4
–
V
IN
3
R
G
12
5
+
V
IN
A1
3kΩ
30.3Ω
3kΩ
A2
FIGURE 1. Basic Circuit Connections.
6
V+
0.1µF
111
INA166
6kΩ 60kΩ
A3
6kΩ 60kΩ
14 6
0.1µF
V–
Sense
8
9
G = 2000
Ref
10
V+
Sometimes Shown in
Simplified Form:
V
O
NOTE: Gain is internally set to G = 2000.
can be used to increase gain. See text.
R
G
INA166
V–
V
O
INA166
SBOS178
OFFSET VOLTAGE TRIM
A variable voltage applied to pin 10, as shown in Figure 3, can
be used to adjust the output offset voltage. A voltage applied
to pin 10 is summed with the output signal. An op amp
connected as a buffer is used to provide a low impedance at
pin 10 to assure good common-mode rejection.
V+
4
11
3
12
5
INA166
6
8
9
10
OUTPUT SENSE
An output sense terminal allows greater gain accuracy in
driving the load. By connecting the sense connection at the
load, I • R voltage loss to the load is included inside the
feedback loop. Current drive can be increased by connecting
a buffer amp inside the feedback loop, as shown in Figure 4.
V
O
V+
100µA
V–
FIGURE 3. Offset Voltage Adjustment Circuit.
+15V
4
11
3
INA166
12
5
6
Sense
8
10
OPA237
9
BUF634
10kΩ
V–
±250mA
Output Drive
V
O
BW
BUF634 connected
for wide bandwidth.
150Ω
150Ω
100µA
–15V
FIGURE 4. Buffer for Increase Output Current.
INA166
SBOS178
7
PACKAGE OPTION ADDENDUM
www.ti.com
16-Mar-2007
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
INA166UA ACTIVE SOIC D 14 58 Green (RoHS &
no Sb/Br)
INA166UA/2K5 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
INA166UA/2K5G4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
INA166UAG4 ACTIVE SOIC D 14 58 Green (RoHS &
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-3-260C-168 HR
CU NIPDAU Level-3-260C-168 HR
CU NIPDAU Level-3-260C-168 HR
CU NIPDAU Level-3-260C-168 HR
(3)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
TAPE AND REEL INFORMATION
11-Mar-2008
*All dimensions are nominal
Device Package
INA166UA/2K5 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width(mm) Height (mm)
INA166UA/2K5 SOIC D 14 2500 346.0 346.0 33.0
Pack Materials-Page 2
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