TEXAS INSTRUMENTS DRV603 Technical data

DRV603

LEFT

RIGHT

-

+

-

+

DAC

DAC

DRV603

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DirectPath™, 3-VRMS Line Driver With Adjustable Gain

1

FEATURES

234

• DirectPath™
– Eliminates Pop/Clicks
– Eliminates Output DC-Blocking Capacitors
– Provides Flat Frequency Response 20

Hz–20 kHz

• Low Noise and THD
– SNR > 109 dB
– Typical Vn < 7 μVms
– THD+N < 0.002%

• Output Voltage Into 2.5-kΩ Load
– 2 Vrms With 3.3-V Supply Voltage
– 3 Vrms With 5-V Supply Voltage

• Differential Input

• External Undervoltage Mute

APPLICATIONS

• PDP / LCD TV

• Blu-ray Disc™, DVD Players

• Home Theater in a Box

• Set-Top Boxes

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DESCRIPTION

The DRV603PW is a 3-V
driver designed to allow the removal of the output
dc-blocking capacitors for reduced component count
and cost. The device is ideal for single-supply
electronics where size and cost are critical design
parameters.

Designed using TI’s patented DirectPath™
technology, The DRV603 is capable of driving 3 V
into a 2.5-kΩ load with 5-V supply voltage. The
device has differential inputs and uses external
gain-setting resistors to support a gain range of ±1
V/V to ±10 V/V, and line outputs that have ±8 kV IEC
ESD protection. The DRV603 (occasionally referred
to as the ‘603) has built-in shutdown control for
pop-free on/off control. The DRV603 has an external
and internal undervoltage detector that mutes the
output.

Using the DRV603 in audio products can reduce
component count considerably compared to
traditional methods of generating a 3-V
DRV603 does not require a power supply greater
than 5 V to generate its 8.5-Vppoutput, nor does it
require a split-rail power supply. The DRV603
integrates its own charge pump to generate a
negative supply rail that provides a clean, pop-free
ground biased 3-V

The DRV603 is available in a 14-pin TSSOP.
If the low noise and trimmed dc-offset and external

undervoltage mute function are not beneficial in the
application, TI recommends the footprint compatible
DRV602.

SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009

pop-free stereo line

RMS

rms

output. The

rms

output.

rms

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2DirectPath is a trademark of Texas Instruments.
3Blu-ray Disc is a trademark of Blu-ray Disc Association.
4All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Copyright © 2009, Texas Instruments Incorporated

DRV603

SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009

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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

(1)

Tape and reel, 2000

T

A

–40°C to 85°C

ORDERING INFORMATION

PACKAGE TRANSPORT MEDIA, QUANTITY

DRV603PW RAIL, 90

DRV603PWR

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

Web site at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

(1)

over operating free-air temperature range

VALUE UNIT

Supply voltage, VDDto GND –0.3 to 5.5 V
V
R

T
T
ESD Electrostatic discharge, IEC ESD OUTL, OUTR ±8 kV

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

Input voltage VSS– 0.3 to VDD+ 0.3 V

I

Minimum load impedance > 600 Ω

L

EN to GND –0.3 to VDD+0.3 V

Maximum operating junction temperature range –40 to 150 °C

J

Storage temperature range –40 to 150 °C

stg

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

DISSIPATION RATINGS

PACKAGE R

(°C/W) R

θJC

θJA

TSSOP-14 (PW) 35 115

(°C/W)

(2)

POWER RATING

AT TA≤ 25°C AT TA≤ 70°C

870 mW 348 mW

(1)

POWER RATING

(1) Power rating is determined with a junction temperature of 125°C. This is the point where performance starts to degrade and long-term

reliability starts to be reduced. Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C
for best performance and reliability.

(2) These data were taken with the JEDEC high-K test printed circuit board (PCB). For the JEDEC low-K test PCB, the R

θJA

(1)

is 185°C/W.

RECOMMENDED OPERATING CONDITIONS

MIN NOM MAX UNIT

V
V
V
T

Supply voltage DC supply voltage 3 3.3 5.5 V

DD

High-level input voltage EN 60 % of V

IH

Low-level input voltage EN 40 % of V

IL

Operating free-air temperature 0 70 °C

A

DD
DD

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SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009

ELECTRICAL CHARACTERISTICS

TA= 25°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

|VOS| Output offset voltage VDD= 3 V to 5 V, input grounded, unity gain 1 mV
PSRR Power-supply rejection ratio VDD= 3 V to 5 V 88 dB
V
V
|IIH| High-level input current (EN) VDD= 5 V, VI= V
|IIL| Low-level input current (EN) VDD= 5 V, VI= 0 V 1 µA

I

High-level output voltage VDD= 3.3 V, RL= 2.5 kΩ 3.1 V

OH

Low-level output voltage VDD= 3.3 V, RL= 2.5 kΩ –3.05 V

OL

DD

VDD= 3.3 V, no load, EN = V

Supply current VDD= 5 V, no load, EN = V

DD

DD

DD

12.5 mA

Shutdown mode, VDD= 3 V to 5 V 1

1 µA

11

OPERATING CHARACTERISTICS

VDD= 3.3 V , TA= 25°C, RL= 2.5 kΩ, C
noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

O

THD+N Total harmonic distortion plus noise VO= 2 V

I

O

R

IN

R

fb

V

N

SNR Signal-to-noise ratio 112 dB
G

BW

A

VO

V

uvp

I

Hys

f

cp

Output voltage (outputs in phase) THD = 1%, VDD= 5 V, f = 1 kHz 3.01 V

Crosstalk VO= 2 V
Maximum output current VDD= 3.3 V 20 mA
Input resistor range 1 10 47 kΩ
Feedback resistor range 4.7 20 100 kΩ
Slew rate 4.5 V/μs
Maximum capacitive load 220 pF
Noise output voltage BW = 20 Hz to 22 kHz, A-weighted 6 μV

Unity-gain bandwidth 8 MHz
Open-loop voltage gain 150 dB
External undervoltage detection 1.25 V
External undervoltage detection

hysteresis current
Charge pump frequency 225 450 675 kHz

(PUMP)

= C

= 1 µF , CIN= 10 µF, RIN= 10 kΩ, Rfb= 20 kΩ (unless otherwise

(PVSS)

THD = 1%, VDD= 3.3 V, f = 1 kHz 2.05

THD = 1%, VDD= 5 V, f = 1 kHz, RL= 100 kΩ 3.1

, f = 1 kHz 0.001%

rms

, f = 1 kHz –100 dB

rms

VO= 3 Vrms, THD+N = 0.1%, BW = 22 kHz,
A-weighted

5 μA

rms

rms

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Product Folder Link(s): DRV603

1

+INR

2

3

4

-INR

OUTR

SGND

5

6

7 8

EN

PVSS

CN

9

10

11

12

13

14

CP

PVDD

PGND

OUTL

-INL

+IN

ChargePump

UVP

External

Under

Voltage

Detector

DRV603

SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009

PW PACKAGE

(TOP VIEW)

PIN FUNCTIONS

PIN

NAME NO.

+INR 1 I Right-channel OPAMP positive input
–INR 2 I Right-channel OPAMP negative input
OUTR 3 O Right-channel OPAMP output
SGND 4 P Signal ground
EN 5 I Enable input, active-high
PVSS 6 P Supply voltage
CN 7 I/O Charge-pump flying capacitor negative terminal
CP 8 I/O Charge-pump flying capacitor positive terminal
PVDD 9 P Positive supply
PGND 10 P Power ground
UVP 11 I Undervoltage protection input
OUTL 12 O Left-channel OPAMP output
–INL 13 I Left-channel OPAMP negative input
+INL 14 I Left-channel OPAMP positive input

(1) I = input, O = output, P = power

I/O

(1)

DESCRIPTION

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Click& Pop

Suppression

ShortCircuit

Protection

SGND

Bias

Circuitry

PVSS

CN CP

PVDD

-INR

+INR

OUTL

-INL

OUTR

+INL

EN PGND

UVP

Line

Driver

Line

Driver

DRV603

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FUNCTIONAL BLOCK DIAGRAM

SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009

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100m 5200m 300m 500m 800m 2 3 4

V -OutputVoltage-V

O

0.0001

10

0.001

0.01

0.1

1

THD+N-TotalHarmonicDistortion+Noise-%

0.0001

10

0.001

0.01

0.1

1

THD+N-TotalHarmonicDistortion+Noise-%

100m 5200m 500m 800m 2 3 4

V -OutputVoltage-V

O

0.0001

10

0.001

0.01

0.1

1

THD+N-TotalHarmonicDistortion+Noise-%

100m 5200m 500m 800m 2 3 4

V -OutputVoltage-V

O

0.0001

10

0.001

0.01

0.1

1

THD+N-TotalHarmonicDistortion+Noise-%

100m 5200m 500m 800m 2 3 4

V -OutputVoltage-V

O

DRV603

SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009

TYPICAL CHARACTERISTICS

VDD= 3.3 V , TA= 25°C, RL= 2.5 kΩ, C

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

OUTPUT VOLTAGE OUTPUT VOLTAGE

VDD= 3.3 V, RL= 100 kΩ, f = 1 kHz VDD= 5 V, RL= 100 kΩ, f = 1 kHz

(PUMP)

= C

= 1 µF , CIN= 10 µF, RIN= 10 kΩ, Rfb= 20 kΩ (unless otherwise noted)

(VSS)

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Figure 1. Figure 2.

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

OUTPUT VOLTAGE OUTPUT VOLTAGE

VDD= 3.3 V, RL= 2.5 kΩ, f = 1 kHz VDD= 5 V, RL= 600 Ω, f = 1 kHz

vs vs

Figure 3. Figure 4.

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20 20k50 100 200 500 1k 2k 5k 10k

f-Frequency-Hz

0.0001

10

0.001

0.01

0.1

1

THD+N-TotalHarmonicDistortion+Noise-%

0.0001

10

0.001

0.01

0.1

1

THD+N-TotalHarmonicDistortion+Noise-%

20 20k50 100 200 500 1k 2k 5k 10k

f-Frequency-Hz

-150

+150

-100

-50

+0

+50

+100

20 200k50 100 500 1k 2k 5k 10k 50k

f-Frequency-Hz

Phase-deg

0

+10

+1

+2

+3

+4

+5

+6

+7

+8

+9

20

200k

50 100 500 1k 2k 5k 10k 50k

f-Frequency-Hz

Gain-dBV

DRV603

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TYPICAL CHARACTERISTICS (continued)

VDD= 3.3 V , TA= 25°C, RL= 2.5 kΩ, C

TOTAL HARMONIC DISTORTION+NOISE TOTAL HARMONIC DISTORTION+NOISE

vs vs

FREQUENCY FREQUENCY

VDD= 3.3 V, RL= 2.5 kΩ, VO= 2 V

(PUMP)

= C

rms

SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009

= 1 µF , CIN= 10 µF, RIN= 10 kΩ, Rfb= 20 kΩ (unless otherwise noted)

(VSS)

VDD= 5 V, RL= 100 kΩ, VO= 2 V

rms

VDD= 5 V, RL= 100 kΩ, VO= 2 V

FREQUENCY FREQUENCY

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Figure 5. Figure 6.

PHASE GAIN

vs vs

rms

VDD= 5 V, RL= 100 kΩ, VO= 2 V

Figure 7. Figure 8.

Product Folder Link(s): DRV603

rms