TEXAS INSTRUMENTS DAC8534 Technical data

DAC8534

D

®

A

C

8

5

3

4

SBAS254D – SEPTEMBER 2002 – REVISED MARCH 2004

Quad Channel, Low Power, 16-Bit, Serial Input

DIGITAL-TO-ANALOG CONVERTER

FEATURES

● POWER SUPPLY: +2.7V to +5.5V

●

micro

POWER OPERATION: 950µA at 5V

● 16-BIT MONOTONIC OVER TEMPERATURE

● SETTLING TIME: 10µs to ±0.003% FSR

● ULTRA-LOW AC CROSSTALK: –100dB typ

● POWER-ON RESET TO ZERO-SCALE

● ON-CHIP OUTPUT BUFFER AMPLIFIER WITH

RAIL-TO-RAIL OPERATION

● DOUBLE BUFFERED INPUT ARCHITECTURE

● SIMULTANEOUS OR SEQUENTIAL OUTPUT

UPDATE AND POWER-DOWN

● 16 CHANNEL BROADCAST CAPABILITY

● SCHMITT-TRIGGERED INPUTS

● TSSOP-16 PACKAGE

APPLICATIONS

● PORTABLE INSTRUMENTATION

● CLOSED-LOOP SERVO-CONTROL

● PROCESS CONTROL

● DATA ACQUISITION SYSTEMS

● PROGRAMMABLE ATTENUATION

● PC PERIPHERALS

DESCRIPTION

The DAC8534 is a quad channel, 16-bit Digital-to-Analog Converter (DAC) offering low-power operation and a flexible serial host interface. Each on-chip precision output amplifier allows rail-to-rail output swing to be achieved over the supply range of 2.7V to 5.5V. The device supports a standard 3-wire serial interface capable of operating with input data clock frequencies up to 30MHz for IOV

The DAC8534 requires an external reference voltage to set the output range of each DAC channel. Also incorporated into the device is a power-on reset circuit which ensures that the DAC outputs power up at zero-scale and remain there until a valid write takes place. The DAC8534 provides a per channel power-down feature, accessed over the serial interface, that reduces the current consumption to 200nA per channel at 5V.

The low-power consumption of this device in normal operation makes it ideally suited to portable battery-operated equipment and other low-power applications. The power consumption is 5mW at 5V, reducing to 4µW in power-down mode.

The DAC8534 is available in a TSSOP-16 package with a specified operating temperature range of –40°C to +105°C.

AV

IOV

DD

Data

Buffer A

Data

Buffer D

18

DAC

Register A

DAC

Register D

V

REF

DAC A

DAC D

H

DD

= 5V.

V

A

OUT

V

B

OUT

V

C

OUT

V

D

OUT

SYNC

SCLK

D

24-Bit

Serial-to-

Parallel

Shift

IN

Register

GND

Buffer

Control

8

A0 A1 LDAC

Register

Control

ENABLE

V

L

REF

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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Power-Down Control Logic

Resistor Network

ABSOLUTE MAXIMUM RATINGS

AV

to GND ........................................................................ –0.3V to +6V

DD

Digital Input Voltage to GND ............................... –0.3V to +AV

V

A to V

OUT

Operating Temperature Range ......................................–40°C to +105°C

Storage Temperature Range ......................................... –65°C to +150°C

Junction Temperature Range (T

Power Dissipation ..........................................................(T

θ

JA

θ

JC

Lead Temperature, Soldering:

Vapor Phase (60s) ............................................................... +215°C

Infrared (15s)........................................................................ +220 °C

NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.

to GND .................................... –0.3V to + AVDD + 0.3V

OUTD

max) ........................................ +150°C

J

Thermal Impedance.........................................................118°C/W

Thermal Impedance ........................................................... 29°C/W

(1)

+ 0.3V

DD

ELECTROSTATIC DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

max – TA)/

J

θ

JA

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE/ORDERING INFORMATION

PRODUCT PACKAGE-LEAD DESIGNATOR

PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT

DAC8534 TSSOP-16 PW –40°C to +105°C D8534I DAC8534IPW Tube, 90

(1)

"" " ""DAC8534IPWR Tape and Reel, 2000

NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.

SPECIFICATION

RANGE MARKING NUMBER MEDIA, QUANTITY

ELECTRICAL CHARACTERISTICS

AVDD = +2.7V to +5.5V, –40°C to +105°C, unless otherwise specified.

DAC8534 PARAMETER CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE

Resolution 16 Bits Relative Accuracy ±0.0987 % of FSR Differential Nonlinearity 16-Bit Monotonic 0.25 ±1LSB Zero-Scale Error +5 +20 mV Zero-Scale Error Drift ±7 µV/°C Full-Scale Error –0.15 –1.0 % of FSR Gain Error ±1.0 % of FSR Gain Temperature Coefficient ±3 ppm of FSR/°C Channel-to-Channel Matching R PSRR 0.75 mV/V

OUTPUT CHARACTERISTICS

Output Voltage Range 0V Output Voltage Settling Time To ±0.003% FSR 8 10 µs

Slew Rate 1V/µs Capacitive Load Stability R

Code Change Glitch Impulse 1LSB Change Around Major Carry 20 nV-s Digital Feedthrough 0.5 nV-s DC Crosstalk 0.25 LSB AC Crosstalk 1kHz sine Wave –100 –96 dB DC Output Impedance 1 Ω Short-Circuit Current AV

Power-Up Time Coming Out of Power-Down Mode

AC PERFORMANCE BW = 20kHz, AV SNR (

1st 19 Harmonics Removed) F THD 67 dB SFDR 69 dB SINAD 65 dB

NOTES: (1) Linearity calculated using a reduced code range of 485 to 64714; output unloaded. (2) Ensured by design and characterization, not production tested.

(1)

= 2kΩ, CL = 200pF 8 mV

L

(2)

HV

REF

0200

to FD00

RL = 2kΩ; 0pF < CL < 200pF

Coming Out of Power-Down Mode

H

R

= 2kΩ; CL = 500pF 12 µs

L

R

L

DD

AV

DD

AV

DD

AV

DD

OUT

H

= ∞ 470 pF

L

= 2kΩ 1000 pF

= +5V 50 mA = +3V 20 mA

= +5V 2.5 µs

= +3V 5 µs

= 5V

DD

= 1kHz

94 dB

2

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DAC8534

SBAS254D

ELECTRICAL CHARACTERISTICS (Cont.)

AVDD = +2.7V to +5.5V, –40°C to +105°C, unless otherwise specified.

DAC8534 PARAMETER CONDITIONS MIN TYP MAX UNITS REFERENCE INPUT

Reference Current V

Reference Input Range 0 AV Reference Input Impedance 37 kΩ

LOGIC INPUTS

(2)

Input Current ±1 µA V

L, Input LOW Voltage IOVDD = +5V 0.8 V

IN

V

L, Input LOW Voltage IOVDD = +3V 0.6 V

IN

V

H, Input HIGH Voltage IOVDD = +5V 2.4 V

IN

V

H, Input HIGH Voltage IOVDD = +3V 2.1 V

IN

Pin Capacitance 3pF

POWER REQUIREMENTS

AV

DD

IOV

DD

AIDD (normal mode)

IOI

DD

AI

= +3.6V to +5.5V VIH = IOVDD and VIL = GND 0.95 1.6 mA

DD

AI

= +2.7V to +3.6V VIH = IOVDD and VIL = GND 0.9 1.5 mA

DD

AI

(all power-down modes)

DD

AI

= +3.6V to +5.5V VIH = IOVDD and VIL = GND 0.8 1 µA

DD

AI

= +2.7V to +3.6V VIH = IOVDD and VIL = GND 0.05 1 µA

DD

DAC Active and Excluding Load Current

POWER EFFICIENCY

I

OUT/IDD

TEMPERATURE RANGE

Specified Performance –40 +105 °C

NOTES: (1) Linearity calculated using a reduced code range of 485 to 64714; output unloaded. (2) Ensured by design and characterization, not production tested.

= AVDD = +5V 135 180 µA

REF

V

= AVDD = +3V 80 120 µA

REF

DD

2.7 5.5 V

10 20 µA

I

= 2mA, AVDD = +5V 89 %

LOAD

V

PIN CONFIGURATION

Top View TSSOP

V V V

V

V V

OUT

REF

AV

REF

GND

OUT

1

A

2

B

3

H

4

DD

L

DAC8534

5 6 7

C

8

D

16 15 14 13 12 11 10

9

LDAC ENABLE A1 A0 IOV

DD

D

IN

SCLK SYNC

PIN DESCRIPTIONS

PIN NAME DESCRIPTION

1V 2V 2V 4AV 5V 6 GND Ground reference point for all circuitry on the part. 7V 8V 9 SYNC Level-triggered control input (active LOW). This is

10 SCLK Serial Clock Input. Data can be transferred at rates

11 D

12 IOV 13 A0 Address 0 — sets device address, see Table II. 14 A1 Address 1 — sets device address, see Table II. 15 ENABLE Active LOW, ENABLE LOW connects the SPI inter-

16 LDAC Load DACs, rising edge triggered loads all DAC

A Analog output voltage from DAC A.

OUT

B Analog output voltage from DAC B.

OUT

H Positive reference voltage input.

REF

OUT OUT

Power supply input, +2.7V to +5.5V.

DD

L Negative reference voltage input.

C Analog output voltage from DAC C. D Analog output voltage from DAC D.

the frame synchronization signal for the input data. When SYNC goes LOW, it enables the input shift register and data is transferred in on the falling edges of the following clocks. The DAC is updated following the 24th clock (unless SYNC is taken HIGH before this edge in which case the rising edge of SYNC acts as an interrupt and the write sequence is ignored by the DAC8534).

up to 30MHz. Serial Data Input. Data is clocked into the 24-bit

IN

input shift register on each falling edge of the serial clock input.

Digital Input-Output Power Supply

DD

face to the serial port.

registers.

DAC8534

SBAS254D

3

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TIMING CHARACTERISTICS

(1, 2)

AVDD = +2.7V to +5.5V; all specifications –40°C to +105°C unless otherwise noted.

DAC8534

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNITS

(3)

t

1

t

2

t

3

t

4

SCLK Cycle Time IOVDD = AVDD = 2.7V to 3.6V 50 ns

IOV

= AVDD = 3.6V to 5.5V 33 ns

DD

SCLK HIGH Time IOVDD = AVDD = 2.7V to 3.6V 26 ns

IOV

= AVDD = 3.6V to 5.5V 15 ns

DD

SCLK LOW Time IOVDD = AVDD = 2.7V to 3.6V 22.5 ns

IOV

= AVDD = 3.6V to 5.5V 13 ns

DD

SYNC Falling Edge to SCLK IOVDD = AVDD = 2.7V to 3.6V 0 ns

Rising Edge Setup Time IOV

= AVDD = 3.6V to 5.5V 0 ns

DD

t

5

t

6

t

7

t

8

t

9

NOTES: (1) All input signals are specified with t timing diagram, below. (3) Maximum SCLK frequency is 30MHz at IOV

Data Setup Time IOVDD = AVDD = 2.7V to 3.6V 5 ns

IOV

= AVDD = 3.6V to 5.5V 5 ns

DD

Data Hold Time IOVDD = AVDD = 2.7V to 3.6V 4.5 ns

IOV

= AVDD = 3.6V to 5.5V 4.5 ns

DD

24th SCLK Falling Edge to IOVDD = AVDD = 2.7V to 3.6V 0 ns

SYNC Rising Edge IOV

= AVDD = 3.6V to 5.5V 0 ns

DD

Minimum SYNC HIGH Time IOVDD = AVDD = 2.7V to 3.6V 50 ns

IOV

= AVDD = 3.6V to 5.5V 33 ns

DD

24th SCLK Falling Edge to IOVDD = AVDD = 2.7V to 5.5V 130 ns

SYNC Falling Edge

= tF = 3ns (10% to 90% of AVDD) and timed from a voltage level of (VIL + VIH)/2. (2) See Serial Write Operation

R

SERIAL WRITE OPERATION

t

SCLK 1 24

t

SYNC

D

8

IN

t

4

t

5

DB23 DB0 DB23

t

3

t

6

= AV

DD

1

t

2

= +3.6V to +5.5V and 20MHz at IOVDD = AV

DD

t

9

t

7

= +2.7V to +3.6V.

DD

4

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DAC8534

SBAS254D

TYPICAL CHARACTERISTICS

64 48 32 16

0

–16 –32 –48 –64

LE (LSB)

LINEARITY ERROR AND DIFFERENTIAL

LINEARITY ERROR vs DIGITAL INPUT CODE

0000

H

2000H4000H6000H8000

H

Digital Input Code

A000

H

C000HE000HFFFF

H

1.0

0.5

0.0

–0.5 –1.0

DLE (LSB)

CHANNEL B AVDD = 2.7V

At TA = +25°C, unless otherwise noted.

LINEARITY ERROR AND DIFFERENTIAL

64 48 32 16

0

–16

LE (LSB)

–32 –48 –64

LINEARITY ERROR vs DIGITAL INPUT CODE

CHANNEL A AVDD = 5V

1.0

0.5

0.0

–0.5

DLE (LSB)

–1.0

2000H4000H6000H8000

0000

H

A000

Digital Input Code

LINEARITY ERROR AND DIFFERENTIAL

64 48 32 16

0

–16

LE (LSB)

–32 –48 –64

LINEARITY ERROR vs DIGITAL INPUT CODE

CHANNEL C AVDD = 5V

1.0

0.5

0.0

–0.5

DLE (LSB)

–1.0

0000

2000H4000H6000H8000

H

A000

Digital Input Code

C000HE000HFFFF

H

C000HE000HFFFF

H

LINEARITY ERROR AND DIFFERENTIAL

64 48 32 16

0

–16

LE (LSB)

–32 –48 –64

LINEARITY ERROR vs DIGITAL INPUT CODE

CHANNEL B AVDD = 5V

1.0

0.5

0.0

–0.5

DLE (LSB)

–1.0

2000H4000H6000H8000

H

0000

H

A000

H

C000HE000HFFFF

H

Digital Input Code

LINEARITY ERROR AND DIFFERENTIAL

64 48 32 16

0

–16

LE (LSB)

–32 –48 –64

LINEARITY ERROR vs DIGITAL INPUT CODE

CHANNEL D AVDD = 5V

1.0

0.5

0.0

–0.5

DLE (LSB)

–1.0

0000

H

2000H4000H6000H8000

H

A000

H

C000HE000HFFFF

H

Digital Input Code

LINEARITY ERROR AND DIFFERENTIAL

64 48 32 16

0

–16

LE (LSB)

–32 –48 –64

LINEARITY ERROR vs DIGITAL INPUT CODE

CHANNEL A AVDD = 2.7V

1.0

0.5

0.0

–0.5

DLE (LSB)

–1.0

0000

2000H4000H6000H8000

H

DAC8534

SBAS254D

Digital Input Code

H

A000

C000HE000HFFFF

H

5

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TYPICAL CHARACTERISTICS (Cont.)

At TA = +25°C, unless otherwise noted.

LINEARITY ERROR AND DIFFERENTIAL

64 48 32 16

–16

LE (LSB)

–32 –48 –64

LINEARITY ERROR vs DIGITAL INPUT CODE

CHANNEL C AVDD = 2.7V

0

1.0

0.5

0.0

–0.5

DLE (LSB)

–1.0

0000

2000H4000H6000H8000

H

A000

Digital Input Code

ZERO-SCALE ERROR vs TEMPERATURE

10

CH D CH C

8

6

4

Error (mV)

C000HE000HFFFF

H

AVDD = V

REF

= 5V

LINEARITY ERROR AND DIFFERENTIAL

64 48 32 16

0

–16

LE (LSB)

–32 –48 –64

LINEARITY ERROR vs DIGITAL INPUT CODE

CHANNEL D AVDD = 2.7V

1.0

0.5

0.0

–0.5

DLE (LSB)

–1.0

2000H4000H6000H8000

H

0000

H

A000

C000HE000HFFFF

H

Digital Input Code

ZERO-SCALE ERROR vs TEMPERATURE

10

8

AVDD = V

REF

= 2.7V

6

CH A CH C CH B CH D

4

Error (mV)

2

CH B CH A

0

–40 –10 20 50 80 110

Temperature (°C)

FULL-SCALE ERROR vs TEMPERATURE

20

15

10

5

Error (mV)

0

To avoid clipping of the output signal during the test, V

AV

DD

= 5V, V

REF

= AV

REF

– 10mV,

DD

= 4.99V

–5

–10

–40 –10 20 50 80 110

Temperature (°C)

CH C

CH D

CH B

CH A

0

–2

–40 –10 20 50 80 110

Temperature (°C)

FULL-SCALE ERROR vs TEMPERATURE

20

To avoid clipping of the output signal

15

10

CH C CH D

during the test, V

AV

= 2.7V, V

DD

REF

= AV

REF

– 10mV,

DD

= 2.69V

5

Error (mV)

0

CH A

–5

CH B

–10

–40 –10 20 50 80 110

Temperature (°C)

6

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DAC8534

SBAS254D

TYPICAL CHARACTERISTICS (Cont.)

AVDD = V

REF

= 5V

SUPPLY CURRENT vs DIGITAL INPUT CODE

1200

1000

800

600

400

200

0

AI

DD

(µA)

0000H2000H4000H6000H8000

H

Digital Input Code

A000

H

C000HE000HFFFF

H

AVDD = V

REF

= 2.7V

1000

950 900 850 800 750 700 650 600

AI

DD

(µA)

2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5 AV

DD

(V)

SUPPLY CURRENT vs SUPPLY VOLTAGE

At TA = +25°C, unless otherwise noted.

0.150 V

= AVDD – 10mV

REF

DAC loaded with 0000

0.125

H

0.100

SINK CURRENT CAPABILITY (ALL CHANNELS)

(V)

0.075

OUT

V

AVDD = 5V

0.050

0.025

AVDD = 2.7V

0.000

012345

I

(mA)

SINK

SOURCE CURRENT CAPABILITY (ALL CHANNELS)

(V)

OUT

V

2.70

2.65

2.60

V

= AV

REF

DAC Loaded with FFFF

AV

DD

– 10mV

= 2.7V

SOURCE CURRENT CAPABILITY (ALL CHANNELS)

(V)

OUT

V

5.00

4.95

4.90

V

= AV

DD

AV

– 10mV

= 5V

DD

REF

DAC Loaded with FFFF

H

4.85

4.80 012345

I

(mA)

SOURCE

H

2.55

2.50 012345

SUPPLY CURRENT vs TEMPERATURE

1200

AVDD = V

REF

= 5V

1000

800

(µA)

600

DD

Reference Current Included All Channels Powered, No Load.

400

200

0

–40 –10 20 50 80 110

AI

DAC8534

SBAS254D

I

(mA)

SOURCE

AVDD = V

REF

Temperature (°C)

= 2.7V

7

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