TEXAS INSTRUMENTS DAC7512 Technical data

DAC7512
DAC7512
DAC7512
SBAS156B – JULY 2002
Low-Power, Rail-to-Rail Output, 12-Bit Serial Input
FEATURES
microPOWER OPERATION:
POWER-DOWN: 200nA at 5V, 50nA at 3V
POWER SUPPLY: +2.7V to +5.5V
TESTED MONOTONIC BY DESIGN
POWER-ON RESET TO 0V
THREE POWER-DOWN FUNCTIONS
LOW POWER SERIAL INTERFACE WITH
SCHMITT-TRIGGERED INPUTS
ON-CHIP OUTPUT BUFFER AMPLIFIER,
RAIL-TO-RAIL OPERATION
SYNC INTERRUPT FACILITY
SOT23-6 AND MSOP-8 PACKAGES
135µA at 5V
APPLICATIONS
PORTABLE BATTERY-POWERED
INSTRUMENTS
DIGITAL GAIN AND OFFSET
ADJUSTMENT
PROGRAMMABLE VOLTAGE AND
CURRENT SOURCES
DESCRIPTION
The DAC7512 is a low-power, single, 12-bit buffered voltage output Digital-to-Analog Converter (DAC). Its on-chip preci­sion output amplifier allows rail-to-rail output swing to be achieved. The DAC7512 uses a versatile three-wire serial interface that operates at clock rates up to 30MHz and is compatible with standard SPI DSP interfaces.
The reference for the DAC7512 is derived from the power supply, resulting in the widest dynamic output range possible. The DAC7512 incorporates a power-on reset circuit that ensures that the DAC output powers up at 0V and remains there until a valid write takes place in the device. The DAC7512 contains a power-down feature, accessed over the serial interface, that can reduce the current consumption of the device to 50nA at 5V.
The low power consumption of this part in normal operation makes it ideally suited to portable battery-operated equip­ment. The power consumption is 0.7mW at 5V reducing to 1µW in power-down mode.
The DAC7512 is available in a SOT23-6 package and an MSOP-8 package.
SPI and QSPI are registered trademarks of Motorola. Microwire is a registered trademark of National Semiconductor.
, QSPI™, Microwire™, and
SYNC
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Power-On
Reset
DAC
Register
Input
Control
Logic
SCLK D
V
GND
DD
REF (+) REF (–)
12-Bit
DAC
Power-Down Control Logic
IN
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Output
Buffer
V
OUT
Resistor Network
Copyright © 2002, Texas Instruments Incorporated
ABSOLUTE MAXIMUM RATINGS
V
to GND ........................................................................... –0.3V to +6V
DD
Digital Input Voltage to GND .................................. –0.3V to +VDD + 0.3V
V
to GND ........................................................... –0.3V to +VDD + 0.3V
OUT
Operating Temperature Range ..................................... –40°C to +105°C
Storage Temperature Range ......................................... –65°C to +150°C
Junction Temperature Range (TJ max) ......................................... +150°C
SOT23 Package:
Power Dissipation .................................................. (TJ max — TA)/
Thermal Impedance .........................................................240°C/W
JA
Lead Temperature, Soldering:
Vapor Phase (60s) ............................................................... +215°C
Infrared (15s) ........................................................................ +220°C
MSOP Package:
Power Dissipation ........................................................ (T
Thermal Impedance .........................................................206°C/W
JA
Thermal Impedance ........................................................... 44°C/W
JC
Lead Temperature, Soldering:
Vapor Phase (60s) ............................................................... +215°C
Infrared (15s) ........................................................................ +220°C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.
(1)
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru­ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
max — TA)/
J
JA
JA
PACKAGE/ORDERING INFORMATION
MINIMUM
RELATIVE DIFFERENTIAL SPECIFIED
PRODUCT (LSB) (LSB) PACKAGE-LEAD DESIGNATOR
ACCURACY NONLINEARITY PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
DAC7512E ±8 ±1 MSOP-8 DGK –40°C to +105°C D12E DAC7512E/250 Tape and Reel, 250
"" " " " " "
DAC7512N ±8 ±1 SOT23-6 DBV –40°C to +105°C D12N DAC7512N/250 Tape and Reel, 250
"" " " " " "
NOTES: (1) For the most current specifications and package information, refer to our web site at www.ti.com. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “DAC7512E/2K5” will get a single 2500-piece Tape and Reel.
(1)
RANGE MARKING NUMBER
(1)
MEDIA, QUANTITY
DAC7512E/2K5 Tape and Reel, 2500
DAC7512N/3K Tape and Reel, 3000
PIN CONFIGURATIONS
Top View SOT23-6
1
V
OUT
2
GND
V
DD
V
NC
NC
V
OUT
DD
DAC7512
3
MSOP-8
1
2
DAC7512
3
4
NC = No Internal Connection
DAC7512N LOT TRACE LOCATION
Top View
D12N
PIN DESCRIPTION (SOT23-6)
PIN NAME DESCRIPTION
6
SYNC
5
SCLK
4
D
IN
8
GND
7
D
IN
6
SCLK
5
SYNC
Pin 1
1V
2 GND Ground reference point for all circuitry on the part. 3VDDPower Supply Input, +2.7V to 5.5V. 4DINSerial Data Input. Data is clocked into the 16-bit
5 SCLK Serial Clock Input. Data can be transferred at rates
6 SYNC Level triggered control input (active LOW). This is
Bottom View
OUT
Analog output voltage from DAC. The output ampli­fier has rail-to-rail operation.
input shift register on the falling edge of the serial clock input.
up to 30MHz.
the frame sychronization signal for the input data. When SYNC goes LOW, it enables the input shift register and data is transferred in on the falling edges of the following clocks. The DAC is updated following the 16th clock cycle unless SYNC is taken HIGH before this edge, in which case the rising edge of SYNC acts as an interrupt and the write sequence is ignored by the DAC7512.
YMLL
Pin 1
2
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Lot Trace Code
DAC7512
SBAS156B
ELECTRICAL CHARACTERISTICS
VDD = +2.7V to +5.5V; RL = 2ký to GND; CL = 200pF to GND.
DAC7512E, N
PARAMETER CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE
Resolution 12 Bits Relative Accuracy ±8 LSB Differential Nonlinearity Tested Monotonic by Design ±1 LSB Zero Code Error All Zeroes Loaded to DAC Register +5 +20 mV Full-Scale Error All Ones Loaded to DAC Register –0.15 –1.25 % of FSR Gain Error ±1.25 % of FSR Zero Code Error Drift –20 µV/°C Gain Temperature Coefficient –5 ppm of FSR/°C
OUTPUT CHARACTERISTICS
Output Voltage Range 0V Output Voltage Settling Time 1/4 Scale to 3/4 Scale Change
Slew Rate 1 V/µs
(1)
(2)
DD
(400
to C00H)810µs
R
L
H
= 2k; 0pF < CL < 200pF
R
= 2k; CL = 500pF 12 µs
L
V
Capacitive Load Stability R
Code Change Glitch Impulse 1LSB Change Around Major Carry 20 nV-s
= × 470 pF
L
R
= 2k 1000 pF
L
Digital Feedthrough 0.5 nV-s DC Output Impedance 1 Short-Circuit Current V
Power-Up Time Coming Out of Power-Down Mode
Coming Out of Power-Down Mode
LOGIC INPUTS
(2)
= +5V 50 mA
DD
V
= +3V 20 mA
DD
V
= +5V 2.5 µs
DD
V
= +3V 5 µs
DD
Input Current ±1 µA V
L, Input Low Voltage VDD = +5V 0.8 V
IN
V
L, Input Low Voltage VDD = +3V 0.6 V
IN
V
H, Input High Voltage VDD = +5V 2.4 V
IN
V
H, Input High Voltage VDD = +3V 2.1 V
IN
Pin Capacitance 3pF
POWER REQUIREMENTS
V
DD
I
(normal mode)
DD
VDD = +3.6V to +5.5V VIH = VDD and VIL = GND 135 200 µA V
= +2.7V to +3.6V VIH = VDD and VIL = GND 115 160 µA
DD
I
(all power-down modes)
DD
V
= +3.6V to +5.5V VIH = VDD and VIL = GND 0.2 1 µ A
DD
V
= +2.7V to +3.6V VIH = VDD and VIL = GND 0.05 1 µA
DD
DAC Active and Excluding Load Current
2.7 5.5 V
POWER EFFICIENCY
I
OUT/IDD
I
= 2mA. VDD = +5V 93 %
LOAD
TEMPERATURE RANGE
Specified Performance –40 +105 °C
NOTES: (1) Linearity calculated using a reduced code range of 48 to 4047; output unloaded. (2) Guaranteed by design and characterization, not production tested.
DAC7512
SBAS156B
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3
TIMING CHARACTERISTICS
(1, 2)
VDD = +2.7V to +5.5V; all specifications –40°C to +105°C, unless otherwise noted.
DAC7512E, N
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNITS
(3)
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
NOTES: (1) All input signals are specified with t diagram, below. (3) Maximum SCLK frequency is 30MHz at V
SCLK Cycle Time
SCLK HIGH Time
SCLK LOW Time
SYNC to SCLK Rising
Edge Setup Time
Data Setup Time
Data Hold Time
SCLK Falling Edge to
SYNC Rising Edge
Minimum SYNC HIGH Time
V
= 2.7V to 3.6V 50 ns
DD
V
= 3.6V to 5.5V 33 ns
DD
V
= 2.7V to 3.6V 13 ns
DD
V
= 3.6V to 5.5V 13 ns
DD
V
= 2.7V to 3.6V 22.5 ns
DD
V
= 3.6V to 5.5V 13 ns
DD
V
= 2.7V to 3.6V 0 ns
DD
V
= 3.6V to 5.5V 0 ns
DD
V
= 2.7V to 3.6V 5 ns
DD
V
= 3.6V to 5.5V 5 ns
DD
V
= 2.7V to 3.6V 4.5 ns
DD
V
= 3.6V to 5.5V 4.5 ns
DD
V
= 2.7V to 3.6V 0 ns
DD
V
= 3.6V to 5.5V 0 ns
DD
V
= 2.7V to 3.6V 50 ns
DD
V
= 3.6V to 5.5V 33 ns
DD
= tF = 5ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. (2) See Serial Write Operation timing
R
= +3.6V to +5.5V and 20MHz at VDD = +2.7V to +3.6V.
DD
SERIAL WRITE OPERATION
SCLK
t
SYNC
D
8
IN
t
4
DB15 DB0
t
1
t
t
3
t
6
t
5
2
t
7
4
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DAC7512
SBAS156B
TYPICAL CHARACTERISTICS: VDD = +5V
FULL-SCALE ERROR vs TEMPERATURE
–40
Error (mV)
Temperature (°C)
0 40 80 120
30
20
10
0
–10
–20
–30
TYPICAL TOTAL UNADJUSTED ERROR
0
TUE (LSBs)
CODE
200
H
400H600H800HA00HC00HE00HFFF
H
16
8
0
–8
–16
At TA = +25°C, +VDD = +5V, unless otherwise noted.
DIFFERENTIAL LINEARITY ERROR vs CODE
16.0
12.0
8.0
4.0
0.0
–4.0
LE (LSB)
–8.0 –12.0 –16.0
1.0
0.5
0.0
DLE (LSB)
–0.5
–1.0
0 200H400H600H800
DIFFERENTIAL LINEARITY ERROR vs CODE
16.0
12.0
8.0
4.0
0.0
–4.0
LE (LSB)
–8.0 –12.0 –16.0
1.0
0.5
0.0
DLE (LSB)
–0.5
–1.0
0 200H400H600H800
LINEARITY ERROR AND
(–40°C)
A00
H
H
CODE
LINEARITY ERROR AND
(+105°C)
A00
H
H
CODE
C00HE00HFFF
C00HE00HFFF
DIFFERENTIAL LINEARITY ERROR vs CODE
LINEARITY ERROR AND
(+25°C)
16.0
12.0
8.0
4.0
0.0
–4.0
LE (LSB)
–8.0 –12.0 –16.0
1.0
0.5
0.0
DLE (LSB)
–0.5
–1.0
H
0 200H400H600H800
A00
H
C00HE00HFFF
H
H
CODE
H
30
ZERO-SCALE ERROR vs TEMPERATURE
20
10
0
Error (mV)
–10
–20
–30
–40
0 40 80 120
DAC7512
SBAS156B
Temperature (°C)
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5
TYPICAL CHARACTERISTICS: VDD = +5V (Cont.)
At TA = +25°C, +VDD = +5V, unless otherwise noted.
3000
2500
2000
1500
Frequency
1000
500
0
500
400
300
(µA)
DD
I
200
100
5060708090
SUPPLY CURRENT vs CODE
IDD HISTOGRAM
100
110
120
130
IDD (µA)
140
150
160
170
180
190
(V) V
(µA) I
OUT
DD
300
250
200
150
100
5
SOURCE AND SINK CURRENT CAPABILITY
4
DAC Loaded with FFF
H
3
2
1
DAC Loaded with 000
H
0
0
51015
I
SOURCE/SINK
(mA)
SUPPLY CURRENT vs TEMPERATURE
50
300
0
0
200
400H600H800HA00HC00HE00HFFF
H
H
CODE
SUPPLY CURRENT vs SUPPLY VOLTAGE
0
–40
0 40 80 120
Temperature (°C)
POWER-DOWN CURRENT vs SUPPLY VOLTAGE
100
90
250
200
150
(µA)
DD
I
100
50
0
2.7
3.2 3.7 4.2 4.7 5.2 5.7 V
(V)
DD
(nA)
DD
I
80 70 60
+105°C
50 40
–40°C 30 20 10
+25°C
0
2.7
3.2 3.7 4.2 4.7 5.2 5.7 VDD (V)
6
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DAC7512
SBAS156B
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