Datasheet CY74FCT480ATPC, CY74FCT480BTSOCT, CY74FCT480BTSOC, CY74FCT480BTQCT, CY74FCT480BTQC Datasheet (Texas Instruments)

Dual 8-Bit Parity Generator/Checke

r

CY54/74FCT480T

Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.

SCCS025 - May 1993 - Revised March 2000

Copyright © 2000, Texas Instruments Incorporated

1CY54/74FCT480T

Features

• Function, pinout and drive compatible with FCT and F

logic

• FCT-A speed at 7.5 ns max. (Com’l)

FCT-B speed at 5.6 ns max. (Com’l)

• Reduced V

OH

(typically = 3.3V) versions of equivalent

FCT functions

• Edge-rate control circuitry for significantly improved

noise characteristics

• Power-off disable feature

• Matched rise and fall times

• ESD > 2000V

• Fully compatiblewith TTL input and output logic levels

• Sink Current 64 mA (Com’l),
32 mA (Mil)

Source Current 32 mA (Com’l),

12 mA (Mil)

• Two 8-bit parity generator/checkers

• Open drain Active LOW parity error output

• Expandable for larger word widths

Functional Description

The FCT480T is a high-speed dual 8-bit parity
generator/checker. Each parity generator/checker accepts
eight data bits and one parity bit as inputs, and generates a
sum and parity error output. The FCT480T can be used in
ODD parity systems. The parity error output is open-drain,
designed for easy expansion of the word width by a wired-OR
connection of several FCT480T type devices.Since additional
logic is not needed, the parity generation or checking times
remain the same as for an individual FCT480T device.

The outputs are designed with a power-off disable feature to
allow for liv e insertion of boards.

LogicBlockDiagram

Pin Configurations

FCT480T–1

28

4

56789

10

3
2
1

27

13
14
15
16
17

26

2524232221

20

11

12

19

PAR1F

1

H1G

1

E

2

H

2

18

D2C

2

NC

NC

G

2

E

1

LCC

Top View

A

1

B

1

CHK/GEN

PAR

2

V

CC

NC
A

2

B

2

ERROR

ODD

2

NC

GND

ODD

1

C

1

F

2

A

1

B

1

C

1

D

1

E

1

F

1

G

1

H

1

PAR

1

CHK/GEN

ERR

A

2

B

2

C

2

D

2

E

2

F

2

G

2

H

2

PAR

2

ODD

2

ODD

1

FCT480T–2

1
2
3
4
5
6
7
8
9
10
11
12

16

17

18

19

20

24
23
22
21

13

14

A

1

B

1

C

1

D

1

E

1

F

1

G

1

H

1

PAR

1

CHK/GEN

ODD

1

GND

V

CC

A

2

B

2

C

2

D

2

F

2

G

2

H

2

ERROR

PAR

2

ODD

2

FCT480T–3

15

E

2

DIP/SOIC/QSOP

Top View

D

1

CY54/74FCT480T

2

Maximum Ratings

[1, 2]

(Above which the useful life may be impaired. For user guide­lines, not tested.)

Storage Temperature .................................–65°C to +150°C

Ambient Temperature with

Power Applied.............................................–65°C to +135°C

Supply Voltage to Ground Potential...............–0.5V to +7.0V

DC Input Voltage............................................–0.5V to +7.0V

DC Output Voltage......................................... –0.5V to +7.0V

DC Output Current (Maximum Sink Current/Pin).......120 mA

Power Dissipation..........................................................0.5W

Static Discharge Voltage............................................>2001V

(per MIL-STD-883, Method 3015)

Function Table

Inputs Outputs

A1 to H

1

A2 to H

2

CHK/GEN PAR

1

PAR

2

ODD

1

ODD2ERROR

Number of A1 to H1 Inputs
HIGH is EVEN

Number of A2 to H2 Inputs
HIGH is EVEN

H H H L L H

L H H L L

H L L H L

L L H H L

L X X H H L

Number of Inputs HIGH A

2

to H2 is ODD

H H H L H L

L H H H L

H L L L H

L L H L L

L X X H L L

Number of A1 to H1 Inputs
HIGH is ODD

Number of A2 to H2 Inputs
HIGH is EVEN

H H H H L L

L H L L H

H L H H L

L L L H L

L X X L H L

Number of A2 to H2 Inputs
HIGH is ODD

H H H H H L

L H L H L

H L H L L

L L L L H

L X X L L H

Operating Range

Range Range

Ambient

Temperature V

CC

Commercial All –40°C to +85°C 5V ± 5%
Military

[3]

All –55°C to +125°C 5V ± 10%

Notes:

1. Unless otherwise noted, these limits are over the operating free-air tem­perature range.

2. Unusedinputs must alwaysbe connected to an appropriate logic voltage
level, preferably either V

CC

or ground.

3. T

A

is the “instant on” case temperature.

CY54/74FCT480T

3

Electrical Characteristics Over the Operating Range

Parameter Description Test Conditions Min. Typ.

[4]

Max. Unit

V

OH

Output HIGH Voltage VCC= Min., IOH= –32 mA Com’l 2.0 V

VCC= Min., IOH= –15 mA Com’l 2.4 3.3 V
VCC= Min., IOH= –12 mA Mil 2.4 3.3 V

V

OL

Output LOW Voltage VCC= Min., IOL= 64 mA Com’l 0.3 0.55 V

VCC= Min., IOL= 32 mA Mil 0.3 0.55 V

V

IH

Input HIGH Voltage 2.0 V

V

IL

Input LOW Voltage 0.8 V

V

H

Hysteresis

[5]

All inputs 0.2 V

V

IK

Input Clamp Diode Voltage VCC= Min., IIN= –18 mA –0.7 –1.2 V

I

I

Input HIGH Current VCC= Max., VIN= V

CC

5 µA

I

IH

Input HIGH Current VCC= Max., VIN= 2.7V ±1 µA

I

IL

Input LOW Current VCC= Max., VIN= 0.5V ±1 µA

I

OZH

Off State HIGH-Level Output
Current

VCC= Max., V

OUT

= 2.7V 10 µA

I

OZL

Off State LOW-Level
Output Current

VCC = Max., V

OUT

= 0.5V –10 µA

I

OS

Output Short Circuit Current

[6]

VCC= Max., V

OUT

= 0.0V –60 –120 –225 mA

I

OFF

Power-Off Disable VCC= 0V, V

OUT

= 4.5V ±1 µA

Capacitance

[5]

Parameter Description Typ.

[4]

Max. Unit

C

IN

Input Capacitance 5 10 pF

C

OUT

Output Capacitance 9 12 pF

Notes:

4. Typical values are at V

CC

=5.0V, TA=+25˚C ambient.

5. This parameter is specified but not tested.

6. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accuratelyreflect operational values.Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, I

OS

tests should be performed last.

CY54/74FCT480T

4

Power Supply Characteristics

Parameter Description Test Conditions Typ.

[4]

Max. Unit

I

CC

Quiescent Power Supply Current VCC=Max., VIN< 0.2V,

V

IN

> VCC–0.2V

0.1 0.2 mA

∆I

CC

Quiescent Power Supply Current
(TTL inputs HIGH)

VCC=Max., VIN=3.4V,

[7]

f1=0, Outputs Open

0.5 2.0 mA

I

CCD

Dynamic Power Supply Current

[8]

VCC=Max., One Bit Toggling,
50% Duty Cycle, Outputs Open,
V

IN

< 0.2V or VIN> VCC–0.2V

0.06 0.12 mA/
MHz

I

C

Total Power Supply Current

[9]

VCC=Max.,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f

1

=2.5 MHz,

V

IN

< 0.2V or VIN> VCC–0.2V

0.7 1.4 mA

VCC=Max.,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f

1

=2.5 MHz,

V

IN

=3.4V or VIN=GND

1.0 2.4 mA

VCC=Max.,
50% Duty Cycle, Outputs Open,
Sixteen Bits Toggling at f

1

=2.5 MHz,

V

IN

< 0.2V or VIN> VCC–0.2V

2.5 5.0

[10]

mA

VCC=Max.,
50% Duty Cycle, Outputs Open,
Sixteen Bits Toggling at f

1

=2.5 MHz,

V

IN

=3.4V or VIN=GND

6.5 21.0

[10]

mA

Switching Characteristics Over the Operating Range

Description

FCT480AT FCT480BT

UnitCom’l Military Com’l

t

PLH

t

PHL

Propagation Delay
A to EVEN/ODD

7.5

7.0

7.0

6.6

5.6

5.6

ns

t

PLH

[11]

t

PHL

Propagation Delay
A to

ERROR

7.0

8.5

7.0

8.1

5.6

6.5

ns

t

PLH

t

PHL

Propagation Delay
CHK/

GEN to EVEN/ODD

6.5

7.5

6.3

7.4

5.9

5.9

ns

t

PLH

[11]

t

PHL

Propagation Delay
CHK/

GEN to ERROR

7.5

7.0

7.1

6.9

5.7

5.5

ns

Notes:

7. Per TTL driven input (V

IN

=3.4V); all other inputs at VCC or GND.

8. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.

9. I

C

=I

QUIESCENT

+ I

INPUTS

+ I

DYNAMIC

IC=ICC+∆ICCDHNT+I

CCD(f0

/2 + f1N1)

I

CC

= Quiescent Current with CMOS input levels

∆I

CC

= Power Supply Current for a TTL HIGH input (VIN=3.4V)

D

H

= Duty Cycle for TTL inputs HIGH

N

T

= Number of TTL inputs at D

H

I

CCD

= Dynamic Current caused by an input transition pair (HLH or LHL)

f

0

= Clock frequency for registered devices, otherwise zero

f

1

= Input signal frequency

N

1

= Number of inputs changing at f

1

All currents are in milliamps and all frequencies are in megahertz.

10. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.

11. t

PLH

is measured up to V

OUT=VOL

+0.3V

CY54/74FCT480T

5

Document #: 38-00281-B

Ordering Information

Speed

(ns) Ordering Code

Package

Name Package Type

Operating

Range

5.6 CY74FCT480BTPC P13/13A 24-Lead (300-Mil) Molded DIP Commercial
CY74FCT480BTQCT Q13 24-Lead (150-Mil) QSOP
CY74FCT480BTSOC/SOCT S13 24-Lead (300-Mil) Molded SOIC

7.0 CY54FCT480BTLMB L64 28-Square Leadless Chip Carrier Military

7.5 CY74FCT480ATPC P13/13A 24-Lead (300-Mil) Molded DIP Commercial
CY74FCT480ATQCT Q13 24-Lead (150-Mil) QSOP

CY54/74FCT480T

6

Package Diagrams

28-Square Leadless Chip Carrier L64

MIL-STD-1835 C-4

24-Lead (300-Mil) Molded DIP P13/P13A

CY54/74FCT480T

7

Package Diagrams (continued)

24-Lead Quarter Size Outline

Q13

24-Lead (300-Mil) Molded SOIC

S13

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