Texas Instruments CY74FCT163H245CPVC, CY74FCT163H245CPAC, CY74FCT163H245APVC, CY74FCT163245APVC, CY74FCT163245APAC Datasheet

16-Bit Transceivers

CY74FCT163245

CY74FCT163H245

SCCS051 - February 1997 - Revised March 2000

Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.

Copyright © 2000, Texas Instruments Incorporated

Features

• Low power, pin-compatible replacement for LCX and
LPT families

• 5V tolerant inputs and outputs

• 24 mA balanced drive outputs

• Power-off disable outputs permits live insertion

• Edge-rate control circuitry for reduced noise

• FCT-C speed at 4.1 ns

• Latch-up performance exceedsJEDEC standard no. 17

• Typical output skew < 250ps

• Industrial temperature range of –40˚C to +85˚C

• TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)

• Typical

V

olp

(groundbounce)performanceexceedsMil

Std 883D

•V

CC

= 2.7V to 3.6V

• ESD (HBM) > 2000V

CY74FCT163H245

• Bus hold on data inputs

• Eliminates the need for external pull-up or pull-down
resistors

• Devices with bus hold are not recommended for trans­lating rail-to-rail CMOS signals to 3.3V logic levels

Functional Description

These 16-bit transceivers are designed for use in bidirectional
synchronous communication between two buses, where high
speed and low power are required. Direction of data flow is
controlled by (DIR), the Output Enable (

OE) transfers data
when LOW and isolates the buses when HIGH. The outputs
are 24-mA balanced output drivers with current limiting
resistors to reduce the need for external terminating resistors
and provide for minimal undershoot and reduced ground
bounce..

The CY74FCT163H245 has “bus hold” on the data inputs,
which retains the input’s last state whenever the input goes to
high impedance. This eliminates the need for pull-up/down
resistors and prevents floating inputs.

The CY74FCT163245 is designed with inputs and outputs
capable of being driven by 5.0V buses, allowing its use in
mixed voltage systems as a translator. The outputs are also
designed with a power off disable feature enabling its use in
applications requiring live insertion.

GND

LogicBlock Diagrams CY74FCT163245, CY74FCT163H245

Pin

Configuration

1
2
3
4
5
6
7
8
9
10
11
12

33
32
31
30
29

25

26

27

28

36
35

1

DIR

34

SSOP/TSSOP

Top View

13
14
15
16
17
18
19
20
21
22
23
24

45
44
43
42
41

37

38

39

40

48
47
46

1B1
1B2

1B3
1B4

1A1
1A2

1A3
1A4

1

OE

GND

GND

V

CC

1B7
1B8

1B5
1B6

1A5
1A6

1A7
1A8

V

CC

GND

GND

2B3
2B4

2B1
2B2

2A1
2A2

2A3
2A4

GND

GND

V

CC

2B7
2B8

2B5
2B6

2A5
2A6

2A7
2A8

V

CC

GND

2

DIR

2

OE

1A1

1A2

1A3

1A4

1A5

1A6

1A7

1

OE

1B1

1B2

1B3

1B4

1B5

1B6

1B7

1

DIR

1A8

1B8

2A1

2A2

2A3

2A4

2A5

2A6

2A7

2

OE

2B1

2B2

2B3

2B4

2B5

2B6

2B7

2

DIR

2A8

2B8

163245
163H245

CY74FCT163245

CY74FCT163H245

2

Maximum Ratings

[3, 4]

(Above which the useful life may be impaired. For user guide­lines, not tested.)

Storage Temperature ................................. –55°C to +125°C

Ambient Temperature with

Power Applied.............................................–55°C to +125°C

Supply Voltage Range........................................0.5V to 4.6V

DC Input Voltage ........................................... –0.5V to +7.0V

DC Output Voltage......................................... –0.5V to +7.0V

DC Output Current

(Maximum Sink Current/Pin) ........................–60 to +120 mA

Power Dissipation..........................................................1.0W

Pin Description

Name Description

OE Three-State Output Enable Inputs (Active LOW)
DIR Direction Control
A Inputs or Three-State Outputs

[1]

B Inputs or Three-State Outputs

[1]

Function Table

[2]

Inputs

OutputsOE DIR

L L Bus B Data to Bus A
L H Bus A Data to Bus B

H X High Z State

Operating Range

Range

Ambient

Temperature V

CC

Industrial –40°C to +85°C 2.7V to 3.6V

Electrical Characteristics for Non Bus Hold Devices Over the Operating Range V

CC

=2.7V to 3.6V

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

V

IH

Input HIGH Voltage All Inputs 2.0 5.5 V

V

IL

Input LOW Voltage 0.8 V

V

H

Input Hysteresis

[6]

100 mV

V

IK

Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V

I

IH

Input HIGH Current VCC=Max., VI=5.5 ±1 µA

I

IL

Input LOW Current VCC=Max., VI=GND ±1 µA

I

OZH

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=5.5V ±1 µA

I

OZL

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=GND ±1 µA

I

OS

Short Circuit Current

[7]

VCC=Max., V

OUT

=GND –60 –135 –240 mA

I

OFF

Power-Off Disable VCC=0V, V

OUT

≤4.5V ±100 µA

I

CC

Quiescent Power Supply Current VIN≤0.2V,

V

IN>VCC

–0.2V

VCC=Max. 0.1 10 µA

∆I

CC

Quiescent Power Supply Current
(TTL inputs HIGH)

VIN=VCC–0.6V

[8]

VCC=Max. 2.0 30 µA

Note:

1. On the CY74FCT163H245, these pins have bus hold.

2. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance.

3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature
range.

4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V

CC

or ground.

5. Typical values are at V

CC

=3.3V, TA = +25˚C ambient.

6. This parameter is specified but not tested.

7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internalchip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, I

OS

tests should be performed last.

8. Per TTL driven input; all other inputs at V

CC

or GND.

CY74FCT163245

CY74FCT163H245

3

Electrical Characteristics For Bus Hold Devices Over the Operating Range V

CC

=2.7V to 3.6V

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

V

IH

Input HIGH Voltage All Inputs 2.0 V

CC

V

V

IL

Input LOW Voltage 0.8 V

V

H

Input Hysteresis

[6]

100 mV

V

IK

Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V

I

IH

Input HIGH Current VCC=Max., VI=V

CC

±100 µA

I

IL

Input LOW Current ±100 µA

I

BBH

I

BBL

Bus Hold Sustain Current on Bus Hold Input

[9]

VCC=Min. VI=2.0V –50 µA

VI=0.8V +50 µA

I

BHHO

I

BHLO

BusHold Overdrive Currenton Bus Hold Input

[9]

VCC=Max., VI=1.5V ±500 µA

I

OZH

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT=VCC

±1 µA

I

OZL

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=GND ±1 µA

I

OS

Short Circuit Current

[7]

VCC=Max., V

OUT

=GND –60 –135 –240 mA

I

OFF

Power-Off Disable VCC=0V, V

OUT

≤4.5V ±100 µA

I

CC

Quiescent Power Supply Current VIN≤0.2V,

V

IN>VCC

–0.2V

VCC=Max.

+40 µA

∆

ICC

Quiescent Power supply Current
(TTL inputs HIGH)

VIN=VCC–0.6V

[8]

VCC=Max.

+350 µA

Electrical Characteristics For Balanced Drive Devices Over the Operating Range V

CC

=2.7V to 3.6V

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

I

ODL

Output LOW Dynamic Current

[7]

VCC=3.3V, VIN=V

IH

or VIL, V

OUT

=1.5V

45 180 mA

I

ODH

Output HIGH Dynamic Current

[7]

VCC=3.3V, VIN=V

IH

or VIL, V

OUT

=1.5V

–45 –180 mA

V

OH

Output HIGH Voltage VCC=Min., IOH= –0.1 mA VCC–0.2 V

VCC=Min., IOH= –8 mA 2.4

[10]

3.0 V

VCC=3.0V, IOH= –24 mA 2.0 3.0 V

V

OL

Output LOW Voltage VCC=Min., IOL= 0.1mA 0.2 V

VCC=Min., IOL= 24 mA 0.3 0.55

Notes:

9. Pins with bus hold are described in Pin Description.

10. V

OH=VCC

–0.6V at rated current.

Capacitance

[6]

(TA = +25˚C, f = 1.0 MHz)

Parameter Description Test Conditions Typ.

[5]

Max. Unit

C

IN

Input Capacitance VIN = 0V 4.5 6.0 pF

C

OUT

Output Capacitance V

OUT

= 0V 5.5 8.0 pF