Datasheet CY74FCT163H244CPVC, CY74FCT163H244CPAC, CY74FCT163244CPVCT, CY74FCT163244CPVC, CY74FCT163244CPACT Datasheet (Texas Instruments)

16-Bit Buffers/Line Drivers

CY74FCT163244

CY74FCT163H244

SCCS046 - December 1996 - Revised March 2000

Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.

Copyright © 2000, Texas Instruments Incorporated

Features

• Low power, pin-compatible replacement for LCX and
LPT families

• 5V tolerant inputs and outputs

• 24 mA balanced drive outputs

• Power-off disable outputs permits live insertion

• Edge-rate control circuitry for reduced noise

• FCT-C speed at 4.1 ns

• Latch-up performance exceedsJEDEC standard no. 17

• Typical output skew < 250 ps

• Industrial temperature range of –40˚C to +85˚C

• TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)

• Typical

V

olp

(groundbounce)performanceexceedsMil

Std 883D

•V

CC

= 2.7V to 3.6V

• ESD (HBM) > 2000V

CY74FCT163H244

• Bus hold on data inputs

• Eliminates the need for external pull-up or pull-down
resistors

• Devices with bus hold are not recommended for trans­lating rail-to-rail CMOS signals to 3.3V logic levels

Functional Description

These 16-bit buffers/line drivers are designed for use in
memory driver,clockdriver,or other businterface applications,
wherehigh-speed and low powerare required. Thethree-state
controls are designed to allow 4-bit, 8-bit or combined 16-bit
operation. Flow-through pinout and small shrink packaging
simplifies board layout.

The CY74FCT163244 has 24-mA balanced output drivers
with current limiting resistors in the outputs.

The CY74FCT163H244 has “bus hold” on the data inputs,
which retains the last state of the input whenever the source
driving the input goes to high impedance. This eliminates the
need for pull-up/down resistors and prevents floating inputs.

GND

Logic Block Diagrams CY74FCT163244, CY74FCT163H244

Pin

Configuration

1
2
3
4
5
6
7
8
9
10
11
12

33
32
31
30
29

25

26

27

28

36
35

1

OE

34

SSOP/TSSOP

Top View

1Y1

1Y2

1Y3

1Y4

13
14

15
16
17
18
19
20
21
22
23
24

45
44
43
42
41

37

38

39

40

48
47
46

1A1

1A2

1A3

1A4

1

OE

2Y1

2Y2

2Y3

2Y4

2A1

2A2

2A3

2A4

2

OE

1Y1
1Y2

1Y3
1Y4

1A1
1A2

1A3
1A4

2

OE

GND

GND

V

CC

2Y3
2Y4

2Y1
2Y2

2A1
2A2

2A3
2A4

V

CC

GND

GND

3Y3
3Y4

3Y1
3Y2

3A1
3A2

3A3
3A4

GND

GND

V

CC

4Y3
4Y4

4Y1
4Y2

4A1
4A2

4A3
4A4

V

CC

GND

4

OE

3

OE

3Y1

3Y2

3Y3

3Y4

3A1

3A2

3A3

3A4

3

OE

4Y1

4Y2

4Y3

4Y4

4A1

4A2

4A3

4A4

4

OE

163244
163H244

CY74FCT163244

CY74FCT163H244

2

Maximum Ratings

[3,4]

(Above which the useful life may be impaired. For user guide­lines, not tested.)

Storage Temperature................................. –55°C to +125°C

Ambient Temperature with

Power Applied............................................ –55°C to +125°C

Supply Voltage Range..................................... 0.5V to +4.6V

DC Input Voltage ........................................... –0.5V to +7.0V

DC Output Voltage......................................... –0.5V to +7.0V

DC Output Current

(Maximum Sink Current/Pin) ........................–60 to +120 mA

Power Dissipation..........................................................1.0W

Pin Description

Name Description

OE Three-State Output Enable Inputs (Active LOW)

A Data Inputs

[1]

Y Three-State Outputs

Function Table

[2]

Inputs Outputs

OE A Y

L L L
L H H

H X Z

Operating Range

Range

Ambient

Temperature V

CC

Industrial –40°C to +85°C 2.7V to 3.6V

Electrical Characteristics for Non Bus Hold Devices Over the Operating Range V

CC

=2.7V to 3.6V

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

V

IH

Input HIGH Voltage All Inputs 2.0 5.5 V

V

IL

Input LOW Voltage 0.8 V

V

H

Input Hysteresis

[6]

100 mV

V

IK

Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 – 1.2 V

I

IH

Input HIGH Current VCC=Max., VI=5.5 ±1 µA

I

IL

Input LOW Current VCC=Max., VI=GND ±1 µA

I

OZH

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=5.5V ±1 µA

I

OZL

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=GND ±1 µA

I

OS

Short Circuit Current

[7]

VCC=Max., V

OUT

=GND –60 –135 –240 mA

I

OFF

Power-Off Disable VCC=0V, V

OUT

≤4.5V ±100 µA

I

CC

Quiescent Power Supply Current VIN≤0.2V,

V

IN>VCC

–0.2V

VCC=Max. 0.1 10 µA

∆I

CC

Quiescent Power Supply Current
(TTL inputs HIGH)

VIN=VCC–0.6V

[8]

VCC=Max. 2.0 30 µA

Notes:

1. On the CY74FCT163H244, these pins have “bus hold.”

2. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance.

3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature
range.

4. With the exception of inputs with bus hold, unused inputs must always be connected to an appropriate logic voltage level, preferably either V

CC

or ground.

5. Typical values are at V

CC

=3.3V, TA = +25˚C ambient.

6. This parameter is specified but not tested.

7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internalchip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, I

OS

tests should be performed last.

8. Per TTL driven input; all other inputs at V

CC

or GND.

CY74FCT163244

CY74FCT163H244

3

Electrical Characteristics For Bus Hold Devices Over the Operating Range V

CC

=2.7V to 3.6V

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

V

IH

Input HIGH Voltage All Inputs 2.0 V

CC

V

V

IL

Input LOW Voltage 0.8 V

V

H

Input Hysteresis

[6]

100 mV

V

IK

Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V

I

IH

Input HIGH Current VCC=Max., VI=V

CC

±100 µA

I

IL

Input LOW Current ±100 µA

I

BBH

I

BBL

Bus Hold Sustain Current on Bus Hold Input

[9]

VCC=Min. VI=2.0V –50 µA

VI=0.8V +50 µA

I

BHHO

I

BHLO

Bus Hold Overdrive Current on Bus Hold In­put

[9]

VCC=Max., VI=1.5V ±500 µA

I

OZH

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT=VCC

±1 µA

I

OZL

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=GND ±1 µA

I

OS

Short Circuit Current

[7]

VCC=Max., V

OUT

=GND –60 –135 –240 mA

I

OFF

Power-Off Disable VCC=0V, V

OUT

≤4.5V ±100 µA

I

CC

Quiescent Power Supply Current VIN≤0.2V,

V

IN>VCC

–0.2V

VCC=Max.

+40 µA

∆

ICC

Quiescent Power supply Current
(TTL inputs HIGH)

VIN=VCC–0.6V

[8]

VCC=Max.

+350 µA

Electrical Characteristics For Balanced Drive Devices Over the Operating Range V

CC

=2.7V to 3.6V

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

I

ODL

Output LOW Dynamic Current

[7]

VCC=3.3V, VIN=V

IH

or VIL, V

OUT

=1.5V

45 180 mA

I

ODH

Output HIGH Dynamic Current

[7]

VCC=3.3V, VIN=V

IH

or VIL, V

OUT

=1.5V

–45 –180 mA

V

OH

Output HIGH Voltage VCC=Min., IOH= –0.1 mA VCC–0.2 V

VCC=3.0V, IOH= –8 mA 2.4

[10]

3.0 V

VCC=3.0V, IOH= –24 mA 2.0 3.0 V

V

OL

Output LOW Voltage VCC=Min., IOL= 0.1mA 0.2 V

VCC=Min., IOL= 24 mA 0.3 0.55

Notes:

9. Pins with bus hold are described in Pin Description.

10. V

OH

= VCC – 0.6V at rated current.

CY74FCT163244

CY74FCT163H244

4

Capacitance

[6]

(TA = +25˚C, f = 1.0 MHz)

Parameter Description Test Conditions Typ.

[5]

Max. Unit

C

IN

Input Capacitance VIN = 0V 4.5 6.0 pF

C

OUT

Output Capacitance V

OUT

= 0V 5.5 8.0 pF

Power Supply Characteristics

Parameter Description Test Conditions Typ.

[5]

Max. Unit

I

CCD

Dynamic Power Supply
Current

[10]

VCC=Max., One Input Toggling,
50% Duty Cycle,
Outputs Open,

OE=GND

VIN=VCCor
V

IN

=GND

50 75 µA/MHz

I

C

Total Power Supply
Current

[11]

VCC=Max., f1=10 MHz, 50%
DutyCycle, Outputs Open, One
Bit Toggling,

OE=GND

VIN=VCC or
V

IN

=GND

0.5 0.8 mA

VIN=VCC–0.6V or
V

IN

=GND

0.5 0.8 mA

VCC=Max., f1=2.5 MHz, 50%
Duty Cycle, Outputs Open, Six­teen Bits Toggling,

OE=GND

VIN=VCC or
V

IN

=GND

2.0 3.0

[12]

mA

VIN=VCC–0.6V or
V

IN

=GND

2.0 3.3

[12]

mA

Notes:

11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.

12. I

C

=I

QUIESCENT

+ I

INPUTS

+ I

DYNAMIC

IC=ICC+∆ICCDHNT+I

CCD(f0

/2 + f1N1)

I

CC

= Quiescent Current with CMOS input levels

∆I

CC

= Power Supply Current for a TTL HIGH input (VIN=3.4V)

D

H

= Duty Cycle for TTL inputs HIGH

N

T

= Number of TTL inputs at D

H

I

CCD

= Dynamic Current caused by an input transition pair (HLH or LHL)

f

0

= Clock frequency for registered devices, otherwise zero

f

1

= Input signal frequency

N

1

= Number of inputs changing at f

1

All currents are in milliamps and all frequencies are in megahertz.

13. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.

CY74FCT163244

CY74FCT163H244

5

Switching Characteristics Over the Operating Range V

CC

=3.0V to 3.6V

[14,15]

Parameter Description

CY74FCT163244A

CY74FCT163H244A

CY74FCT163244C

CY74FCT163H244C

Min. Max. Min. Max. Unit Fig. No.

[16]

t

PLH

t

PHL

Propagation Delay Data to
Output

1.5 4.8 1.5 4.1 ns 1, 3

t

PZH

t

PZL

Output Enable Time 1.5 6.2 1.5 5.8 ns 1, 7, 8

t

PHZ

t

PLZ

Output Disable Time 1.5 5.6 1.5 5.2 ns 1, 7, 8

t

SK(O)

Output Skew

[17]

0.5 0.5 ns —

Notes:

14. Minimum limits are specified but not tested on Propagation Delays.

15. For V

CC

=2.7, propagation delay, output enable and output disable times should be degraded by 20%.

16. See “Parameter Measurement Information” in the General Information section.

17. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.

Ordering Information CY74FCT163244

Speed

(ns) Ordering Code

Package

Name Package Type

Operating

Range

4.1 CY74FCT163244CPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT163244CPVC/PVCT O48 48-Lead (300-Mil) SSOP

4.8 CY74FCT163244APACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT163244APVC/PVCT O48 48-Lead (300-Mil) SSOP

Ordering Information CY74FCT163H244

Speed

(ns) Ordering Code

Package

Name Package Type

Operating

Range

4.1 74FCT163H244CPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT163H244CPVC O48 48-Lead (300-Mil) SSOP
74FCT163H244CPVCT O48 48-Lead (300-Mil) SSOP

CY74FCT163244

CY74FCT163H244

6

Package Diagrams

48-Lead ShrunkSmall Outline Package O48

48-Lead ThinShrunk Small Outline Package

Z48

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