Texas Instruments CY74FCT16373ETPACT, CY74FCT16373ETPAC, CY74FCT16373CTPVCT, CY74FCT16373CTPVC, CY74FCT16373CTPACT Datasheet

16-Bit Latches

CY74FCT16373T

CY74FCT162373T

SCCS054 - August 1994 - Revised March 2000

Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.

Copyright © 2000, Texas Instruments Incorporated

Features

• FCT-E speed at 3.4 ns

• Power-off disable outputs permits live insertion

• Edge-rate control circuitry for significantly improved
noise characteristics

• Typical output skew < 250 ps

• ESD > 2000V

• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages

• Industrial temperature range of −40˚C to +85˚C

•V

CC

= 5V ± 10%

CY74FCT16373T Features:

• 64 mA sink current, 32 mA source current

• Typical V

OLP

(ground bounce) <1.0V at VCC = 5V,

TA = 25˚C

CY74FCT162373T Features:

• Balanced 24 mA output drivers

• Reduced system switching noise

• Typical V

OLP

(ground bounce) <0.6V at VCC = 5V,

TA= 25˚C

Functional Description

CY74FCT16373T and CY74FCT162373T are 16-bit D-type
latches designed for use in bus applications requiring high
speed and low power. These devices can be used as two
independent 8-bit latches or as a single 16-bit latch by
connecting the Output Enable (

OE) and Latch (LE) inputs.
Flow-through pinout and small shrink packaging aid in
simplifying board layout. The outputbuffersare designed with
power-off disable feature that allows live insertion of boards.

The CY74FCT16373T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.

The CY74FCT162373T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162373T is ideal for driving transmission lines.

Logic Block Diagrams

Pin

Configuration

D

C

1

OE

FCT162373-1

1

LE

1D1

1O1

TO 7 OTHERCHANNELS

D

C

2

OE

FCT162373-2

2

LE

2D1

2O1

GND

1
2
3
4
5
6
7
8
9
10
11
12

33
32
31
30
29

25

26

27

28

36
35

1

OE

34

SSOP/TSSOP

Top View

13
14

15
16
17
18
19
20
21
22
23
24

45
44
43
42
41

37

38

39

40

48
47
46

1O1
1O2

1O3
1O4

1D1
1D2

1D3
1D4

1

LE

GND

GND

V

CC

1O7
1O8

1O5
1O6

1D5
1D6

1D7
1D8

V

CC

GND

GND

2O3
2O4

2O1
2O2

2D1
2D2

2D3
2D4

GND

GND

V

CC

2O7
2O8

2O5
2O6

2D5
2D6

2D7
2D8

V

CC

GND

2

OE

2

LE

FCT162373-3

TO 7 OTHERCHANNELS

CY74FCT16373T

CY74FCT162373T

2

Maximum Ratings

[2, 3]

(Above which the useful life may be impaired. For user
guidelines, not tested.)

Storage Temperature...................... Com’l −55°C to +125°C

Ambient Temperature with

Power Applied.................................Com’l −55°C to +125°C

DC Input Voltage .................................................−0.5V to +7.0V

DC Output Voltage..............................................−0.5V to +7.0V

DC Output Current

(Maximum Sink Current/Pin)...........................−60 to +120 mA

Power Dissipation..........................................................1.0W

Static Discharge Voltage............................................>2001V

(per MIL-STD-883, Method 3015)

Pin Description

Name Description

D Data Inputs
LE Latch Enable Inputs (Active HIGH)
OE Output Enable Inputs (Active LOW)
O Three-State Outputs

Function Table

[1]

Inputs Outputs

D LE OE O

H H L H

L H L L

X L L Q

0

X X H Z

Operating Range

Range

Ambient

Temperature V

CC

Industrial −40°C to +85°C 5V ± 10%

Electrical Characteristics Over the Operating Range

Parameter Description Test Conditions Min. Typ.

[4]

Max. Unit

V

IH

Input HIGH Voltage 2.0 V

V

IL

Input LOW Voltage 0.8 V

V

H

Input Hysteresis

[5]

100 mV

V

IK

Input Clamp Diode Voltage VCC=Min., IIN=−18 mA −0.7 −1.2 V

I

IH

Input HIGH Current VCC=Max., VI=V

CC

±1 µA

I

IL

Input LOW Current VCC=Max., VI=GND ±1 µA

I

OZH

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=2.7V ±1 µA

I

OZL

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=0.5V ±1 µA

I

OS

Short Circuit Current

[6]

VCC=Max., V

OUT

=GND −80 −140 −200 mA

I

O

Output Drive Current

[6]

VCC=Max., V

OUT

=2.5V −50 −180 mA

I

OFF

Power-Off Disable VCC=0V, V

OUT

≤4.5V

[7]

±1 µA

Output Drive Characteristics for CY74FCT16373T

Parameter Description Test Conditions Min. Typ.

[4]

Max. Unit

V

OH

Output HIGH Voltage VCC=Min., IOH=−3 mA 2.5 3.5 V

VCC=Min., IOH=−15 mA 2.4 3.5 V
VCC=Min., IOH=−32 mA 2.0 3.0 V

V

OL

Output LOW Voltage VCC=Min., IOL=64 mA 0.2 0.55 V

Notes:

1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance. Q

0

=Previous state of flip-flop.

2. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature
range.

3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

4. Typical values are at VCC=5.0V, TA= +25˚C ambient.

5. This parameter is specified but not tested.

6. Not more than one output should be shorted at a time. Durationofshort should not exceed onesecond.The use of high-speed test apparatus and/or sample
and hold techniques are preferablein order to minimize internal chip heating and more accuratelyreflectoperational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.

7. Tested at +25˚C.

CY74FCT16373T

CY74FCT162373T

3

Output Drive Characteristics for CY74FCT162373T

Parameter Description Test Conditions Min. Typ.

[4]

Max. Unit

I

ODL

Output LOW Current

[6]

VCC=5V, VIN=VIH or VIL, V

OUT

=1.5V 60 115 150 mA

I

ODH

Output HIGH Current

[6]

VCC=5V, VIN=VIH or VIL, V

OUT

=1.5V −60 −115 −150 mA

V

OH

Output HIGH Voltage VCC=Min., IOH=−24 mA 2.4 3.3 V

V

OL

Output LOW Voltage VCC=Min., IOL=24 mA 0.3 0.55 V

Capacitance

[5]

(TA = +25˚C, f = 1.0 MHz)

Parameter Description Test Conditions Typ.

[4]

Max. Unit

C

IN

Input Capacitance VIN = 0V 4.5 6.0 pF

C

OUT

Output Capacitance V

OUT

= 0V 5.5 8.0 pF

Power Supply Characteristics

Parameter Description Test Conditions Typ.

[4]

Max. Unit

I

CC

QuiescentPowerSupplyCurrent VCC=Max. VIN≤0.2V,

V

IN≥VCC

−0.2V

5 500 µA

∆I

CC

QuiescentPowerSupplyCurrent
(TTL inputs HIGH)

VCC=Max. VIN=3.4V

[8]

0.5 1.5 mA

I

CCD

Dynamic Power Supply
Current

[9]

VCC=Max., One Input
Toggling, 50% Duty Cycle,
Outputs Open,

OE=GND

VIN=VCC or
V

IN

=GND

60 100 µA/MHz

I

C

Total Power Supply Current

[10]

VCC=Max., f1=10 MHz,
50% Duty Cycle, Outputs
Open, One Bit Toggling,
OE=GND, LE=V

CC

VIN=VCC or
V

IN

=GND

0.6 1.5 mA

VIN=3.4V or
V

IN

=GND

0.9 2.3 mA

VCC=Max., f1=2.5 MHz,
50% Duty Cycle, Outputs
Open,SixteenBitsToggling,
OE=GND, LE=V

CC

VIN=VCC or
V

IN

=GND

2.4 4.5

[11]

mA

VIN=3.4V or
V

IN

=GND

6.4 16.5

[11]

mA

Notes:

8. Per TTL driven input (V

IN

=3.4V); all other inputs at VCC or GND.

9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.

10. I

C

=I

QUIESCENT

+ I

INPUTS

+ I

DYNAMIC

IC=ICC+∆ICCDHNT+I

CCD(f0

/2 + f1N1)

I

CC

= Quiescent Current with CMOS input levels

∆I

CC

= Power Supply Current for a TTL HIGH input(VIN=3.4V)

D

H

= Duty Cycle for TTL inputs HIGH

N

T

= Number of TTL inputs at D

H

I

CCD

= Dynamic Current caused by an input transition pair (HLH or LHL)

f

0

= Clock frequency for registered devices, otherwise zero

f

1

= Input signal frequency

N

1

= Number of inputs changing at f

1

All currents are in milliamps and all frequencies are in megahertz.

11. Values for these conditions are examples of the I

CC

formula. These limits are specified but not tested.