Texas Instruments CY74FCT16244TPVCT, CY74FCT16244TPVC, CY74FCT16244TPACT, CY74FCT16244TPAC, CY74FCT16244ETPVCT Datasheet

16-Bit Buffers/Line Drivers

SCCS028 - December 1987 - Revised March 2000

Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.

CY74FCT16244T

CY74FCT162244T

CY74FCT162H244T

Copyright © 2000, Texas Instruments Incorporated

1CY74FCT16444T/2
H244T

Features

• FCT-E speed at 3.2 ns

• Power-off disable outputs permits live insertion

• Edge-rate control circuitry for significantly improved
noise characteristics

• Typical output skew < 250 ps

• ESD > 2000V

• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages

• Industrial temperature range of –40˚C to +85˚C

• V

CC

= 5V ± 10%

CY74FCT16244T Features:

• 64 mA sink current, 32 mA source current

• Typical V

OLP

(ground bounce)

<1.0V at VCC = 5V, TA = 25˚C

CY74FCT162244T Features:

• Balanced output drivers: 24 mA

• Reduced system switching noise

• Typical V

OLP

(ground bounce)

<0.6V at VCC = 5V, TA= 25˚C

CY74FCT162H244T Features:

• Bus hold on data inputs

• Eliminates the need for external pull-up or pull-down
resistors

Functional Description

These 16-bit buffers/line drivers are designed for use in
memory driver,clockdriver,or otherbusinterfaceapplications,
where high-speed and low power are required. With
flow-through pinout and small shrink packaging board layout
is simplified. The three-state controls are designed to allow
4-bit, 8-bit or combined 16-bit operation. The outputs are de­signed with a power-off disable feature to allow for live
insertion of boards.

The CY74FCT16244T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.

The CY74FCT162244T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for mini­mal undershoot and reduced ground bounce. The
CY74FCT162244T is ideal for driving transmission lines.

TheCY74FCT162H244T isa 24-mAbalanced output part that
has “bus hold” on the data inputs. The device retains the in­put’s last state whenever the input goes to high impedance.
This eliminates the need for pull-up/down resistors and pre­vents floating inputs.

GND

Logic Block Diagrams CY74FCT16244T, CY74FCT162244T,
CY74FCT162H244T

Pin Configuration

1
2
3
4
5
6
7
8
9
10
11
12

33
32
31
30
29

25

26

27

28

36
35

1

OE

34

SSOP/TSSOP

Top View

1Y1

1Y2

1Y3

1Y4

13
14

15
16
17
18
19
20
21
22
23
24

45
44
43
42
41

37

38

39

40

48
47
46

1A1

1A2

1A3

1A4

1

OE

2Y1

2Y2

2Y3

2Y4

2A1

2A2

2A3

2A4

2

OE

1Y1
1Y2

1Y3
1Y4

1A1
1A2

1A3
1A4

2

OE

GND

GND

V

CC

2Y3
2Y4

2Y1
2Y2

2A1
2A2

2A3
2A4

V

CC

GND

GND

3Y3
3Y4

3Y1
3Y2

3A1
3A2

3A3
3A4

GND

GND

V

CC

4Y3
4Y4

4Y1
4Y2

4A1
4A2

4A3
4A4

V

CC

GND

4

OE

3

OE

3Y1

3Y2

3Y3

3Y4

3A1

3A2

3A3

3A4

3

OE

4Y1

4Y2

4Y3

4Y4

4A1

4A2

4A3

4A4

4

OE

FCT16244–1 FCT16244–2

FCT16244–3

FCT16244–4

FCT16244–5

16244T
162244T
162H244T

CY74FCT16244T

CY74FCT162244T

CY74FCT162H244T

2

Maximum Ratings

[3,4]

(Above which the useful life may be impaired. For user
guidelines, not tested.)

Storage Temperature................................. –55°C to +125°C

Ambient Temperature with

Power Applied.............................................–55°C to +125°C

DC Input Voltage ........................................... –0.5V to +7.0V

DC Output Voltage......................................... –0.5V to +7.0V

DC Output Current

(Maximum Sink Current/Pin) ........................–60 to +120 mA

Power Dissipation..........................................................1.0W

Static Discharge Voltage............................................>2001V

(per MIL-STD-883, Method 3015)

Notes:

1. On CY74FCT162H244T these pins have “bus hold.”

2. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Importance.

3. Operationbeyondthe limitssetforthmay impairtheuseful life ofthe device. Unlessotherwise noted, these limits areover the operatingfree-air temperature range.

4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V

CC

or ground.

Pin Description

Name Description

OE Three-State Output Enable Inputs (Active LOW)
A Data Inputs

[1]

Y Three-State Outputs

Function Table

[2]

Inputs Outputs

OE A Y

L L L
L H H

H X Z

Ordering Range

Range

Ambient

Temperature V

CC

Industrial – 40°C to +85°C 5V ± 10%

Electrical Characteristics Over the Operating Range

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

V

IH

Input HIGH Voltage 2.0 V

V

IL

Input LOW Voltage 0.8 V

V

H

Input Hysteresis

[6]

100 mV

V

IK

Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V

I

IH

Input HIGH Current Standard VCC=Max., VI=V

CC

±1 µA

Bus Hold ±100

I

IL

Input LOW Current Standard VCC=Max., VI=GND ±1 µA

Bus Hold ±100 µA

I

BBH

I

BBL

Bus Hold Sustain Current on Bus Hold Input

[7]

VCC=Min. VI=2.0V –50 µA

VI=0.8V +50

I

BHHO

I

BHLO

Bus Hold Overdrive Current on Bus Hold Input

[7]

VCC=Max., VI=1.5V TBD mA

I

OZH

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=2.7V ±1 µA

I

OZL

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=0.5V ±1 µA

I

OS

Short Circuit Current

[8]

VCC=Max., V

OUT

=GND –80 –140 –200 mA

I

O

Output Drive Current

[8]

VCC=Max., V

OUT

=2.5V –50 –180 mA

I

OFF

Power-Off Disable VCC=0V, V

OUT

≤4.5V

[9]

±1 µA

CY74FCT16244T

CY74FCT162244T

CY74FCT162H244T

3

Output Drive Characteristics for CY74FCT16244T

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

V

OH

Output HIGH Voltage VCC=Min., IOH=–3 mA 2.5 3.5 V

VCC=Min., IOH=–15 mA 2.4 3.5 V
VCC=Min., IOH=–32 mA 2.0 3.0 V

V

OL

Output LOW Voltage VCC=Min., IOL=64 mA 0.2 0.55 V

Output Drive Characteristics for CY74FCT162244T, CY74FCT162H244T

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

I

ODL

Output LOW Current

[8]

VCC=5V, VIN=VIH or VIL, V

OUT

=1.5V 60 115 150 mA

I

ODH

Output HIGH Current

[8]

VCC=5V, VIN=VIH or VIL, V

OUT

=1.5V –60 –115 –150 mA

V

OH

Output HIGH Voltage VCC=Min., IOH=–24 mA 2.4 3.3 V

V

OL

Output LOW Voltage VCC=Min., IOL=24 mA 0.3 0.55 V

Notes:

5. Typical values are at V

CC

=5.0V, TA = +25˚C ambient.

6. This parameter is specified but not tested.

7. Pins with bus hold are described in Pin Description.

8. Not more than oneoutput shouldbe shorted at atime. Durationof short should not exceed one second. Theuse ofhigh-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting
ofa high output mayraisethe chip temperature well abovenormal and therebycause invalidreadings in other parametrictests.Inanysequenceof parameter
tests, I

OS

tests should be performed last.

9. Tested at +25˚C.

CY74FCT16244T

CY74FCT162244T

CY74FCT162H244T

4

Capacitance

[6]

(TA = +25˚C, f = 1.0 MHz)

Parameter Description Test Conditions Typ.

[5]

Max. Unit

C

IN

Input Capacitance VIN = 0V 4.5 6.0 pF

C

OUT

Output Capacitance V

OUT

= 0V 5.5 8.0 pF

Power Supply Characteristics

Parameter Description Test Conditions Typ.

[5]

Max. Unit

I

CC

Quiescent Power Supply Current VCC=Max. VIN≤0.2V,

V

IN≤VCC

-0.2V

5 500 µA

∆I

CC

Quiescent Power Supply Current
(TTL inputs HIGH)

VCC=Max. VIN=3.4V

[10]

0.5 1.5 mA

I

CCD

Dynamic Power Supply
Current

[11]

VCC=Max.,One InputToggling,
50% Duty Cycle, Outputs
Open,

OE=GND

VIN=VCC or
V

IN

=GND

60 100 µA/MHz

I

C

Total Power Supply Current

[12]

VCC=Max., f1=10 MHz,
50% Duty Cycle, Outputs
Open, One Bit Toggling,
OE=GND

VIN=VCC or
V

IN

=GND

0.6 1.5 mA

VIN=3.4V or
V

IN

=GND

0.9 2.3 mA

VCC=Max., f1=2.5 MHz, 50%
DutyCycle, Outputs Open,Six­teen Bits Toggling,
OE=GND

VIN=VCC or
V

IN

=GND

2.4 4.5

[13]

mA

VIN=3.4V or
V

IN

=GND

6.4 16.5

[13]

mA

Notes:

10. Per TTL driven input (V

IN

= 3.4V); all other inputs at VCC or GND.

11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.

12. I

C=IQUIESCENT

+ I

INPUTS

+ I

DYNAMIC

IC=ICC+∆ICCDHNT+I

CCD(f0

/2 + f1N1)

I

CC

= Quiescent Current with CMOS input levels

I

CC

= Power Supply Current for a TTL HIGH input (VIN=3.4V)

D

H

= Duty Cycle for TTL inputs HIGH

N

T

= Number of TTL inputs at D

H

I

CCD

= Dynamic Current caused by an input transition pair (HLH or LHL)

f

0

= Clock frequency for registered devices, otherwise zero

f

1

= Input signal frequency

N

1

= Number of inputs changing at f

1

All currents are in milliamps and all frequencies are in megahertz.

13. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.

CY74FCT16244T

CY74FCT162244T

CY74FCT162H244T

5

SSwitching Characteristics Over the Operating Range

[14]

Parameter Description

CY74FCT16244T

CY74FCT162244T

CY74FCT16244AT

CY74FCT162244AT

CY74FCT162H244AT

Min. Max. Min. Max. Unit Fig. No.

[15]

t

PLH

t

PHL

Propagation Delay Data to Output 1.5 6.5 1.5 4.8 ns 1, 3

t

PZH

t

PZL

Output Enable Time 1.5 8.0 1.5 6.2 ns 1, 7, 8

t

PHZ

t

PLZ

Output Disable Time 1.5 7.0 1.5 5.6 ns 1, 7, 8

t

SK(O)

Output Skew

[16]

0.5 0.5 ns —

Switching Characteristics Over the Operating Range

[14]

(continued)

Parameter Description

CY74FCT16244CT

CY74FCT162244CT

CY74FCT162H244CT

CY74FCT16244ET

CY74FCT162244ET

CY74FCT162H244ET

Min. Max. Min. Max. Unit Fig. No.

[15]

t

PLH

t

PHL

Propagation Delay Data to Output 1.5 4.1 1.5 3.2 ns 1, 3

t

PZH

t

PZL

Output Enable Time 1.5 5.8 1.5 4.4 ns 1, 7, 8

t

PHZ

t

PLZ

Output Disable Time 1.5 5.2 1.5 3.6 ns 1, 7, 8

t

SK(O)

Output Skew

[16]

0.5 0.5 ns —

Notes:

14. Minimum limits are specified but not tested on Propagation Delays.

15. See “Parameter Measurement Information” in the General Information section.

16. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.

CY74FCT16244T

CY74FCT162244T

CY74FCT162H244T

6

Document #: 38-00396-C

Ordering Information CY74FCT16244

Speed

(ns) Ordering Code

Package

Name Package Type

Operating

Range

3.2 CY74FCT16244ETPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16244ETPVC/PVCT O48 48-Lead (300-Mil) SSOP

4.1 CY74FCT16244CTPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16244CTPVC/PVCT O48 48-Lead (300-Mil) SSOP

4.8 CY74FCT16244ATPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16244ATPVC/PVCT O48 48-Lead (300-Mil) SSOP

6.5 CY74FCT16244TPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16244TPVC/PVCT O48 48-Lead (300-Mil) SSOP

Ordering Information CY74FCT162244

Speed

(ns) Ordering Code

Package

Name Package Type

Operating

Range

3.2 74FCT162244ETPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162244ETPVC O48 48-Lead (300-Mil) SSOP
74FCT162244ETPVCT O48 48-Lead (300-Mil) SSOP

4.1 74FCT162244CTPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162244CTPVC O48 48-Lead (300-Mil) SSOP
74FCT162244CTPVCT O48 48-Lead (300-Mil) SSOP

4.8 74FCT162244ATPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162244ATPVC O48 48-Lead (300-Mil) SSOP
74FCT162244ATPVCT O48 48-Lead (300-Mil) SSOP

6.5 CY74FCT162244TPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162244TPVC/PVCT O48 48-Lead (300-Mil) SSOP

Ordering Information CY74FCT162H244

Speed

(ns) Ordering Code

Package

Name Package Type

Operating

Range

3.2 74FCT162H244ETPACT Z48 48-Lead (240-Mil) TSSOP Industrial
74FCT162H244ETPVC/PVCT O48 48-Lead (300-Mil) SSOP

4.1 74FCT162H244CTPVC/PVCT O48 48-Lead (300-Mil) SSOP Industrial

4.8 74FCT162H244ATPACT Z48 48-Lead (240-Mil) TSSOP Industrial

CY74FCT16244T

CY74FCT162244T

CY74FCT162H244T

7

Package Diagrams

48-Lead Shrunk Small Outline Package O48

48-Lead Thin Shrunk SmallOutline Package

Z48

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