TEXAS INSTRUMENTS CDCLVD110 Technical data
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CDCLVD110
PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER
SCAS684 – SEPTEMBER 2002
D Low-Output Skew <30 ps (Typical) for
Clock-Distribution applications
TQFP PACKAGE
(TOP VIEW)
D Distributes One Differential Clock Input to
10 LVDS Differential Clock Outputs
D V
range 2.5 V ±5%
CC
D Typical Signaling Rate Capability of Up to
1.1 GHz
D Configurable Register (SI/CK) Individually
Enables Disables Outputs, Selectable
CLK0, CLK0
or CLK1, CLK1 Inputs
D Full Rail-to-Rail Common-Mode Input
Range
D Receiver Input Threshold ±100 mV
VSS
Q2
Q2
Q1
Q1
Q0
Q0
VDD
Q3Q3Q4Q4Q5Q5Q6
24 18
23 22 21 20 19
25
26
27
28
29
30
31
32
345
12
Q6
17
16
15
14
13
12
11
10
9
67 8
D Available in 32-Pin TQFP Package
SI
D Fail-Safe I/O-Pins for V
Down)
= 0 V (Power
DD
CK
description
The CDCL VD1 10 clock driver distributes one pair of dif ferential L VDS clock inputs (either CLK0 or CLK1) to 10
pairs of differential clock outputs (Q0, Q9) with minimum skew for clock distribution. The CDCLVD110 is
specifically designed for driving 50-Ω transmission lines.
When the control enable is high (EN = 1), the 10 differential outputs are programmable in that each output can
be individually enabled/disabled (3-stated) according to the first 10 bits loaded into the shift register. Once the
shift register is loaded, the last bit selects either CLK0 or CLK1 as the clock input. However, when EN = 0, the
outputs are not programmable and all outputs are enabled.
CLK0
CLK0
V
BB
CLK1
CLK1
EN
VDD
Q7
Q7
Q8
Q8
Q9
Q9
VSS
The CDCLVD110 is characterized for operation from –40 °C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2002, Texas Instruments Incorporated
1
CDCLVD110
PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER
SCAS684 – SEPTEMBER 2002
functional block diagram
CK
CLK0
CLK0
CLK1
CLK1
SI
EN
0
CLK_SEL
Mux
0
Mux
1
11-Bit Shift Register
11-Bit Control Register
10
1
0198765432
12-Bit
Counter
Q9
Q9
Q8
Q8
Q7
Q7
Q6
Q6
Q5
Q5
Q4
Q4
Q3
Q3
Q2
Q2
Q1
Q1
Q0
V
BB
Q0
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDCLVD110
PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER
SCAS684 – SEPTEMBER 2002
Terminal Functions
TERMINAL
NAME NO.
CK 1 I Control register input clock, features a 120-kΩ pullup resistor
SI 2 I Control register serial input/CLK Select, features a 120-kΩ pulldown resistor
CLK0 3 I Complementary differential input, LVDS
CLK0 4 I True differential input, LVDS
V
BB
CLK1 6 I Complementary differential input, LVDS
CLK1 7 I True differential input, LVDS
EN 8 I Control enable (for programmability), features a 120-kΩ pulldown resistor, input
V
SS
V
DD
Q [9:0] 11, 13, 15, 18, 20,
Q[9:0] 10, 12, 14, 17, 19,
5 O Reference voltage output
9, 25 Device ground
16, 32 Supply voltage
22, 24, 27, 29, 31
21,23, 26, 28, 30
absolute maximum ratings
Supply voltage, V
Input voltage, V
Output voltage, V
Driver short circuit current, Qn, Qn
DD
–0.2 V to (VDD + 0.2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
O
I/O
O Clock outputs, these outputs provide low-skew copies of CLKIN
O Complementary clock outputs, these outputs provide low-skew copies of CLKIN
†
–0.3 V to 2.8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–0.2 V to (VDD + 0.2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
, I
Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OSD
DESCRIPTION
Electrostatic discharge (HBM 1.5 kΩ, 100 pF), ESD >2000 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
Supply voltage, V
Receiver common-mode input voltage, V
Operating free-air temperature, T
DD
IC
A
MIN NOM MAX UNIT
2.375 2.5 2.625 V
0.5|VID| VDD – 0.5|VID| V
–40 85 °C
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
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