TEXAS INSTRUMENTS CDC392 Technical data
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CDC392
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS
SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995
GND
1Y2
1Y3
GND
2Y1
2Y2
GND
3Y1
D PACKAGE
(TOP VIEW)
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
1Y1
1T
/C
V
CC
2T/C
A
V
CC
3T/C
OE
D
Low Output Skew for Clock-Distribution
and Clock-Generation Applications
D
TTL-Compatible Inputs and
CMOS-Compatible Outputs
D
Distributes One Clock Input to Six Clock
Outputs
D
Polarity Control Selects True or
Complementary Outputs
D
Distributed VCC and GND Pins Reduce
Switching Noise
D
High-Drive Outputs (–32-mA IOH,
32-mA IOL)
D
State-of-the-Art
EPIC-ΙΙB
BiCMOS Design
Significantly Reduces Power Dissipation
D
Packaged In Plastic Small-Outline Package
description
The CDC392 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew
for clock distribution. Through the use of the polarity-control (T/C) inputs, various combinations of true and
complementary outputs can be obtained. The output-enable (OE
high-impedance state.
The CDC392 is characterized for operation from –40°C to 85°C.
) input is provided to disable the outputs to a
FUNCTION TABLE
INPUTS
OE T/C A
H X X Z
L LL L
L LH H
L HL H
L H H L
OUTPUT
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1995, Texas Instruments Incorporated
1
CDC392
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS
SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
9
OE
1T/C
2T/C
3T
12
A
15
13
10
/C
EN
N1
N2
N3
1
1
1
2
2
3
logic diagram (positive logic)
9
OE
1T
15
/C
16
1Y1
2
1Y2
3
1Y3
5
2Y1
6
2Y2
8
3Y1
16
1Y1
2
1Y2
2T
3T
3
1Y3
12
A
5
2Y1
13
/C
10
/C
6
2Y2
8
3Y1
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC392
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS
SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state or power-off state, VO –0.5 V to VCC + 0.5 V. . . . . . .
Current into any output in the low state, IO 64 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Output clamp current, I
Maximum power dissipation at TA = 55°C (in still air) (see Note 2) 0.77 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 300 mils.
For more information, refer to the
Data Book
, literature number SCBD002B.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(V
< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(V
OK
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
Package Thermal Considerations
application note in the 1994
ABT Advanced BiCMOS T echnology
recommended operating conditions (see Note 3)
MIN NOM MAX UNIT
V
CC
V
IH
V
IL
V
I
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 5 ns/V
f
clock
T
A
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
Supply voltage 4.75 5 5.25 V
High-level input voltage 2 V
Low-level input voltage 0.8 V
Input voltage 0 V
High-level output current –32 mA
Low-level output current 32 mA
Input clock frequency 90 MHz
Operating free-air temperature –40 85 °C
CC
V
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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