Texas Instruments CDC340DWR, CDC340DW, CDC340DBLE Datasheet

CDC340

1-LINE TO 8-LINE CLOCK DRIVER

SCAS332B – DECEMBER 1992 – REVISED MA Y 1997

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Low Output Skew, Low Pulse Skew for
Clock-Distribution and Clock-Generation
Applications

D

TTL-Compatible Inputs and Outputs

D

Distributes One Clock Input to Eight
Outputs

D

Distributed VCC and Ground Pins Reduce
Switching Noise

D

High-Drive Outputs (–48-mA IOH,
48-mA I

OL

)

D

State-of-the-Art

EPIC-ΙΙB

 BiCMOS Design

Significantly Reduces Power Dissipation

D

Package Options Include Plastic
Small-Outline (DW) and Shrink

description

The CDC340 is a high-performance clock-driver circuit that distributes one (A) input signal to eight (Y) outputs
with minimum skew for clock distribution. Through the use of the control pins (1G and 2G), the outputs can be
placed in a high state regardless of the A input.

The propagation delays are adjusted at the factory using the P0 and P1 pins. These pins are not intended for
customer use and should be strapped to GND.

The CDC340 is characterized for operation from 0°C to 70°C.

FUNCTION TABLE

INPUTS

OUTPUTS

1G 2G A 1Y1–1Y4 2Y1–2Y4

X X L H H
L LH H H
L HH H L
H LH L H
H H H L L

Copyright  1997, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

V

CC

1G
2G

A
P0
P1

V

CC

2Y4
2Y3

GND

V

CC

1Y1
1Y2
GND
1Y3
1Y4
GND
2Y1
2Y2
GND

DW PACKAGE

(TOP VIEW)

CDC340
1-LINE TO 8-LINE CLOCK DRIVER

SCAS332B – DECEMBER 1992 – REVISED MA Y 1997

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol

†

4

A

1Y1

19

1

1Y2

18

1

1Y3

16

1

1Y4

15

1

2Y1

13

2

2Y2

12

2

2Y3

9

2

2Y4

8

2

G1

2

1G

G2

3

2G

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)

1Y1

19

3

2G

1Y2

18

1Y3

16

1Y4

15

2Y1

13

2Y2

12

2Y3

9

2Y4

8

2

1G

4

A

CDC340

1-LINE TO 8-LINE CLOCK DRIVER

SCAS332B – DECEMBER 1992 – REVISED MA Y 1997

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Supply voltage range, V

CC

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high state or power-off state,

VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Current into any output in the low state, IO 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, I

IK

(V

I

< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum power dissipation at TA = 55°C (in still air) (see Note 2):DW package 1.6 W. . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
For more information, refer to the

Package Thermal Considerations

Application Note in the

ABT Advanced BiCMOS Technology

Data Book

, literature number SCBD002.

recommended operating conditions (see Note 3)

MIN MAX UNIT

V

CC

Supply voltage 4.75 5.25 V

V

IH

High-level input voltage 2 V

V

IL

Low-level input voltage 0.8 V

V

I

Input voltage 0 V

CC

V

I

OH

High-level output current –48 mA

I

OL

Low-level output current 48 mA

p

One output back loaded 80

f

clock

Input clock frequenc

y

Both output banks loaded

40

MH

z

T

A

Operating free-air temperature 0 70 °C

NOTE 3: Unused inputs must be held high or low to prevent them from floating.

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

TA = 25°C

PARAMETER

TEST CONDITIONS

MIN TYP‡MAX

MIN

MAX

UNIT

V

IK

VCC = 4.75 V , II = –18 mA –1.2 –1.2 V
VCC = 4.75 V , IOH = – 3 mA 2.5 2.5

V

OH

VCC = 5 V, IOH = – 3 mA 3 3

V

VCC = 4.75 V , IOH = – 48 mA 2 2

V

OL

VCC = 4.75 V , IOL = 48 mA 0.5 V

I

I

VCC = 5.25 V , VI = VCC or GND ±1 ±1 µA

I

O

§

VCC = 5.25 V , VO = 2.5 V –50 –100 –200 –50 –200 mA
V

= 5.25 V , I

= 0,

Outputs high 2 3.5

I

CC

CC

,

O

,

VI = VCC or GND

Outputs low 24 33

mA

C

i

VI = 2.5 V or 0.5 V 3 pF

‡

All typical values are at VCC = 5 V.

§

No more than one output should be tested at a time, and the duration of the test should not exceed one second.