CDC328A
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY
SCAS327B – DECEMBER 1992 – REVISED NOVEMBER 1995
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Low Output Skew for Clock-Distribution
and Clock-Generation Applications
D
TTL-Compatible Inputs and Outputs
D
Distributes One Clock Input to Six Clock
Outputs
D
Polarity Control Selects True or
Complementary Outputs
D
Distributed VCC and GND Pins Reduce
Switching Noise
D
High-Drive Outputs (–48-mA IOH,
48-mA IOL)
D
State-of-the-Art
EPIC-ΙΙB
BiCMOS Design
Significantly Reduces Power Dissipation
D
Package Options Include Plastic
Small-Outline (D) and Shrink Small-Outline
(DB) Packages
description
The CDC328A contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew
for clock distribution. Through the use of the polarity-control inputs (T/C), various combinations of true and
complementary outputs can be obtained.
The CDC328A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUT
T/C A
Y
L L L
L HH
H LH
H H L
logic symbol
†
12
A
N1
15
N2
13
1Y1
16
1
1Y2
2
1
2Y1
3
2
N3
10
N4
9
2Y2
5
2
3Y
6
3
4Y
8
4
1T/C
2T
/C
3T
/C
4T/C
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
D OR DB PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
1Y2
2Y1
GND
2Y2
3Y
GND
4Y
1Y1
1T
/C
V
CC
2T/C
A
V
CC
3T/C
4T
/C
CDC328A
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY
SCAS327B – DECEMBER 1992 – REVISED NOVEMBER 1995
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
1Y1
1Y2
2Y1
2Y2
3Y
4Y
16
2
3
5
6
8
15
13
12
10
9
1T
/C
A
2T
/C
3T
/C
4T
/C
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state
or power-off state, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state, I
O
96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): D package 0.77 W. . . . . . . . . . . . . . . . . .
DB package 0.6 W. . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 300 mils.
For more information, refer to the
Package Thermal Considerations
application note in the 1994
ABT Advanced BiCMOS T echnology
Data Book
, literature number SCBD002B.
CDC328A
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY
SCAS327B – DECEMBER 1992 – REVISED NOVEMBER 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
MIN NOM MAX UNIT
V
CC
Supply voltage 4.75 5 5.25 V
V
IH
High-level input voltage 2 V
V
IL
Low-level input voltage 0.8 V
V
I
Input voltage 0 V
CC
V
I
OH
High-level output current –48 mA
I
OL
Low-level output current 48 mA
∆t/∆v Input transition rise or fall rate 5 ns/V
f
clock
Input clock frequency 100 MHz
T
A
Operating free-air temperature –40 85 °C
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
CDC328A
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY
SCAS327B – DECEMBER 1992 – REVISED NOVEMBER 1995
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
IK
VCC = 4.75 V , II = –18 mA –1.2 V
V
OH
VCC = 4.75 V , IOH = –48 mA 2 V
V
OL
VCC = 4.75 V , IOL = 48 mA 0.5 V
I
I
VCC = 5.25 V , VI = VCC or GND ±1 µA
I
O
‡
VCC = 5.25 V , VO = 2.5 V –15 –100 mA
V
= 5.25 V , I
= 0,
Outputs high 10
I
CC
CC
,
O
,
VI = VCC or GND
Outputs low 40
mA
C
i
VI = 2.5 V or 0.5 V 3 pF
†
All typical values are at VCC = 5 V, TA = 25°C
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (see Figures 1 and 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN MAX UNIT
t
PLH
1.7 5
t
PHL
A
Any Y
1.5 5
ns
t
PLH
1.5 5
t
PHL
T/C
Any Y
1.4 5
ns
Any Y (same phase) 0.5
t
sk(o)
A
Any Y (any phase) 1
ns
t
sk(p)
A Any Y 1 ns
t
r
Any Y 1.5 ns
t
f
Any Y 1.5 ns
CDC328A
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY
SCAS327B – DECEMBER 1992 – REVISED NOVEMBER 1995
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR OUTPUTS
500 Ω
t
PLH
t
PHL
1.5 V 1.5 V
3 V
0 V
1.5 V
1.5 V
V
OH
V
OL
2 V
0.8 V 0.8 V
t
f
t
r
Input
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
Output
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
Figure 1. Load Circuit and Voltage Waveforms
CDC328A
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY
SCAS327B – DECEMBER 1992 – REVISED NOVEMBER 1995
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
t
PLH1
2Y2
2Y1
2T
/C
1Y2
1Y1
1T
/C
A
t
PHL1
t
PLH5
t
PHL5
t
PLH2
t
PHL2
t
PLH6
t
PHL6
t
PLH3
t
PHL3
t
PHL7
t
PLH7
t
PLH4
t
PHL4
t
PHL8
t
PLH8
NOTES: A. Output skew, t
sk(o),
from A to any Y (same phase), can be measured only between outputs for which the respective polarity-control
inputs (T
/C) are at the same logic level. It is calculated as the greater of:
– The difference between the fastest and slowest of t
PLH
from A↑ to any Y (e.g., t
PLHn
, n = 1 to 4; or t
PLHn
, n = 5 to 6)
– The difference between the fastest and slowest of t
PHL
from A↓ to any Y (e.g., t
PHLn
, n = 1 to 4; or t
PHLn
, n = 5 to 6)
– The difference between the fastest and slowest of t
PLH
from A↓ to any Y (e.g., t
PLHn
, n = 7 to 8)
– The difference between the fastest and slowest of t
PHL
from A↑ to any Y (e.g., t
PHLn
, n = 7 to 8)
B. Output skew, t
sk(o),
from A to any Y (any phase), can be measured between outputs for which the respective polarity-control inputs
(T
/C) are at the same or different logic levels. It is calculated as the greater of:
– The difference between the fastest and slowest of t
PLH
from A↑ to any Y or t
PHL
from A↑ to any Y (e.g., t
PLHn
, n = 1 to 4;
or t
PLHn
, n = 5 to 6, and t
PHLn
, n = 7 to 8)
– The difference between the fastest and slowest of t
PHL
from A↓ to any Y or t
PLH
from A↓ to any Y (e.g., t
PHLn
, n = 1 to 4;
or t
PHLn
, n = 5 to 6, and t
PLHn
, n = 7 to 8)
C. Pulse skew, t
sk(p)
, is calculated as the greater of t
PLHn
- t
PHLn
(n = 1, 2, 3, 4, 5, 6 ,7, 8).
Figure 2. Waveforms for Calculation of t
sk(o)
, t
sk(p)
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICA TIONS IS UNDERSTOOD T O
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
Loading...