Datasheet CD74HCT221M96, CD74HCT221M, CD74HCT221E, CD74HC221M96, CD74HC221M Datasheet (Texas Instruments)

...
CD74HC221,
/ j
[ /Title (CD74 HC221 , CD74 HCT22
1) Sub­ect
(High Speed CMOS Logic Dual Monos table Multi-
Data sheet acquired from Harris Semiconductor SCHS166A
November 1997 - Revised April 1999
Features
• Overriding RESET Terminates Output Pulse
• Triggering from the Leading or Trailing Edge
• Q and
• Wide Range of Output-Pulse Widths
• Schmitt Trigger on B Inputs
• Fanout (Over Temperature Range)
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
• HC Types
• HCT Types
Q Buffered Outputs
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
o
Logic ICs
- 2V to 6V Operation
- High Noise Immunity: N at VCC = 5V
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, V
= 0.8V (Max), VIH = 2V (Min)
IL
- CMOS Input Compatibility, I
= 30%, NIH = 30% of V
IL
1µA at VOL, V
l
Dual Monostable Multivibrator with Reset
C to 125oC
CC
OH
CD74HCT221
High Speed CMOS Logic
Description
The CD74HC221, and CH74HCT221 are dual monostable multivibrators with reset. An external resistor (R external capacitor (C for the circuit. Adjustment of R range of output pulse widths from the Q and Pulse triggering on the B input occurs at a particular voltage level and is not related to the rise and fall time of the trigger pulse.
Once triggered, the outputs are independent of further trigger inputs on LOW level on the Reset ( and leading-edge-triggering (B) inputs are provided for triggering from either edge of the input pulse. On power up, the IC is reset. If either Mono is not used each input (on the unused device) must be terminated either high or low.
The minimum value of external resistance, R The minimum value of external capacitance, C calculation for the pulse width is t
A and B. The output pulse can be terminated by a
) control the timing and the accuracy
X
R) pin. Trailing Edge triggering (A)
and CXprovides a wide
X
, is typically 500.
X
= 0.7 RXCX at VCC = 4.5V.
W
Ordering Information
PART NUMBER TEMP. RANGE (oC) PACKAGE
CD74HC221E -55 to 125 16 Ld PDIP E16.3 CD74HCT221E -55 to 125 16 Ld PDIP E16.3 CD74HC221M -55 to 125 16 Ld SOIC M16.15 CD74HCT221M -55 to 125 16 Ld SOIC M16.15
NOTES:
1. When ordering, use the entire partnumber. Add the suffix 96 to obtain the variant in the tape and reel.
2. Wafer or die are available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information.
) and an
X
Q terminals.
, is 0pF. The
X
PKG.
NO.
Pinout
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
© Harris Corporation 1997
CD74HC221, CD74HCT221
(PDIP, SOIC)
TOP VIEW
1
1A 1B
2 3
1R
4
1Q
5
2Q
2C
6
X
7
2C
XRX
8
GND
1
16
V
CC
15
1C
XRX
14
1C
X
13
1Q
12
2Q
11
2R 2B
10
9
2A
File Number 1670.1
Functional Diagram
CD74HC221, CD74HCT221
1A
1B
1R
2R
2A
2B
14 15
1C
X
1
2
3
11
9
10
2C
X
67
1CX1R
MONO 1
MONO 2
2CX2R
1CXR
2CXR
X
V
CC
X
13
1Q
4
1Q
5
2Q
12
2Q
X
V
CC
X
TRUTH TABLE
INPUTS OUTPUTS
ABRQQ
HXHLH XLHLH
LH
HH
XXLLH
LH
(Note 3) (Note 3)
NOTE: H = High Voltage Level,L = Low VoltageLevel,X = Irrelevant, = Transitionfrom Low to High Level,↓ = Transition from High to Low Level, = One High Level Pulse,
= One Low Level Pulse
3. For this combination the reset input must be low and the following sequence must be used: pin 1 (or 9) must be set high or pin 2 (or 10) set low; then pin 1 (or 9) must be low and pin 2 (or 10) set high. Now the reset input goes from low-to-high and the device will be triggered.
2
CD74HC221, CD74HCT221
Logic Diagram
1 (9)A2 (10)
S
QM QM
MASK
FF
B
R
S
QQ
4 (12) (13) 5
QQ
R
3 (11)
C
N
R
MAIN
FF
P
RESET
FF
V
CC
PP
R1
N
V
CC
V
CC
R
D C
QC
MIRROR VOLTAGE
PULLDOWN
FF
QD
C
Q
C
R
OP
AMP
R4
V
CC
16
R
X
P
P
R2
N
15 (7)
RXC
14 (6)
C
8
X
C
X
GND
X
-
+
R3
+
­OP AMP
3
CD74HC221, CD74HCT221
Absolute Maximum Ratings Thermal Information
DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I
IK
For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I
OK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Drain Current, per Output, I
O
For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±25mA
DC Output Source or Sink Current per Output Pin, I
O
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, V
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V
Input Rise and Fall Time, tr, tf on Inputs A and R
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
Input Rise and Fall Time, tr, tf on Input B
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
4. θJA is measured with the component mounted on an evaluation PC board in free air.
CC
Thermal Resistance (Typical, Note 4) θJA (oC/W) θJC (oC/W)
PDIP Package. . . . . . . . . . . . . . . . . . . 100 N/A
SOIC Package. . . . . . . . . . . . . . . . . . . 180 N/A
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
CC
DC Electrical Specifications
PARAMETER SYMBOL
HC TYPES
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage CMOS Loads
High Level Output Voltage TTL Loads
Low Level Output Voltage CMOS Loads
Low Level Output Voltage TTL Loads
V
IH
V
IL
V
OH
V
OL
TEST
CONDITIONS
(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX
I
V
CC
(V)
o
C -40oC TO 85oC -55oCTO125oC
25
UNITSV
- - 2 1.5 - - 1.5 - 1.5 - V
4.5 3.15 - - 3.15 - 3.15 - V 6 4.2 - - 4.2 - 4.2 - V
- - 2 - - 0.5 - 0.5 - 0.5 V
4.5 - - 1.35 - 1.35 - 1.35 V 6 - - 1.8 - 1.8 - 1.8 V
VIHor VIL-0.02 2 1.9 - - 1.9 - 1.9 - V
-0.02 4.5 4.4 - - 4.4 - 4.4 - V
-0.02 6 5.9 - - 5.9 - 5.9 - V
- - ---- - - - V
-4 4.5 3.98 - - 3.84 - 3.7 - V
-5.2 6 5.48 - - 5.34 - 5.2 - V
VIHor VIL0.02 2 - - 0.1 - 0.1 - 0.1 V
0.02 4.5 - - 0.1 - 0.1 - 0.1 V
0.02 6 - - 0.1 - 0.1 - 0.1 V
- - ---- - - - V 4 4.5 - - 0.26 - 0.33 - 0.4 V
5.2 6 - - 0.26 - 0.33 - 0.4 V
4
CD74HC221, CD74HCT221
DC Electrical Specifications (Continued)
TEST
CONDITIONS
PARAMETER SYMBOL
Input Leakage
I
I
Current Quiescent Device
Current
I
CC
HCT TYPES
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
V
IH
V
IL
V
OH
CMOS Loads High Level Output
Voltage TTL Loads
Low Level Output Voltage
V
OL
CMOS Loads Low Level Output
Voltage TTL Loads
Input Leakage Current
Quiescent Device Current
Additional Quiescent Device Current Per
I
I
I
CC
I
CC
Input Pin: 1 Unit Load
NOTE: For dual-supply systems theoretical worst case (V
HCT Input Loading Table
(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX
I
VCC or
-6--±0.1 - ±1-±1µA
GND
VCC or
0 6 - - 8 - 80 - 160 µA
GND
- - 4.5 to
- - 4.5 to
VIHor VIL-0.02 4.5 4.4 - - 4.4 - 4.4 - V
-4 4.5 3.98 - - 3.84 - 3.7 - V
VIHor VIL0.02 4.5 - - 0.1 - 0.1 - 0.1 V
4 4.5 - - 0.26 - 0.33 - 0.4 V
VCCand
0 5.5 - ±0.1 - ±1-±1µA
GND
VCC or
0 5.5 - - 8 - 80 - 160 µA
GND
V
CC
- 4.5 to
-2.1
o
C -40oC TO 85oC -55oCTO125oC
V
CC
25
(V)
2--2- 2 - V
5.5
- - 0.8 - 0.8 - 0.8 V
5.5
- 100 360 - 450 - 490 µA
5.5
= 2.4V, VCC = 5.5V) specification is 1.8mA.
I
UNITSV
INPUT UNIT LOADS
All Inputs 0.3
NOTE: Unit Load is ICClimit specified in DC Electrical Table, e.g., 360µA max at 25oC.
Prerequisite For Switching Function
PARAMETER SYMBOL VCC (V)
HC TYPES
Input Pulse Width
A
Input Pulse Width
B
t
t
WH
WL
270- -90-105-ns
4.5 14 - - 18 - 21 - ns 612- -15-18-ns 270- -90-105-ns
4.5 14 - - 18 - 21 - ns 612- -15-18-ns
o
25
C -40oC TO 85oC -55oC TO 125oC
5
UNITSMIN TYP MAX MIN MAX MIN MAX
CD74HC221, CD74HCT221
Prerequisite For Switching Function (Continued)
PARAMETER SYMBOL V
Input Pulse Width
Reset
Recovery Time R to A or B
Output Pulse Width Q or
Q
CX = 0.1µF RX = 10k Output Pulse Width Q or Q
= 28pF, RX = 2k
C
X
= 1000pF, RX = 2k t
C
X
C
= 1000pF, RX = 10k t
X
HCT TYPES
Input Pulse Width
A
Input Pulse Width
B
Input Pulse Width
Reset
Recovery Time R to A or B
Output Pulse Width Q or
Q
CX = 0.1µF RX = 10k Output Pulse Width Q or Q
= 28pF, RX = 2k
C
X
= 1000pF, RX = 2k t
C
X
C
= 1000pF, RX = 10k t
X
Switching Specifications Input t
PARAMETER SYMBOL
HC TYPES
Propagation Delay, Trigger
A, B, R to Q
Propagation Delay, Trigger
A, B, R to Q
t
PLH
t
PHL
t
WL
t
SU
t
W
t
W
W W
t
WL
t
WH
t
WL
t
SU
t
W
t
W
W W
, tf = 6ns
r
(V)
CC
270- -90-105-ns
4.5 14 - - 18 - 21 - ns 612- -15-18-ns 20--0-0-ns
4.50--0-0-ns 60--0-0-ns 5 630 - 770 602 798 595 805 µs
4.5-140-----ns
4.5-1.5-----µs
4.5-7-----µs
4.5 14 - - 18 - 21 - ns
4.5 14 - - 18 - 21 - ns
4.5 18 - - 23 - 27 - ns
4.50--0-0-ns
5 630 - 770 602 798 595 805 µs
4.5-140-----ns
4.5-1.5-----µs
4.5-7-----µs
TEST
CONDITIONS VCC(V)
CL= 50pF 2 - - 210 - 265 - 315 ns C
= 50pF 4.5 - - 42 - 53 - 63 ns
L
= 50pF 6 - - 36 - 45 - 54 ns
C
L
C
= 15pF 5 - 18 - - - - - ns
L
CL= 50pF 2 - - 170 - 215 - 255 ns C
= 50pF 4.5 - - 34 - 43 - 51 ns
L
C
= 50pF 6 - - 29 - 37 - 43 ns
L
C
= 15pF 5 - 14 - - - - - ns
L
o
25
C -40oC TO 85oC -55oC TO 125oC
25
o
C
-40oC TO 85oC
-55oC TO
UNITSMIN TYP MAX MIN MAX MIN MAX
125oC
UNITSMIN TYP MAX MIN MAX MIN MAX
6
CD74HC221, CD74HCT221
Switching Specifications Input t
, tf = 6ns (Continued)
r
TEST
PARAMETER SYMBOL
Propagation Delay, R to Q
t
PLH
CONDITIONS VCC(V)
CL= 50pF 2 - - 160 - 200 - 240 ns
4.5 - - 32 - 40 - 48 ns 6 - - 27 - 34 - 41 ns
Propagation Delay, R to Q
t
PHL
CL= 50pF 2 - - 180 - 225 - 270 ns
4.5 - - 36 - 45 - 54 ns 6 - - 31 - 38 - 46 ns
Output Transition Time t
TLH
, t
CL= 50pF 2 - - 75 - 95 - 110 ns
THL
4.5 - - 15 - 19 - 22 ns 6 - - 13 - 16 - 19 ns
Input Capacitance C Pulse Width Match Between
Circuits in the Same Package
= 1000pF, RX = 10k
C
X
Power Dissipation Capacitance
IN
CPD - 5 - 166 - - - - - pF
- - - - 10 - 10 - 10 pF
- 4.5 to
- ±2- - - - - %
5.5
(Notes 5, 6)
HCT TYPES
Propagation Delay, Trigger
A, B, R to Q
Propagation Delay, Trigger
A, B, R to Q
Propagation Delay,
t
PLH
t
PHL
t
PLH
CL= 50pF 4.5 - - 42 - - - 63 ns C
= 15pF 5 - 18 - - - - - ns
L
CL= 50pF 4.5 - - 34 - 43 - 51 ns C
= 15pF 5 - 14 - - - - - ns
L
CL= 50pF 4.5 - - 38 - - - 57 ns
R to Q Propagation Delay,
t
PHL
CL= 50pF 4.5 - - 37 - - - 56 ns
R to Q Output Transition Time t
TLH
, t
CL= 50pF 2 - - 75 - 95 - 110 ns
THL
4.5 - - 15 - 19 - 22 ns 6 - - 13 - 16 - 19 ns
Input Capacitance C Pulse Width Match Between
Circuits in the Same Package C
= 1000pF, RX = 10k
X
Power Dissipation Capacitance
IN
CPD - 5 - 166 - - - - - pF
- - - - 10 - 10 - 10 pF
- 4.5 to
- ±2- - - - - %
5.5
(Notes 5, 6)
NOTES:
5. CPD is used to determine the dynamic power consumption, per multivibrator.
6. PD = (CPD + CL) V
2
fi + Σ where fi = input frequency, fo = output frequency, CL = output load capacitance, VCC = supply voltage.
CC
25
o
C
-40oC TO 85oC
-55oC TO 125oC
UNITSMIN TYP MAX MIN MAX MIN MAX
7
Test Circuits and Waveforms
trC
L
CLOCK
10%
90%
50%
10%
tfC
t
L
WL
tWL+ tWH=
50%
t
CD74HC221, CD74HCT221
WH
fC
50%
I
L
V
CC
GND
t
rCL
CLOCK
= 6ns
0.3V
2.7V
1.3V
0.3V
t
t
fCL
WL
= 6ns
1.3V
t
WH
t
WL
+ tWH=
1.3V
I
fC
L
3V
GND
NOTE: Outputs should be switching from 10% VCC to 90% VCC in accordance with device truth table. For f
, input duty cycle = 50%.
MAX
FIGURE 1. HC CLOCK PULSE RISE AND FALLTIMES AND
PULSE WIDTH
tr = 6ns tf = 6ns
V
t
CC
GND
TLH
INPUT
t
INVERTING
OUTPUT
THL
t
PHL
90% 50% 10%
t
90%
50%
10%
PLH
FIGURE 3. HC TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
NOTE: Outputs should be switching from 10% VCC to 90% VCC in accordance with device truth table. For f
, input duty cycle = 50%.
MAX
FIGURE 2. HCT CLOCK PULSE RISE AND FALLTIMES AND
PULSE WIDTH
= 6ns
t
PLH
t
f
10%
1.3V
90%
t
TLH
3V
GND
tr = 6ns
INPUT
t
INVERTING
OUTPUT
THL
t
PHL
2.7V
1.3V
0.3V
FIGURE 4. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
8
Typical Performance Curves
685
RX = 10K VCC = 5V
680
675
, PULSE WIDTH (µs)
W
t
670
CX = 1µF
CD74HC221, CD74HCT221
RX = 10K
= 25oC
T
A
0.9
0.8
K FACTOR
0.7
HCT
665
-75 -50 -25 0 25 50 75 100 125 150 175 , AMBIENT TEMPERATURE (oC)
T
A
FIGURE 5. HC/HCT221 OUTPUT PULSE WIDTH vs
TEMPERATURE
6
10
VCC = 2V
5
10
4
10
3
10
RX = 100K
2
10
, PULSE WIDTH (µs)
10
W
t
0.1
R
= 50K
X
= 10K
R
X
= 2K
R
1
X
2
10
10
3
10
10410
5
6
10
CX, TIMING CAPACITANCE (pF)
FIGURE 7. HC221 OUTPUT PULSE WIDTH vs C
10710
X
0.6 0246810
V
, SUPPLY VOLTAGE (V)
CC
FIGURE 6. HC/HCT221 K FACTOR vs SUPPLY VOLTAGE
6
10
VCC = 4.5V
5
10
4
10
3
10
RX = 100K
2
10
, PULSE WIDTH (µs)
W
t
8
FIGURE 8. HC/HCT221 OUTPUT PULSE WIDTH vs C
0.1
R
= 50K
X
= 10K
R
10
X
R
= 2K
1
X
2
10
10
3
10
10410
5
10610710
8
CX, TIMING CAPACITANCE (pF)
X
9
Typical Performance Curves
685
RX = 10K VCC = 5V
680
675
, PULSE WIDTH (µs)
W
t
670
CX = 1µF
(Continued)
K FACTOR
0.9
0.8
0.7
RX = 10K
= 25oC
T
A
HCT
665
-75 -50 -25 0 25 50 75 100 125 150 175 , AMBIENT TEMPERATURE (oC)
T
A
FIGURE 5. HC/HCT221 OUTPUT PULSE WIDTH vs
TEMPERATURE
6
10
VCC = 6V
5
10
4
10
3
10
2
10
RX = 100K
R
= 50K
, PULSE WIDTH (µs)
10
W
t
0.1
X
R
= 10K
X
R
1
X
10
10
FIGURE 9. HC221 OUTPUT PULSE WIDTH vs C
0.6
FIGURE 6. HC/HCT221 K FACTOR vs SUPPLY VOLTAGE
= 2K
2
3
10
10410510610
CX, TIMING CAPACITANCE (pF)
0246810
V
, SUPPLY VOLTAGE (V)
CC
7
8
10
X
10
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