Texas Instruments CD74HCT259M96, CD74HCT259M, CD74HCT259E, CD74HC259M96, CD74HC259M Datasheet

Data sheet acquired from Harris Semiconductor

/
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SCHS173

November 1997

CD74HC259,

CD74HCT259

High Speed CMOS Logic

8-Bit Addressable Latch

[ /Title
(CD74
HC259
,
CD74
HCT25

9)
Sub­ect

(High
Speed
CMOS
Logic
8-Bit
Addres
sable
Latch)

Features

• Buffered Inputs and Outputs

• Four Operating Modes

• Typical Propagation Delay of 15ns at V
C

= 15pF, TA = 25oC

L

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL
Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: N

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V

= 0.8V (Max), VIH = 2V (Min)

IL

- CMOS Input Compatibility, I

= 30%, NIH = 30% of V

IL

≤ 1µA at VOL, V

l

CC

= 5V,

o

C to 125oC

OH

Description

The Harris CD74HC259 and CD74HCT259 Addressable
Latch features the low-power consumption associated with
CMOS circuitry and has speeds comparable to low-power
Schottky.

This latches three active modes and one reset mode. When
both the Latch Enable (
low (8-line Demultiplexer mode) the output of the addressed
latch follows the Data input and all other outputs are forced
low . When both
outputs are isolated from the Data input, i.e., all latches hold
the last data presented before the
high. A condition of
mode) allows the addressed latch’s output to follow the data
input; all other latches are unaffected. The Reset mode (all
outputs low) results when

LE) and Master Reset (MR) inputs are

MR and LE are high (Memory Mode), all

LE transition from low to

LE low and MR high (Addressable Latch

LE is high and MR is low.

Ordering Information

CC

PART NUMBER TEMP. RANGE (oC) PACKAGE

CD74HC259E -55 to 125 16 Ld PDIP E16.3
CD74HCT259E -55 to 125 16 Ld PDIP E16.3
CD74HC259M -55 to 125 16 Ld SOIC M16.15
CD74HCT259M -55 to 125 16 Ld SOIC M16.15

PKG.

NO.

Pinout

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.

2. Wafer or dieforthis part numberis available whichmeetsall elec­trical specifications. Please contact your local sales office or
Harris customer service for ordering information.

CD74HC259, CD74HCT259

(PDIP, SOIC)

TOP VIEW

A0
A1
A2
Q0
Q1
Q2
Q3

GND

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

V
MR
LE
D
Q7
Q6
Q5
Q4

CC

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright

© Harris Corporation 1997

1

File Number 1727.1

Functional Diagram

CD74HC259, CD74HCT259

4

Q0

5

Q1

6

Q2

7

Q3

9

Q4

10

Q5

11

Q6

12

Q7

GND = 8

= 16

V

CC

A

A

A

LE

MR

1

0

2

1

2

D

1-OF-8

DECODER

3

14

15
13

8

LATCHES

TRUTH TABLE

INPUTS OUTPUT OF

ADDRESS

LATCH

EACH OTHER

OUTPUT FUNCTIONMR LE

HL D QioAddressable

Latch

HH Q

io

Q

io

Memory

L L D L 8-Line

Demultiplexer

L H L L Reset

NOTE:
H = High Voltage Level
L = Low Voltage Level
D = The level at the data input
Qio= The levelof Qi(i = 0, 1...7, as appropriate) before theindicated
steady-state input conditions were established.

LATCH SELECTION TABLE

SELECT INPUTS

LATCH

ADDRESSEDA2 A1 A0

LLL 0
LLH 1
LHL 2

LHH 3
HLL 4
HLH 5
HHL 6
HHH 7

2

CD74HC259, CD74HCT259

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V

DC Input Diode Current, I

IK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, I

OK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA

DC Drain Current, per Output, I

O

For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±25mA

DC Output Source or Sink Current per Output Pin, I

O

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA

DC VCC or Ground Current, I

CC orIGND

. . . . . . . . . . . . . . . . . .±50mA

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, V

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V

HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V

Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)

4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

CC

Thermal Resistance (Typical, Note 3) θJA (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . .150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

CC

DC Electrical Specifications

PARAMETER SYMBOL

HC TYPES

High Level Input
Voltage

Low Level Input
Voltage

High Level Output
Voltage
CMOS Loads

High Level Output
Voltage
TTL Loads

Low Level Output
Voltage
CMOS Loads

Low Level Output
Voltage
TTL Loads

Input Leakage
Current

V

IH

V

IL

V

OH

V

OL

I

I

TEST

CONDITIONS

(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX

I

V

CC

(V)

o

C -40oC TO 85oC -55oC TO 125oC

25

UNITSV

- - 2 1.5 - - 1.5 - 1.5 - V

4.5 3.15 - - 3.15 - 3.15 - V
6 4.2 - - 4.2 - 4.2 - V

- - 2 - - 0.5 - 0.5 - 0.5 V

4.5 - - 1.35 - 1.35 - 1.35 V
6 - - 1.8 - 1.8 - 1.8 V

VIHor VIL-0.02 2 1.9 - - 1.9 - 1.9 - V

-0.02 4.5 4.4 - - 4.4 - 4.4 - V

-0.02 6 5.9 - - 5.9 - 5.9 - V

- - ---- - - - V

-4 4.5 3.98 - - 3.84 - 3.7 - V

-5.2 6 5.48 - - 5.34 - 5.2 - V

VIHor VIL0.02 2 - - 0.1 - 0.1 - 0.1 V

0.02 4.5 - - 0.1 - 0.1 - 0.1 V

0.02 6 - - 0.1 - 0.1 - 0.1 V

- - ---- - - - V
4 4.5 - - 0.26 - 0.33 - 0.4 V

5.2 6 - - 0.26 - 0.33 - 0.4 V

VCC or

-6--±0.1 - ±1-±1 µA

GND

3