Texas Instruments CD74HCT153M, CD74HCT153E, CD74HCT153M96, CD74HC153M96, CD74HC153M Datasheet

CD74HC153,

/

[ /Title
(CD74H
C153,
CD74H
CT153)

Subject
(High
Speed
CMOS
Logic
Dual 4­Input

Data sheet acquired from Harris Semiconductor
SCHS151

September 1997

Features

• Common Select Inputs

• Separate Enable Inputs

• Buffered inputs and Outputs

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL
Logic ICs

• HC Types

- 2V to 6V Operation

- High NoiseImmunity: N

V

= 5V

CC

= 30%, NIH= 30%of VCCat

IL

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V

= 0.8V (Max), VIH = 2V (Min)

IL

- CMOS Input Compatibility, I

≤ 1µA at VOL, V

l

o

C to 125oC

OH

CD74HCT153

High Speed CMOS Logic

Dual 4-Input Multiplexer

Description

The Harris CD74HC153 and CD74HCT153 are dual 4 to line
selector/multiplexers which select one of 4 to 1 line
selector/multiplexers which select one of four sources for
each section by the common select inputs, S0 and S1. When
the enable inputs (1
LOW state.

Ordering Information

PART NUMBER TEMP. RANGE (oC) PACKAGE

CD74HC153E -55 to 125 16 Ld PDIP E16.3
CD74HCT153E -55 to 125 16 Ld PDIP E16.3
CD74HC153M -55 to 125 16 Ld SOIC M16.15
CD74HCT153M -55 to 125 16 Ld SOIC M16.15
CD54HC153W -55 to 125 Wafer

NOTES:

1. When ordering, use the entire partnumber. Add the suffix 96 to
obtain the variant in the tape and reel.

2. Waferor die forthispart number isavailablewhich meets allelec­trical specifications. Please contact your local sales office or
Harris customer service for ordering information.

E, 2E) are HIGH, the outputs are in the

PKG.

NO.

Pinout

CD74HC153, CD74HCT153

(PDIP, SOIC)

TOP VIEW

V

1

1E

2

S1

3

1I

3

4

1I

2

5

1I

1

6

1I

0

7

1Y

8

GND

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright

© Harris Corporation 1997

1

16

CC

15

2E

14

S0

13

2I

3

12

2I

2

11

2I

1

10

2I

0

9

2Y

File Number 1774.1

Functional Diagram

CD74HC153, CD74HCT153

1

1

E

6

1I

0

5

1I

1

1I

2

1I

3

S0

S1

2I

0

2I

1

2I

2

2I

3

2

E

SEL/MUX

4
3

14

2
10
11

SEL/MUX

12
13
15

7

9

GND = 8
V

CC

1Y

2Y

= 16

TRUTH TABLE

SELECT INPUTS DATA INPUTS ENABLE OUTPUT

S1 S0 I0 I

1

I

2

I

3

EY

XXXXXXHL
LLLXXXLL
LLHXXXLH
LHXLXXLL
LHXHXXLH
HLXXLXLL
HLXXHXLH
HHXXXLLL
HHXXXHLH

NOTE:
Select inputs S1 and S0 are common to both sections.
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care

2

CD74HC153, CD74HCT153

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V

DC Input Diode Current, I

IK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, I

OK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Source or Sink Current per Output Pin, I

O

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA

DC VCC or Ground Current, I

CC orIGND

. . . . . . . . . . . . . . . . . .±50mA

Operating Conditions

Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, V

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V

HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V

Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)

4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

CC

Thermal Resistance (Typical, Note 3) θJA (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

CC

DC Electrical Specifications

PARAMETER SYMBOL

HC TYPES

High Level Input
Voltage

Low Level Input
Voltage

High Level Output
Voltage
CMOS Loads

High Level Output
Voltage
TTL Loads

Low Level Output
Voltage
CMOS Loads

Low Level Output
Voltage
TTL Loads

Input Leakage
Current

Quiescent Device
Current

V

IH

V

IL

V

OH

V

OL

I

I

I

CC

TEST

CONDITIONS

(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX

I

V

CC

(V)

o

25

C -40oC TO 85oC -55oC TO 125oC

UNITSV

- - 2 1.5 - - 1.5 - 1.5 - V

4.5 3.15 - - 3.15 - 3.15 - V
6 4.2 - - 4.2 - 4.2 - V

- - 2 - - 0.5 - 0.5 - 0.5 V

4.5 - - 1.35 - 1.35 - 1.35 V
6 - - 1.8 - 1.8 - 1.8 V

VIHor VIL-0.02 2 1.9 - - 1.9 - 1.9 - V

-0.02 4.5 4.4 - - 4.4 - 4.4 - V

-0.02 6 5.9 - - 5.9 - 5.9 - V

- - ---- - - - V

-4 4.5 3.98 - - 3.84 - 3.7 - V

-5.2 6 5.48 - - 5.34 - 5.2 - V

VIHor VIL0.02 2 - - 0.1 - 0.1 - 0.1 V

0.02 4.5 - - 0.1 - 0.1 - 0.1 V

0.02 6 - - 0.1 - 0.1 - 0.1 V

- - ---- - - - V
4 4.5 - - 0.26 - 0.33 - 0.4 V

5.2 6 - - 0.26 - 0.33 - 0.4 V

VCC or

-6--±0.1 - ±1-±1 µA

GND

VCC or

0 6 - - 8 - 80 - 160 µA

GND

3

CD74HC153, CD74HCT153

DC Electrical Specifications (Continued)

TEST

CONDITIONS

PARAMETER SYMBOL

HCT TYPES

High Level Input
Voltage

Low Level Input

V

IH

V

IL

Voltage
High Level Output

Voltage

V

OH

CMOS Loads
High Level Output

Voltage
TTL Loads

Low Level Output

V

OL

Voltage
CMOS Loads

Low Level Output
Voltage
TTL Loads

Input Leakage
Current

Quiescent Device
Current

Additional Quiescent

I

I

I

CC

∆I

CC

Device Current Per
Input Pin: 1 Unit Load

NOTE: For dual-supply systems theorectical worst case (V

(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX

I

- - 4.5 to

- - 4.5 to

VIHor VIL-0.02 4.5 4.4 - - 4.4 - 4.4 - V

-4 4.5 3.98 - - 3.84 - 3.7 - V

VIHor VIL0.02 4.5 - - 0.1 - 0.1 - 0.1 V

4 4.5 - - 0.26 - 0.33 - 0.4 V

VCCand

0 5.5 - - ±0.1 - ±1-±1 µA

GND

VCC or

0 5.5 - - 8 - 80 - 160 µA

GND

V

CC

- 4.5 to

-2.1

o

C -40oC TO 85oC -55oC TO 125oC

V

CC

25

(V)

2--2- 2 - V

5.5

- - 0.8 - 0.8 - 0.8 V

5.5

- 100 360 - 450 - 490 µA

5.5

= 2.4V, VCC = 5.5V) specification is 1.8mA.

I

UNITSV

HCT Input Loading Table

INPUT UNIT LOADS

Data 0.45

Enable 0.6

Select 1.35

NOTE: Unit Load is ∆ICClimit specified in DC Electrical Table, e.g.
360µA max at 25oC.

Switching Specifications Input t

PARAMETER SYMBOL

HC TYPES

Propagation Delay (Figure 1) t

S to Y 4.5 - - 32 - 40 - 48 ns

I to Y t

, tf = 6ns

r

PLH,

t

PHL

PLH,

t

PHL

TEST

CONDITIONS

o

25

V

CC

C

-40oC TO
85oC

(V)

-55oC TO
125oC

CL= 50pF 2 - - 160 - 200 - 240 ns

C

=15pF 5 - 13 - - - - - ns

L

C

= 50pF 6 - - 27 - 34 - 41 ns

L

CL= 50pF 2 - - 145 - 180 - 220 ns

4.5 - - 29 - 36 - 44 ns

C

=15pF 5 - 12 - - - - - ns

L

= 50pF 6 - - 25 - 31 - 38 ns

C

L

UNITSMIN TYP MAX MIN MAX MIN MAX

4

CD74HC153, CD74HCT153

Switching Specifications Input t

PARAMETER SYMBOL

E to Y t

, tf = 6ns (Continued)

r

TEST

CONDITIONS

CL= 50pF 2 - 120 - 150 - 180 ns

PLH,

t

PHL

o

25

V

CC

C

-40oC TO
85oC

-55oC TO
125oC

(V)

4.5 - 24 - 30 - 36 ns
CL=15pF 5 - 9 - - - - - ns
C

= 50pF 6 - - 20 - 26 - 31 ns

L

Output Transition Time
(Figure 1)

t

TLH,tTHLCL

= 50pF 2 - - 75 - 95 - 110 ns

4.5 - - 15 - 19 - 22 ns

6 - - 13 - 16 - 19 ns
Input Capacitance C
Power Dissipation Capacitance

(Notes 4, 5)

IN

C

PD

- - - - 10 - 10 - 10 pF

-5-45-----pF

HCT TYPES

Propagation Delay (Figure 2) t

S to Y CL= 50pF 4.5 - - 34 - 43 - 51 ns

I to Y t

I to Y t

E to Y t

Output Transition Time t
Input Capacitance C
Power Dissipation Capacitance

(Notes 4, 5)

,

PLH

t

PHL

,

PLH

t

PHL

,

PLH

t

PHL

,

PLH

t

PHL

TLH,tTHLCL

IN

C

PD

=15pF 5 - 14 - - - - ns

C

L

CL= 50pF 4.5 - - 24 - 30 - 36 ns
C

=15pF 5 - 9 - - - - - ns

L

CL= 50pF 4.5 - 34 - 43 - 51 ns

=15pF 5 - 14 - - - - - ns

C

L

CL= 50pF 4.5 - - 27 - 34 - 41 ns
C

=15pF 5 - 11 - - - - ns

L

= 50pF 4.5 - - 15 - 19 - 22 ns

- - - - 10 - 10 - 10 pF

-5-45-----pF

NOTES:

4. C

is used to determine the dynamic power consumption, per multiplexer.

PD

5. PD = V

2

fi(CPD + CL) where fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.

CC

UNITSMIN TYP MAX MIN MAX MIN MAX

Test Circuit and Waveform

OUTPUT Y

tr = 6ns

E

I OR S

t

PLH

FIGURE 1. PROPAGATION DELAY TIMES

5

tf = 6ns

t

PHL

90%
V

S

10%

V

S

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