Texas Instruments CD74HCT151M96, CD74HCT151M, CD74HCT151E, CD74HC151E, CD74HC151M96 Datasheet

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CD74HC151,
/
[ /Title (CD74H C151, CD74H CT151)
Subject (High Speed CMOS Logic 8­Input Multi-
Data sheet acquired from Harris Semiconductor SCHS150
September 1997
Features
• Complementary Data Outputs
• Buffered Inputs and Outputs
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• Alternate Source is Philips/Signetics
• HC Types
- 2V to 6V Operation
- High NoiseImmunity: N
= 30%, NIH= 30%of VCCat
IL
o
C to 125oC
CD74HCT151
High Speed CMOS Logic
8-Input Multiplexer
= 5V
V
CC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, V
= 0.8V (Max), VIH = 2V (Min)
IL
- CMOS Input Compatibility, I
Description
The Harris CD74HC151 and CD74HCT151 are single 8­channel digital multiplexers having three binary control inputs, S0, S1 and S2 and an active low enable (E) input. The three binary signals select 1 of 8 channels. Outputs are both inverting (
Y) and non-inverting (Y).
Ordering Information
PART NUMBER TEMP. RANGE (oC) PACKAGE
1µA at VOL, V
l
OH
PKG.
NO.
Pinout
CD74HC151, CD74HCT151
(PDIP, SOIC)
TOP VIEW
16 15 14 13 12 11 10
9
GND
1
I
3
2
I
2
3
I
1
4
I
0
5
Y
6
Y
7
E
8
V I I I I S0 S1 S2
CC 4 5 6 7
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
© Harris Corporation 1997
1
File Number 1645.1
Functional Diagram
CD74HC151, CD74HCT151
4
I
0
3
I
1
2
I
2
1
I
3
15
I
4
14
I
5
13
I
6
12
I
7
11
S
0
10
S
1
9
S
2
E
7
5
6
GND = 8
= 16
V
CC
Y
Y
TRUTH TABLE
SELECT INPUTS DATA INPUTS ENABLE OUTPUT
S2 S1 S0 I0 I1 I2 I3 I4 I5 I6 I7 E YY
XXXXXXXXXXX H HL LLLLXXXXXXX L HL LLLHXXXXXXX L LH LLHXLXXXXXX L HL LLHXHXXXXXX L LH LHLXXLXXXXX L HL LHLXXHXXXXX L LH LHHXXXLXXXX L HL LHHXXXHXXXX L LH HLLXXXXLXXX L HL HLLXXXXHXXX L LH HLHXXXXXLXX L HL HLHXXXXXHXX L LH HHLXXXXXXLX L HL HHLXXXXXXHX L LH HHHXXXXXXXL L HL HHHXXXXXXXH L LH
NOTE: H = High Voltage Level, L = Low Voltage Level, X = Don’t Care
2
CD74HC151, CD74HCT151
Absolute Maximum Ratings Thermal Information
DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I
IK
For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I
OK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, I
O
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, I
CC orIGND
. . . . . . . . . . . . . . . . . .±50mA
Operating Conditions
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, V
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θJA is measured with the component mounted on an evaluation PC board in free air.
CC
Thermal Resistance (Typical, Note 3) θJA (oC/W)
PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
CC
DC Electrical Specifications
PARAMETER SYMBOL
HC TYPES
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage CMOS Loads
High Level Output Voltage TTL Loads
Low Level Output Voltage CMOS Loads
Low Level Output Voltage TTL Loads
Input Leakage Current
Quiescent Device Current
V
IH
V
IL
V
OH
V
OL
I
I
I
CC
TEST
CONDITIONS
(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX
I
V
CC
(V)
o
25
C -40oC TO 85oC -55oC TO 125oC
UNITSV
- - 2 1.5 - - 1.5 - 1.5 - V
4.5 3.15 - - 3.15 - 3.15 - V 6 4.2 - - 4.2 - 4.2 - V
- - 2 - - 0.5 - 0.5 - 0.5 V
4.5 - - 1.35 - 1.35 - 1.35 V 6 - - 1.8 - 1.8 - 1.8 V
VIHor VIL-0.02 2 1.9 - - 1.9 - 1.9 - V
-0.02 4.5 4.4 - - 4.4 - 4.4 - V
-0.02 6 5.9 - - 5.9 - 5.9 - V
- - ---- - - - V
-4 4.5 3.98 - - 3.84 - 3.7 - V
-5.2 6 5.48 - - 5.34 - 5.2 - V
VIHor VIL0.02 2 - - 0.1 - 0.1 - 0.1 V
0.02 4.5 - - 0.1 - 0.1 - 0.1 V
0.02 6 - - 0.1 - 0.1 - 0.1 V
- - ---- - - - V
4 4.5 - - 0.26 - 0.33 - 0.4 V
5.2 6 - - 0.26 - 0.33 - 0.4 V
VCC or
-6--±0.1 - ±1-±1 µA
GND
VCC or
0 6 - - 8 - 80 - 160 µA
GND
3
CD74HC151, CD74HCT151
DC Electrical Specifications (Continued)
TEST
CONDITIONS
PARAMETER SYMBOL
HCT TYPES
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage CMOS Loads
High Level Output Voltage TTL Loads
Low Level Output Voltage CMOS Loads
Low Level Output Voltage TTL Loads
Input Leakage Current
Quiescent Device Current
Additional Quiescent Device Current Per Input Pin: 1 Unit Load
NOTE: For dual-supply systems theoretical worst case (V
V
IH
V
IL
V
OH
V
OL
I
I
I
CC
I
CC
(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX
I
- - 4.5 to
- - 4.5 to
VIHor VIL-0.02 4.5 4.4 - - 4.4 - 4.4 - V
-4 4.5 3.98 - - 3.84 - 3.7 - V
VIHor VIL0.02 4.5 - - 0.1 - 0.1 - 0.1 V
4 4.5 - - 0.26 - 0.33 - 0.4 V
VCCand
GND
VCC or
GND
V
CC
-2.1
0 5.5 - ±0.1 - ±1-±1 µA
0 5.5 - - 8 - 80 - 160 µA
- 4.5 to
o
C -40oC TO 85oC -55oC TO 125oC
V
CC
(V)
5.5
5.5
5.5
= 2.4V, VCC = 5.5V) specification is 1.8mA.
I
25
2--2- 2 - V
- - 0.8 - 0.8 - 0.8 V
- 100 360 - 450 - 490 µA
UNITSV
HCT Input Loading Table
INPUT UNIT LOADS
Select 1.5
Data 0.45
Enable 0.3
NOTE: Unit Load is ICClimit specified in DC Electrical Table,e.g., 360µA max at 25oC.
Switching Specifications Input t
PARAMETER SYMBOL
HC TYPES
Propagation Delay (Figure 1) t
Any Data Input to Y 4.5 - - 34 - 43 - 51 ns
, tf = 6ns
r
PLH,tPHLCL
CL=15pF 5 - 14 - - - - - ns CL= 50pF 6 - - 29 - 37 - 43 ns
-40oC TO
TEST
CONDITIONS VCC(V)
= 50pF 2 - - 170 - 215 - 255 ns
25oC
85oC
-55oC TO 125oC
UNITSMIN TYP MAX MIN MAX MIN MAX
4
CD74HC151, CD74HCT151
Switching Specifications Input t
PARAMETER SYMBOL
Any Data Input to Yt
, tf = 6ns (Continued)
r
CONDITIONS VCC(V)
PLH,tPHLCL
= 50pF 2 - - 185 - 230 - 280 ns
TEST
25oC
-40oC TO 85oC
-55oC TO 125oC
4.5 - - 37 - 46 - 56 ns CL=15pF 5 - 15 - - - - - ns CL= 50pF 6 - - 31 - 39 - 48 ns
Any Select to Y t
PLH,tPHLCL
= 50pF 2 - - 185 - 230 - 280 ns
4.5 - - 37 - 46 - 56 ns CL=15pF 5 - 15 - - - - - ns CL= 50pF 6 - - 31 - 39 - 48 ns
Any Select to Yt
PLH,tPHLCL
= 50pF 2 - - 205 - 255 - 310 ns
4.5 - - 41 - 51 - 62 ns CL=15pF 5 - 17 - - - - - ns CL= 50pF 6 - - 35 - 43 - 53 ns
Enable to Y t
PLH,tPHLCL
= 50pF 2 - - 140 - 175 - 210 ns
4.5 - - 28 - 35 - 42 ns CL=15pF 5 - 11 - - - - - ns CL= 50pF 6 - - 24 - 30 - 36 ns
Enable to Yt
PLH,tPHLCL
= 50pF 2 - - 145 - 180 - 220 ns
4.5 - - 29 - 36 - 44 ns CL=15pF 5 - 12 - - - - - ns CL= 50pF 6 - - 25 - 31 - 38 ns
Output Transition Time (Figure 1)
t
TLH
, t
THLCL
= 50pF 2 - - 75 - 95 - 110 ns
4.5 - - 15 - 19 - 22 ns
6 - - 13 - 16 - 19 ns Input Capacitance C Power Dissipation Capacitance
IN
C
PD
- - - - 10 - 10 - 10 pF
-5-59-----pF
(Notes 4, 5)
HCT TYPES
Propagation Delay (Figure 2) t
PLH
, t
PHL
Any Data Input to Y CL= 50pF 4.5 - - 38 - 48 - 57 ns
CL=15pF 5 - 16 - - - - ns
Any Data Input to Yt
PLH
, t
PHLCL
= 50pF 4.5 - - 36 - 45 - 54 ns
CL=15pF 5 - 15 - - - - - ns
Any Select to Y t
PLH
, t
PHLCL
= 50pF 4.5 - 41 - 51 - 62 ns
CL=15pF 5 - 17 - - - - - ns
Any Select to Yt
PLH
, t
PHLCL
= 50pF 4.5 - - 43 - 54 - 65 ns
CL=15pF 5 - 18 - - - - - ns
Enable to Y t
PLH
, t
PHLCL
= 50pF 4.5 - - 29 - 36 - 44 ns
CL=15pF 5 - 12 - - - - - ns
UNITSMIN TYP MAX MIN MAX MIN MAX
5
CD74HC151, CD74HCT151
Switching Specifications Input t
, tf = 6ns (Continued)
r
TEST
PARAMETER SYMBOL
Enable to YC
= 50pF CL= 50pF 4.5 - - 36 - 46 - 54 ns
L
CONDITIONS VCC(V)
CL=15pF CL=15pF 5 15 - - - - - - ns Output Transition Time t Input Capacitance C Power Dissipation Capacitance
TLH
, t
IN
C
PD
THLCL
= 50pF 4.5 - - 15 - 19 - 22 ns
- - - - 10 - 10 - 10 pF
- 5 58-----pF
(Notes 4, 5)
NOTES:
4. CPD is used to determine the dynamic power consumption, per gate.
5. PD = V
2
fi(CPD + CL) where fi = input frequency, CL = output load capacitance, VCC = supply voltage.
CC
Test Circuit and Waveform
ENABLE
SELECT
I
n
Y OUTPUT
t
PLH
t
PHL
Y OUTPUT
t
THL
t
THL
25oC
tf = 6nstr = 6ns
t
PLH
t
PHL
INPUT LEVEL
90% V 10%
GND
t
TLH
90% V
10%
V
t
TLH
-40oC TO 85oC
S
S
S
-55oC TO 125oC
UNITSMIN TYP MAX MIN MAX MIN MAX
FIGURE 1.
6
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