Texas Instruments CD74HCT147E, CD74HC147M96, CD74HC147M, CD74HC147E, CD54HC147F3A Datasheet
CD74HC147,
[ /Title
(CD74
HC147
,
CD74
HCT14
7)
/Subject
(High
Speed
CMOS
Logic
10-to-4
Line
Priority
Encode
r)
/Autho
r ()
/Keywords
(High
Speed
CMOS
Logic
10-to-4
Line
Priority
Encode
r, High
Speed
CMOS
Logic
10-to-4
Line
Priority
Data sheet acquired from Harris Semiconductor
SCHS149
September 1997
Features
• Buffered Inputs and Outputs
• Typical Propagation Delay: 13ns at V
C
= 15pF, TA = 25oC
L
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
= 0.8V (Max), VIH = 2V (Min)
IL
- CMOS Input Compatibility, I
= 30%, NIH = 30% of V
IL
≤ 1µA at VOL, V
l
CC
= 5V,
o
Pinout
Description
The Harris CD74HC147and CD74HCT147 are high speed
silicon-gate CMOS devices and are pin-compatible with low
power Schottky TTL (LSTTL).
The CD74HC147 and CD74HCT147 9-input priority
encoders accept data from nine active LOW inputs (l
and provide binary representation on the four active LOW
inputs (
C to 125oC
OH
CD74HC147, CD74HCT147
1
I4
2
I5
3
I6
4
I7
5
I8
6
Y2
7
Y1
8
GND
when two or more inputs are simultaneously active, the input
with the highest priority is represented on the output, with
input line l
These devices provide the 10-line to 4-line priority encoding
function by use of the implied decimal “zero”. The “zero” is
encoded when all nine data inputs are HIGH, forcing all four
outputs HIGH.
Ordering Information
CC
PART NUMBER TEMP. RANGE (oC) PACKAGE
CD74HC147E -55 to 125 16 Ld PDIP E16.3
CD74HCT147E -55 to 125 16 Ld PDIP E16.3
CD74HC147M -55 to 125 16 Ld SOIC M16.15
CD74HCT147M -55 to 125 16 Ld SOIC M16.15
NOTES:
1. When ordering, use the entire partnumber. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Waferor die forthis part numberis available whichmeets all electrical specifications. Please contact your local sales office or
Harris customer service for ordering information.
(PDIP, SOIC)
TOP VIEW
16
15
14
13
12
11
10
9
CD74HCT147
High Speed CMOS Logic
10-to-4 Line Priority Encoder
to l9)
1
Y0 to Y3). A priority is assigned to each input so that
having the highest priority.
9
PKG.
NO.
V
CC
NC
Y3
I3
I2
I1
I9
Y0
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
1
File Number 1773.1
Functional Diagram
I1 I2 I3 I4 I5 I6 I7 I8 I9 Y3 Y2 Y1 Y0
HHHHHHHHHHHHH
CD74HC147, CD74HCT147
11
I1
12
I2
13
I3
1
I4
2
I5
3
I6
4
I7
5
I8
10
I9
TRUTH TABLE
INPUTS OUTPUTS
9
7
6
14
GND = 8
= 16
V
CC
Y0
Y1
Y2
Y3
XXXXXXXXLLHHL
XXXXXXXLHLHHH
XXXXXXLHHHLLL
XXXXXLHHHHLLH
XXXXLHHHHHLHL
XXXLHHHHHHLHH
XXLHHHHHHHHLL
XLHHHHHHHHHLH
LHHHHHHHHHHHL
NOTE: H = High Logic Level, L = Low Logic Level, X = Don’t Care
2
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