Texas Instruments CD74FCT646SM, CD74FCT646M96 Datasheet
8-67
Data sheet acquired from Harris Semiconductor
SCHS261
Features
• Buffered Inputs
• Typical Propagation Delay: 6.8ns at V
CC
= 5V,
T
A
= 25oC, CL = 50pF
• Noninverting
• SCR Latchup Resistant BiCMOS Process and
Circuit Design
• Speed of Bipolar FAST™/AS/S
• 64mA Output Sink Current
• Output Voltage Swing Limited to 3.7V at V
CC
= 5V
• Controlled Output Edge Rates
• Input/Output Isolation to V
CC
• BiCMOS Technology with Low Quiescent Power
Description
The CD74FCT646 three-state octal bus transceiver/register
uses a small geometry BiCMOS technology. The output
stage is a combination of bipolar and CMOS transistors that
limits the output HIGH level to two diode drops below V
CC
.
This resultant lowering of output swing (0V to 3.7V)
reduces power bus ringing (a source of EMI) and minimizes
V
CC
bounce and ground bounce and their effects during
simultaneous output switching. The output configuration
also enhances switching speed and is capable of sinking
64 milliamperes.
This device is a bus transceiver with D-Type flip-flops which
act as internal storage registers on the LOW to HIGH transition of either CAB or CBA clock inputs. Output Enable (
OE)
and Direction (DIR) inputs control the transceiver functions.
Data present at the high impedance output can be stored in
either register or both but only one of the two buses can be
enabled as outputs at any one time. The Select controls
(SAB and SBA) can multiplex stored and transparent (real
time) data. The Direction control determines which data bus
will receive data when the Output Enable(
OE) is LOW. In the
high impedance mode (Output Enable HIGH), A data can be
stored in one register and B data can be stored in the other
register. The clocks are not gated with the Direction (DIR)
and Output Enable (
OE) terminals; data at the A or B termi-
nals can be clocked into the storage flip-flops at any time.
Pinout
Ordering Information
PART NUMBER
TEMP.
RANGE (oC) PACKAGE
PKG.
NO.
CD74FCT646EN 0 to 70 24 Ld PDIP E24.3
CD74FCT646M 0 to 70 24 Ld SOIC M24.3
CD74FCT646SM 0 to 70 24 Ld SSOP M24.209
NOTE: When ordering the suffix M and SM packages, use the entire
part number .Add thesuffix 96to obtainthevariant inthe tapeand reel.
CD74FCT646
(PDIP, SOIC, SSOP)
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
CAB
A0
A1
A2
A3
A4
A5
A6
A7
GND
16
17
18
19
20
21
22
23
24
15
14
13
V
CC
B1
B3
B4
B6
B0
B5
B7
B2
SAB
DIR
CBA
SBA
OE
January 1997
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a trademark of Fairchild Semiconductor.
Copyright
© Harris Corporation 1997
CD74FCT646
BiCMOS FCT Interface Logic,
Octal Bus Transceiver/Register, Three-State
NO
T RECOMMENDED
FOR NEW DESIGNS
Use CMOS T
echnology
File Number 2393.2
8-68
Functional Diagram
TRUTH TABLE (Note 1)
INPUTS DATA I/O (Note 2) OPERATION OR FUNCTION
OE DIR CAB CBA SAB SBA A0 THRU A7 B0 THRU B7 CD74FCT646
X
X
X
X
↑
X
X
↑
X
X
XXInput
Not Specified
Not Specified
Input
Store A, B Unspecified
Store B, A Unspecified
H
H
X
X↑H or L↑H or LXX
XXInput Input Store A and B Data
Isolation, Hold Storage
L
L
L
L
X
XXH or LXX
LHOutput Input Real Time B Data to A Bus
Stored B Data to A Bus
L
L
H
HXH or LXX
L
H
XXInput Output Real Time A Data to B Bus
Stored A Data to B Bus
NOTES:
1. H= HIGH Voltage Level
L = LOW Voltage Level
↑ = Transition from Low to High
X = Immaterial
2. Thedataoutput functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functionsarealwaysenabled, i.e., data atthebus pins will be stored on every lowto high transition of the clock inputs. To prevent excess currents in the high Z
modes, all I/O terminals should be terminated with 10kΩ resistors.
4
5
6
7
8
9
10
11
20
19
18
17
16
15
14
13
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
B DATA PORTA DATA PORT
OE
DIR
CAB CLOCK
CBA CLOCK
21
3
1
23
2
22
SAB SOURCE
SBA SOURCE
DATA SOURCE
SELECTION
INPUTS
FLIP-FLOP
CLOCKS
GND = PIN 12
V
CC
= PIN 24
CD74FCT646
8-69
IEC Logic Symbol
CD74FCT646
G3
3EN1
G6
5D
4D
21
22
2
23
1
6
7
8
9
10
4
5
18
17
16
15
14
13
19
20
11
7
7
2
>C4
>C5
1
6
6
≥1
≥1
3EN2
3
G7
CD74FCT646
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