Texas Instruments CD74FCT374SM, CD74FCT374M96, CD74FCT374M, CD74FCT374E Datasheet

8-1

Data sheet acquired from Harris Semiconductor
SCHS256

Features

• Buffered Inputs

• Typical Propagation Delay: 6.6ns at V

CC

= 5V,

T

A

= 25oC, CL = 50pF

• Positive Edge Triggered

• Noninverting

• SCR Latchup Resistant BiCMOS Process and

Circuit Design

• Speed of Bipolar FAST™/AS/S

• 48mA Output Sink Current

• Output Voltage Swing Limited to 3.7V at V

CC

= 5V

• Controlled Output Edge Rates

• Input/Output Isolation to V

CC

• BiCMOS Technology with Low Quiescent Power

Pinout

Ordering Information

PART NUMBER

TEMP.

RANGE (oC) PACKAGE

PKG.

NO.

CD74FCT374E 0 to 70 20 Ld PDIP E20.3
CD74FCT374M 0 to 70 20 Ld SOIC M20.3
CD74FCT374SM 0 to 70 20 Ld SSOP M20.209

NOTE: When ordering the suffix M and SM packages, use the entire
part number.Add the suffix 96 to obtain the variant in the tape and reel.

CD74FCT374

(PDIP, SOIC, SSOP)

TOP VIEW

11

12

13

14

15

16

17

18

20
19

10

9

8

7

6

5

4

3

2

1

OE

Q0
D0
D1
Q1
Q2

D3

D2

Q3

GND

V

CC

D7
D6
Q6
Q5
D5
D4
Q4
CP

Q7

January 1997

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a trademark of Fairchild Semiconductor.

Copyright

© Harris Corporation 1997

CD74FCT374

BiCMOS FCT Interface Logic,

Octal D-Type Flip-Flop, Three-State

NOT RECOMMENDED

FOR NEW DESIGNS

Use CMOS Technology

File Number 2305.2

8-2

Functional Diagram

IEC Logic Symbol

TRUTH TABLE (Note 1)

INPUTS OUTPUTS

OE CP Dn Qn

L ↑ HH
L↑LL
LLXQ0
HXXZ

NOTE:

1. H = HIGH Voltage Level (Steady State)
L = LOW Voltage Level (Steady State)
X = Immaterial
↑= Transition from low to high level.
Q0 = The level of Q before the indicated steady state input conditions were established.
Z = HIGH Impedance

3

4

7

8

13

14

17

18

2

5

6

9

12

15

16

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

D0

D1

D2

D3

D4

D5

D6

D7

1

GND = PIN 10
V

CC

= PIN 20

11

OE
CP

19

CD74FCT374

2
5
6
9

EN

1

3

4

7
8

12
15
16
19

13

14

17
18

>C1

11

1D

CD74FCT374

8-3

Absolute Maximum Ratings Thermal Information

DC Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V

DC Input Diode Current, IIK (For VI < -0.5V) . . . . . . . . . . . . . -20mA

DC Output Diode Current, IOK (for VO < -0.5V) . . . . . . . . . . . -50mA

DC Output Sink Current per Output Pin, IO . . . . . . . . . . . . . . .70mA

DC Output Source Current per Output Pin, IO. . . . . . . . . . . . -30mA

DC VCC Current (ICC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140mA

DC Ground Current (I

GND

). . . . . . . . . . . . . . . . . . . . . . . . . . .400mA

Operating Conditions

Operating Temperature Range (TA) . . . . . . . . . . . . . . . .0oC to 70oC

Supply Voltage Range, VCC. . . . . . . . . . . . . . . . . . . .4.75V to 5.25V

DC Input Voltage, VI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V

CC

DC Output Voltage, VO. . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to ≤ V

CC

Input Rise and Fall Slew Rate, dt/dv0 to 10ns/V

Thermal Resistance (Typical, Note 2). . . . . . . . . . . . . . . . . θJA (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC

(SOIC and SSOP-Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

2. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications Commercial Temperature Range 0

o

C to 70oC, VCC Max = 5.25V, VCC Min = 4.75V (Note 5)

PARAMETER SYMBOL

TEST CONDITIONS

V

CC

(V)

AMBIENT TEMPERATURE (TA)

UNITS

25oC0

o

C TO 70oC

VI (V) IO (mA) MIN MAX MIN MAX

High Level Input Voltage V

IH

4.75 to 5.25 2 - 2 - V

Low Level Input Voltage V

IL

4.75 to 5.25 - 0.8 - 0.8 V

High Level Output Voltage V

OH

VIH or V

IL

-15 Min 2.4 - 2.4 - V

Low Level Output Voltage V

OL

VIH or V

IL

48 Min - 0.55 - 0.55 V

High Level Input Current I

IH

V

CC

Max - 0.1 - 1 µA

Low Level Input Current I

IL

GND Max - -0.1 - -1 µA

Three State Leakage Current I

OZH

V

CC

Max - 0.5 - 10 µA

I

OZL

GND Max - -0.5 - -10 µA

Input Clamp Voltage V

IK

VCC or

GND

-18 Min - -1.2 - -1.2 V

Short Circuit Output Current
(Note 3)

I

OS

VO = 0

VCC or

GND

Max -60 - -60 - mA

Quiescent Supply Current,
MSI

I

CC

VCC or

GND

0 Max - 8 - 80 µA

Additional Quiescent Supply
Current per Input Pin
TTL Inputs High, 1 Unit Load

∆I

CC

3.4V

(Note 4)

Max - 1.6 - 1.6 mA

NOTES:

3. Not more than one output should be shorted at one time. Test duration should not exceed 100ms.

4. Inputs that are not measured are at VCC or GND.

5. FCT Input Loading: All inputs are 1 unit load. Unit load is ∆ICClimit specified in Electrical Specifications table, e.g., 1.6mA Max. at 70oC.

CD74FCT374