Texas Instruments CD74ACT153M96, CD74ACT153M, CD74ACT153E, CD74AC153M96, CD74AC153E Datasheet

...
CD74AC153,
[ /Title (CD74 AC153 , CD74 ACT15
3) /Sub­ject (Dual 4-Input Multi­plexer) /Autho r () /Key­words (Har­ris Semi­con­ductor, Advan ced CMOS ) /Cre­ator () /DOCI NFO pdf­mark
Data sheet acquired from Harris Semiconductor SCHS237
September 1998
Features
• Buffered Inputs
• Typical Propagation Delay
- 6.3ns at V
• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
• SCR-Latchup-Resistant CMOS Process and Circuit Design
• Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption
• Balanced Propagation Delays
• AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
±24mA Output Drive Current
- Fanout to 15 FAST™ ICs
- Drives 50 Transmission Lines
= 5V, TA = 25oC, CL = 50pF
CC
Pinout
1I 1I 1I 1I
GND
Description
The CD74AC153 and CD74ACT153 are dual 4-input multi­plexers that utilize the Harris Advanced CMOS Logic tech­nology. One of the four sources for each section is selected by the common Select inputs, S0 and S1. When the Enable inputs (
1E, 2E) are HIGH, the outputs are in the low state.
Ordering Information
PART
NUMBER
CD74AC153E 0 to 70oC, -40 to 85,
CD74ACT153E 0 to 70oC, -40 to 85,
CD74AC153M96 0 to 70oC, -40 to 85,
CD74ACT153M 0 to 70oC, -40 to 85,
NOTES:
1. When ordering, use theentire part number. Add the suffix 96 to obtain the variant in the tape and reel.
2. Wafer and die for this part number is available which meets all elec­trical specifications. Please contact your local sales office or Harris customer service for ordering information.
CD74AC153, CD74ACT153
(PDIP, SOIC)
TOP VIEW
V
1E S1
1Y
1 2 3
3
4
2
5
1
6
0
7 8
16 15
2E
14
S0
13
2I
12
2I
11
2I
10
2I
9
2Y
CD74ACT153
Dual 4-Input Multiplexer
TEMP.
RANGE (oC) PACKAGE
16 Ld PDIP E16.3
-55 to 125 16 Ld PDIP E16.3
-55 to 125 16 Ld SOIC M16.15
-55 to 125 16 Ld SOIC M16.15
-55 to 125
CC
3 2 1 0
PKG.
NO.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. FAST™ is a Trademark of Fairchild Semiconductor.
Copyright
© Harris Corporation 1998
1
File Number 1966.1
CD74AC153, CD74ACT153
Functional Diagram
1
E
1
6
1I
0
5
1I
1
1I
2
1I
3
14
S0
S1
10
2I
0
11
2I
1
12
2I
2
13
2I
3
15
2
E
SEL/MUX
4 3
2
SEL/MUX
TRUTH TABLE
SELECT INPUTS DATA INPUTS
S1 S0 nI
0
nI
1
nI
XXXXXXHL LLLXXXLL LLHXXXLH LHXLXXLL LHXHXXLH HLXXLXLL HLXXHXLH HHXXXLLL HHXXXHLH
Select inputs S1 and S0 are common to both sections. H = High Level, L = Low Level, X = Don’t Care, Z = High Impedance.
2
7
1Y
9
2Y
GND = 8 V
= 16
CC
ENABLE
INPUTS OUTPUT
nI
3
nE nY
2
CD74AC153, CD74ACT153
Absolute Maximum Ratings Thermal Information
DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V
DC Input Diode Current, I
IK
For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I
OK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
DC Output Source or Sink Current per Output Pin, I
O
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
DC VCC or Ground Current, I
CC orIGND
(Note 3) . . . . . . . . .±100mA
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, VCC (Note 4)
AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V
Input Rise and Fall Slew Rate, dt/dv
AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)
AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)
ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. For up to 4 outputs per device, add ±25mA for each additional output.
4. Unless otherwise specified, all voltages are referenced to ground.
5. θJA is measured with the component mounted on an evaluation PC board in free air.
Thermal Resistance (Typical, Note 5) θJA (oC/W)
PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
CC
DC Electrical Specifications
PARAMETER SYMBOL
AC TYPES
High Level Input Voltage V
Low Level Input Voltage V
High Level Output Voltage V
IH
IL
OH
TEST
CONDITIONS
(V) IO(mA) MIN MAX MIN MAX MIN MAX
I
V
CC
(V)
25
o
C
-40oC TO 85oC
-55oC TO 125oC
- - 1.5 1.2 - 1.2 - 1.2 - V 3 2.1 - 2.1 - 2.1 - V
5.5 3.85 - 3.85 - 3.85 - V
- - 1.5 - 0.3 - 0.3 - 0.3 V 3 - 0.9 - 0.9 - 0.9 V
5.5 - 1.65 - 1.65 - 1.65 V
VIH or V
-0.05 1.5 1.4 - 1.4 - 1.4 - V
IL
-0.05 3 2.9 - 2.9 - 2.9 - V
-0.05 4.5 4.4 - 4.4 - 4.4 - V
-4 3 2.58 - 2.48 - 2.4 - V
-24 4.5 3.94 - 3.8 - 3.7 - V
-75
5.5 - - 3.85 - - - V
(Note 6, 7)
-50
5.5----3.85 - V
(Note 6, 7)
UNITSV
3
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