Texas Instruments CD74ACT151M96, CD74AC151E, CD54ACT151F3A, CD74AC151M96 Datasheet

CD74AC151,
[ /Title (CD74 AC151 , CD74 ACT15
1) /Sub­ject (8­Input Multi­plexer) /Autho r () /Key­words (Har­ris Semi­con­ductor, Advan ced CMOS ) /Cre­ator () /DOCI NFO pdf­mark
Data sheet acquired from Harris Semiconductor SCHS236
September 1998
Features
• Buffered Inputs
• Typical Propagation Delay
- 6ns at V
• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
• SCR-Latchup-Resistant CMOS Process and Circuit Design
• Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption
• Balanced Propagation Delays
• AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
±24mA Output Drive Current
- Fanout to 15 FAST™ ICs
- Drives 50 Transmission Lines
= 5V, TA = 25oC, CL = 50pF
CC
Pinout
GND
Description
The CD74AC151 and CD74ACT151 are 8-input digital multi­plexers that utilize the Harris Advanced CMOS Logic tech­nology. They have three binary control inputs (S0, S1, and S2) and an active-LOW Enable ( inputs select 1 of 8channels. The output is both inverting ( and non-inverting (Y).
Ordering Information
PART
NUMBER
CD74AC151E 0 to 70oC, -40 to 85,
CD74ACT151E 0 to 70oC, -40 to 85,
CD74AC151M96 0 to 70oC, -40 to 85,
CD74ACT151M96 0 to 70oC, -40 to 85,
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.
2. Wafer and die for this part number is available which meets all elec­trical specifications. Please contact your local sales office or Harris customer service for ordering information.
CD74AC151, CD74ACT151
(PDIP, SOIC)
TOP VIEW
V
1
I
3
2
I
2
3
I
1
4
I
0
5
Y
6
Y
7
E
8
16
CC
15
I
4
14
I
5
13
I
6
12
I
7
11
S
0
10
S
1
9
S
2
CD74ACT151
8-Input Multiplexer
E) input. The three binary
Y)
TEMP.
RANGE (oC) PACKAGE
16 Ld PDIP E16.3
-55 to 125 16 Ld PDIP E16.3
-55 to 125 16 Ld SOIC M16.15
-55 to 125 16 Ld SOIC M16.15
-55 to 125
PKG.
NO.
[
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. FAST™ is a Trademark of Fairchild Semiconductor.
Copyright
© Harris Corporation 1998
1
File Number 1980.1
CD74AC151, CD74ACT151
Functional Diagram
4
I
0
3
I
1
2
I
2
1
I
3
15
I
4
14
I
5
13
I
6
12
I
7
11
S
0
10
S
1
9
S
2
E
7
TRUTH TABLE
INPUTS OUTPUTS
ES2S
S
1
0
I
0
I
1
I
2
HXXXXXXXXXXXHL LLLLLXXXXXXXHL LLLLHXXXXXXXLH LLLHXLXXXXXXHL LLLHXHXXXXXXLH LLHLXXLXXXXXHL LLHLXXHXXXXXLH LLHHXXXLXXXXHL LLHHXXXHXXXXLH LHLLXXXXLXXXHL LHLLXXXXHXXXLH LHLHXXXXXLXXHL LHLHXXXXXHXXLH LHHLXXXXXXLXHL LHHLXXXXXXHXLH LHHHXXXXXXXLHL LHHHXXXXXXXHLH
H = HIGH voltage level, L = LOW voltage level, X = Don’t Care
5
Y
6
Y
GND = 8 V
= 16
CC
I
3
I
4
I
5
I
6
I
7
YY
2
CD74AC151, CD74ACT151
Absolute Maximum Ratings Thermal Information
DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V
DC Input Diode Current, I
IK
For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I
OK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
DC Output Source or Sink Current per Output Pin, I
O
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
DC VCC or Ground Current, I
CC orIGND
(Note 3) . . . . . . . . .±100mA
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, VCC (Note 4)
AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V
Input Rise and Fall Slew Rate, dt/dv
AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)
AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)
ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. For up to 4 outputs per device, add ±25mA for each additional output.
4. Unless otherwise specified, all voltages are referenced to ground.
5. θJA is measured with the component mounted on an evaluation PC board in free air.
Thermal Resistance (Typical, Note 5) θJA (oC/W)
PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
CC
DC Electrical Specifications
PARAMETER SYMBOL
AC TYPES
High Level Input Voltage V
Low Level Input Voltage V
High Level Output Voltage V
IH
IL
OH
TEST
CONDITIONS
(V) IO(mA) MIN MAX MIN MAX MIN MAX
I
V
CC
(V)
25
o
C
-40oC TO 85oC
-55oC TO 125oC
- - 1.5 1.2 - 1.2 - 1.2 - V 3 2.1 - 2.1 - 2.1 - V
5.5 3.85 - 3.85 - 3.85 - V
- - 1.5 - 0.3 - 0.3 - 0.3 V 3 - 0.9 - 0.9 - 0.9 V
5.5 - 1.65 - 1.65 - 1.65 V
VIH or V
-0.05 1.5 1.4 - 1.4 - 1.4 - V
IL
-0.05 3 2.9 - 2.9 - 2.9 - V
-0.05 4.5 4.4 - 4.4 - 4.4 - V
-4 3 2.58 - 2.48 - 2.4 - V
-24 4.5 3.94 - 3.8 - 3.7 - V
-75
5.5 - - 3.85 - - - V
(Note 6, 7)
-50
5.5----3.85 - V
(Note 6, 7)
UNITSV
3
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