TEXAS INSTRUMENTS CD74AC257 Technical data

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Data sheet acquired from Harris Semiconductor
SCHS248

August 1998

CD74A C257, CD74ACT257,

CD74A CT258

Quad 2-Input Multiplexer

with Three-State Outputs

Features

• CD74AC257, CD74ACT257 . . . . Non-Inverting Outputs

• CD74ACT258 . . . . . . . . . . . . . . . . . . . Inverting Outputs

• Buffered Inputs

• Typical Propagation Delay

- 4.4ns at V

= 5V, TA = 25oC, CL = 50pF

CC

• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015

• SCR-Latchup-Resistant CMOS Process and Circuit
Design

• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption

• Balanced Propagation Delays

• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply

• ±24mA Output Drive Current

- Fanout to 15 FAST™ ICs

Drives 50Ω Transmission Lines

Pinout

CD74AC257, CD74ACT257, CD74ACT258

(PDIP, SOIC)

TOP VIEW

AC/ACT257ACT258 ACT258AC/ACT257

V
1I
1I

1Y
2I
2I

2Y

GND

S

0
1

0
1

1I
1I

1Y
2I
2I

2Y

GND

1

S

2

0

3

1

4
5

0

6

1

7
8

16

CC

15

OE

14

4I

0

13

4I

1

12

4Y
3I

11

0

10

3I

1

9

3Y

V
OE
4I
4I
4Y
3I
3I
3Y

CC

0
1

0
1

Description

The CD74AC257, CD74ACT257 and CD74ACT258 are
quad 2-input multiplexers with three-state outputs that utilize
the Harris Advanced CMOS Logic technology. Each of these
devices selects four bits of data from two sources under the
control of a common Select input (S). The Output Enable
(

OE) is active LOW. When OE is HIGH, all of the outputs (Y

or

Y) are in the high-impedance state regardless of all other

input conditions.
Moving data from two groups of registers to four common

output buses is a common use of the CD74AC257,
CD74ACT257 and CD74ACT258. The state of the Select
input determines the particular register from which the data
comes. The CD74AC257, CD74ACT257 and CD74ACT258
can also be used as function generators.

Ordering Information

PART

NUMBER

CD74AC257E 0 to 70oC, -40 to 85,

CD74ACT257E 0 to 70oC, -40 to 85,

CD74ACT258E 0 to 70oC, -40 to 85,

CD74AC257M 0 to 70oC, -40 to 85,

CD74ACT257M 0 to 70oC, -40 to 85,

CD74ACT258M 0 to 70oC, -40 to 85,

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.

2. Waf erand die for this part number is available which meets all elec­trical specifications. Please contact your local sales office or Harris
customer service for ordering information.

TEMP.

RANGE (oC) PACKAGE

16 Ld PDIP E16.3

-55 to 125
16 Ld PDIP E16.3

-55 to 125
16 Ld PDIP E16.3

-55 to 125
16 Ld SOIC M16.15

-55 to 125
16 Ld SOIC M16.15

-55 to 125
16 Ld SOIC M16.15

-55 to 125

PKG.

NO.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.

Copyright

© Harris Corporation 1998

1

File Number 1955.1

Functional Diagram

OUTPUT
ENABLE

OE S I

HXXXZZ

LLLXLH
LLHXHL
LHXLLH
LHXHHL

H = High level voltage, L = Low level voltage, Z = High impedance (off) state, X = Don’t Care

CD74AC257, CD74ACT257, CD74ACT258

AC/ACT

AC/ACT

257

258

2

1I

0

5

2I

0

11

3I

0

14

4I

0

3

1I

1

6

2I

1

10

3I

1

13

4I

1

S

OE

115

TRUTH TABLE

SELECT

INPUT DATA INPUTS

0

4

1Y

1Y

7

2Y

2Y

9

3Y

3Y

12

4Y

4Y

257

OUTPUTS

I

1

Y Y

258

OUTPUTS

2

CD74AC257, CD74ACT257, CD74ACT258

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V

DC Input Diode Current, I

IK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, I

OK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC Output Source or Sink Current per Output Pin, I

O

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC VCC or Ground Current, I

CC orIGND

(Note 3) . . . . . . . . .±100mA

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, VCC (Note 4)

AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V

ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V

Input Rise and Fall Slew Rate, dt/dv

AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)

AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)

ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

3. For up to 4 outputs per device, add ±25mA for each additional output.

4. Unless otherwise specified, all voltages are referenced to ground.

5. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 5) θJA (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ___

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ___

Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC

CC

DC Electrical Specifications

PARAMETER SYMBOL

AC TYPES

High Level Input Voltage V

Low Level Input Voltage V

High Level Output Voltage V

IH

IL

OH

TEST

CONDITIONS

(V) IO(mA) MIN MAX MIN MAX MIN MAX

I

V

CC

(V)

25

o

C

-40oC TO
85oC

-55oC TO
125oC

- - 1.5 1.2 - 1.2 - 1.2 - V
3 2.1 - 2.1 - 2.1 - V

5.5 3.85 - 3.85 - 3.85 - V

- - 1.5 - 0.3 - 0.3 - 0.3 V
3 - 0.9 - 0.9 - 0.9 V

5.5 - 1.65 - 1.65 - 1.65 V

VIH or V

-0.05 1.5 1.4 - 1.4 - 1.4 - V

IL

-0.05 3 2.9 - 2.9 - 2.9 - V

-0.05 4.5 4.4 - 4.4 - 4.4 - V

-4 3 2.58 - 2.48 - 2.4 - V

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

5.5 - - 3.85 - - - V

(Note 6, 7)

-50

5.5----3.85 - V

(Note 6, 7)

UNITSV

3

CD74AC257, CD74ACT257, CD74ACT258

DC Electrical Specifications (Continued)

PARAMETER SYMBOL

Low Level Output Voltage V

OL

TEST

CONDITIONS

(V) IO(mA) MIN MAX MIN MAX MIN MAX

I

VIH or V

0.05 1.5 - 0.1 - 0.1 - 0.1 V

IL

V

CC

(V)

25

o

C

-40oC TO
85oC

-55oC TO
125oC

UNITSV

0.05 3 - 0.1 - 0.1 - 0.1 V

0.05 4.5 - 0.1 - 0.1 - 0.1 V
12 3 - 0.36 - 0.44 - 0.5 V
24 4.5 - 0.36 - 0.44 - 0.5 V
75

5.5 - - - 1.65 - - V

(Note 6, 7)

50

5.5-----1.65 V

(Note 6, 7)

Input Leakage Current I

I

VCC or

- 5.5 - ±0.1 - ±1-±1µA

GND

Three-State Leakage
Current

I

OZ

VIH or V
VO=V

IL

CC

- 5.5 - ±0.5 - ±5-±10 µA

or GND

Quiescent Supply Current
MSI

I

CC

VCC or

GND

0 5.5 - 8 - 80 - 160 µA

ACT TYPES

High Level Input Voltage V

IH

- - 4.5 to

2-2-2-V

5.5

Low Level Input Voltage V

IL

- - 4.5 to

- 0.8 - 0.8 - 0.8 V

5.5

High Level Output Voltage V

OH

VIH or V

-0.05 4.5 4.4 - 4.4 - 4.4 - V

IL

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

5.5 - - 3.85 - - - V

(Note 6, 7)

-50

5.5----3.85 - V

(Note 6, 7)

Low Level Output Voltage V

OL

VIH or V

0.05 4.5 - 0.1 - 0.1 - 0.1 V

IL

24 4.5 - 0.36 - 0.44 - 0.5 V
75

5.5 - - - 1.65 - - V

(Note 6, 7)

50

5.5-----1.65 V

(Note 6, 7)

Input Leakage Current I

I

VCC or

- 5.5 - ±0.1 - ±1-±1µA

GND

Three-State or Leakage
Current

I

OZ

VIH or V
VO=V

IL

CC

- 5.5 - ±0.5 - ±5-±10 µA

or GND

Quiescent Supply Current
MSI

AdditionalSupplyCurrent per
Input Pin TTL Inputs High

I

CC

VCC or

0 5.5 - 8 - 80 - 160 µA

GND

∆I

CC

V

CC

-2.1

- 4.5 to

5.5

- 2.4 - 2.8 - 3 mA

1 Unit Load

NOTES:

6. Test one output at a timefora1-secondmaximumduration.Measurementismadebyforcingcurrentandmeasuring voltage to minimize
power dissipation.

o

7. Test verifies a minimum 50Ω transmission-line-drive capability at 85

C, 75Ω at 125oC.

4

CD74AC257, CD74ACT257, CD74ACT258

ACT Input Load Table

INPUT UNIT LOAD

Data 0.83

S 1.27

OE 1.27

NOTE: Unitload is ∆ICClimit specified in DC Electrical Specifications
Table, e.g., 2.4mA max at 25oC.

Switching Specifications Input t

PARAMETER SYMBOL V

AC TYPES

Propagation Delay,
In to Y
CD74AC/ACT257

Propagation Delay,
S to Y
CD74AC/ACT257

Propagation Delay,
OE to Y
CD74AC/ACT257

Propagation Delay,
In to Y
CD74AC/ACT258

Propagation Delay,
S to Y
CD74AC/ACT258

Propagation Delay,
OE to Y
CD74AC/ACT258

Three-State Output
Capacitance

Input Capacitance C
Power Dissipation Capacitance C

ACT TYPES

Propagation Delay,
In to Y
CD74AC/ACT257

Propagation Delay,
S to Y
CD74AC/ACT257

t

PLH

t

PLH

t

PLZ

t

PZL

t

PLH

t

PLH

t

PLZ

t

PZL

(Note 11)

t

PLH

t

PLH

, tf = 3ns, CL= 50pF (Worst Case)

r

(V)

CC

, t

PHL

1.5 - - 106 - - 117 ns

3.3

3.3 - 11.8 3.3 - 13 ns

(Note 9)

5

2.4 - 8.5 2.3 - 9.3 ns

(Note 10)

, t

PHL

1.5 - - 153 - - 168 ns

3.3 4.8 - 17.1 4.7 - 18.8 ns
5 3.5 - 12.2 3.4 - 13.4 ns

, t

, t

PHZ

PZH

,

1.5 - - 167 - - 184 ns

3.3 5.3 - 18.7 5.2 - 20.6 ns
5 3.8 - 13.4 3.7 - 14.7 ns

, t

PHL

1.5 - - 91 - - 100 ns

3.3 2.9 - 10.2 2.8 - 11.2 ns
5 2.1 - 7.3 2 - 8 ns

, t

PHL

1.5 - - 153 - - 168 ns

3.3 4.8 - 17.1 4.7 - 18.8 ns
5 3.5 - 12.2 3.4 - 13.4 ns

, t

, t

PHZ

PZH

,

1.5 - - 167 - - 184 ns

3.3 5.3 - 18.7 5.2 - 20.6 ns
5 3.8 - 13.4 3.7 - 14.7 ns

C

O

I

PD

, t

PHL

- - -15- -15pF

- - -10- -10pF

- - 130 - - 130 - pF

5

2.8 - 9.7 2.7 - 10.7 ns

(Note 10)

, t

PHL

5 4 - 14 3.9 - 15.4 ns

-40oC TO 85oC -55oC TO 125oC
UNITSMIN TYP MAX MIN TYP MAX

5

CD74AC257, CD74ACT257, CD74ACT258

Switching Specifications Input t

, tf = 3ns, CL= 50pF (Worst Case) (Continued)

r

-40oC TO 85oC -55oC TO 125oC

PARAMETER SYMBOL V

Propagation Delay,
OE to Y

t

PLZ

t

PZL

, t

,

PHZ

, t

PZH

(V)

CC

5 4.1 - 14.6 4 - 16.1 ns

CD74AC/ACT257
Propagation Delay,

t

PLH

, t

PHL

5 2.4 - 8.5 2.3 - 9.3 ns
In to Y
CD74AC/ACT258

Propagation Delay,

t

PLH

, t

PHL

5 4 - 14 3.9 - 15.4 ns
S to Y
CD74AC/ACT258

Propagation Delay,
OE to Y

t

PLZ

t

PZL

, t

, t

PHZ

PZH

,

5 4.1 - 14.6 4 - 16.1 ns

CD74AC/ACT258
Three-State Output

C

O

- - -15- -15pF

Capacitance
Input Capacitance C
Power Dissipation Capacitance C

I

PD

- - -10- -10pF

- - 130 - - 130 - pF

(Note 11)

NOTES:

8. Limits tested 100%.

9. 3.3V Min is at 3.6V, Max is at 3V.

10. 5V Min is at 5.5V, Max is at 4.5V.

11. CPD is used to determine the dynamic power consumption per multiplexer.
AC: PD = CPD V
ACT: PD=CPDV

2

fi + ∑ (CL V

CC

2

fi+ ∑ (CLV

CC

2

fo)

CC

2

fo)+VCC∆ICCwhere fi= input frequency, fo= output frequency, CL= output load capacitance,

CC

VCC = supply voltage.

UNITSMIN TYP MAX MIN TYP MAX

t

= 3ns

r

OUTPUT

DISABLE

t

PLZ

OUTPUT: LOW

TO OFF TO LOW

t

PHZ

OUTPUT: HIGH

TO OFF TO HIGH

OUTPUTS
ENABLED

OTHER
INPUTS

(TIED HIGH

OR LOW)

OUTPUT

DISABLE

†FOR AC SERIES ONLY: WHEN V

DUT

WITH

THREE-

STATE

OUTPUT

OUTPUTS

DISABLED

= 1.5V, RL = 1kΩ

CC

C

L

50pF

t

t

500
R

PZL

PZH

= 3ns

t

f

L

†

Ω

500
R

L

INPUT LEVEL

V

S

0.2V

CC

0.8 V

CC

V

S

OUTPUTS
ENABLED

GND (t

PHZ,tPZH

OPEN (t

PHL,tPLH

2 V

(t

CC

PLZ,tPZL

(OPEN DRAIN)

OUT

†

Ω

90%
V

S

10%

GND

VOL (≠GND)

(≠VCC)

V

OH

)

)

)

FIGURE 1. THREE-STATE PROPAGATION DELAY TIMES AND TEST CIRCUIT

6

nI

, nI1, S

0

Y

t

PLH

CD74AC257, CD74ACT257, CD74ACT258

= 3nstr = 3ns

t

f

90%

V

S

10%

t

PHL

V

S

INPUT
LEVEL

GND

INPUT LEVEL

S

t

PLH

Y

t

PHL

V

S

V

S

FIGURE 2. INPUTS OR SELECT TO OUTPUT PROPAGATION

DELAYS (AC/ACT257)

OUTPUT

R

(NOTE)

L

C

L

50pF

500Ω

DUT

OUTPUT

LOAD

NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.

CD74AC CD74ACT

Input Level V
Input Switching Voltage, V
Output Switching Voltage, V

S

S

0.5 V

0.5 V

CC

CC
CC

1.5V

0.5 V

FIGURE 4. PROPAGATION DELAY TIMES

FIGURE 3. SELECT TO OUTPUT PROPAGATION DELAYS

(ACT258)

3V

CC

7

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