TEXAS INSTRUMENTS CD74AC139 Technical data

查询CD74AC139供应商

CD74AC139,

[ /Title
(CD74
AC139
,
CD74
ACT13

9)
/Sub­ject
(Dual
2-to-4­Line
Decod
er/Dem
ulti­plexer)
/Autho
r ()
/Key­words
(Har­ris
Semi­con­ductor,
Advan
ced
CMOS
)
/Cre­ator ()
/DOCI
NFO

Data sheet acquired from Harris Semiconductor
SCHS235

September 1998

Features

• Buffered Inputs

• Typical Propagation Delay

- 5.4ns at V

• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015

• SCR-Latchup-Resistant CMOS Process and Circuit
Design

• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption

• Balanced Propagation Delays

• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply

• ±24mA Output Drive Current

- Fanout to 15 FAST™ ICs

- Drives 50Ω Transmission Lines

= 5V, TA = 25oC, CL = 50pF

CC

Pinout

1A0
1A1
1Y0
1Y1
1Y2
1Y3

GND

Dual 2-to-4-Line Decoder/Demultiplexer

Description

The CD74AC139 and CD74ACT139 are dual 2-to-4-line
decoders/demultiplexers that utilize the Harris Advanced
CMOS Logic technology. These devices contain two inde­pendent binary to one-of-four decoders, each with a single
active LOW enable input (
inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four
normally HIGH outputs to go LOW.

If the enable inputisHIGH,allfour outputs remain HIGH. For
demultiplexer operation, the enable input is the data input.
The enable input also functions as a chip select when these
devices are cascaded.

Ordering Information

PART

NUMBER

CD74AC139E 0 to 70oC, -40 to 85,

CD74ACT139E 0 to 70oC, -40 to 85,

CD74AC139M96 0 to 70oC, -40 to 85,

CD74ACT139M 0 to 70oC, -40 to 85,

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.

2. Wafer and die for this part number is availablewhich meets all elec­trical specifications. Please contact your local sales office or Harris
customer service for ordering information.

CD74AC139, CD74ACT139

(PDIP, SOIC)

TOP VIEW

V

1E

1
2
3
4
5
6
7
8

16
15

2E

14

2A0

13

2A1

12

2Y0

11

2Y1

10

2Y2

9

2Y3

CD74ACT139

1E or 2E). Data on the select

TEMP.

RANGE (oC) PACKAGE

16 Ld PDIP E16.3

-55 to 125
16 Ld PDIP E16.3

-55 to 125
16 Ld SOIC M16.15

-55 to 125
16 Ld SOIC M16.15

-55 to 125

CC

PKG.

NO.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.

Copyright

© Harris Corporation 1998

1

File Number 1953.1

Functional Diagram

CD74AC139, CD74ACT139

1A0

1A1

1

2A0

2A1

2

2

DECODER

1

3
1

E

14

DECODER

2

13
15

E

4

1Y0

5

1

6

1

7

1Y3

12

2Y0

11

2

10

2Y2

9

2Y3

GND = 8
V

= 16

CC

Y1
Y2

Y1

TRUTH TABLE

INPUTS

OUTPUTSENABLE SELECT

EA1A0Y3 Y2 Y1 Y0

L LLHHHL
L LHHHLH
L HLHLHH
L HHLHHH
H XXHHHH

X = Don’t Care

2

CD74AC139, CD74ACT139

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V

DC Input Diode Current, I

IK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, I

OK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC Output Source or Sink Current per Output Pin, I

O

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC VCC or Ground Current, I

CC orIGND

(Note 3) . . . . . . . . .±100mA

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, VCC (Note 4)

AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V

ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V

Input Rise and Fall Slew Rate, dt/dv

AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)

AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)

ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

3. For up to 4 outputs per device, add ±25mA for each additional output.

4. Unless otherwise specified, all voltages are referenced to ground.

5. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 5) θJA (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

CC

DC Electrical Specifications

PARAMETER SYMBOL

AC TYPES

High Level Input Voltage V

Low Level Input Voltage V

High Level Output Voltage V

IH

IL

OH

TEST

CONDITIONS

(V) IO(mA) MIN MAX MIN MAX MIN MAX

I

V

CC

(V)

25

o

C

-40oC TO
85oC

-55oC TO
125oC

- - 1.5 1.2 - 1.2 - 1.2 - V
3 2.1 - 2.1 - 2.1 - V

5.5 3.85 - 3.85 - 3.85 - V

- - 1.5 - 0.3 - 0.3 - 0.3 V
3 - 0.9 - 0.9 - 0.9 V

5.5 - 1.65 - 1.65 - 1.65 V

VIH or V

-0.05 1.5 1.4 - 1.4 - 1.4 - V

IL

-0.05 3 2.9 - 2.9 - 2.9 - V

-0.05 4.5 4.4 - 4.4 - 4.4 - V

-4 3 2.58 - 2.48 - 2.4 - V

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

5.5 - - 3.85 - - - V

(Note 6, 7)

-50

5.5----3.85 - V

(Note 6, 7)

UNITSV

3

CD74AC139, CD74ACT139

DC Electrical Specifications (Continued)

PARAMETER SYMBOL

Low Level Output Voltage V

OL

TEST

CONDITIONS

(V) IO(mA) MIN MAX MIN MAX MIN MAX

I

VIH or V

0.05 1.5 - 0.1 - 0.1 - 0.1 V

IL

V

CC

(V)

25

o

C

0.05 3 - 0.1 - 0.1 - 0.1 V

0.05 4.5 - 0.1 - 0.1 - 0.1 V
12 3 - 0.36 - 0.44 - 0.5 V
24 4.5 - 0.36 - 0.44 - 0.5 V
75

5.5 - - - 1.65 - - V

(Note 6, 7)

50

5.5-----1.65 V

(Note 6, 7)

Input Leakage Current I

I

VCC or

- 5.5 - ±0.1 - ±1-±1µA

GND

Quiescent Supply Current
MSI

I

CC

VCC or

GND

0 5.5 - 8 - 80 - 160 µA

ACT TYPES

High Level Input Voltage V

IH

- - 4.5 to

2-2-2-V

5.5

Low Level Input Voltage V

IL

- - 4.5 to

- 0.8 - 0.8 - 0.8 V

5.5

High Level Output Voltage V

OH

VIH or V

-0.05 4.5 4.4 - 4.4 - 4.4 - V

IL

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

5.5 - - 3.85 - - - V

(Note 6, 7)

-50

5.5----3.85 - V

(Note 6, 7)

Low Level Output Voltage V

OL

VIH or V

0.05 4.5 - 0.1 - 0.1 - 0.1 V

IL

24 4.5 - 0.36 - 0.44 - 0.5 V
75

5.5 - - - 1.65 - - V

(Note 6, 7)

50

5.5-----1.65 V

(Note 6, 7)

Input Leakage Current I

I

VCC or

- 5.5 - ±0.1 - ±1-±1µA

GND

Quiescent Supply Current
MSI

AdditionalSupply Current per
Input Pin TTL Inputs High

I

CC

VCC or

GND

∆I

CC

V

CC

-2.1

0 5.5 - 8 - 80 - 160 µA

- 4.5 to

- 2.4 - 2.8 - 3 mA

5.5

1 Unit Load

NOTES:

6. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize
power dissipation.

o

7. Test verifies a minimum 50Ω transmission-line-drive capability at 85

C, 75Ω at 125oC.

-40oC TO
85oC

-55oC TO
125oC

UNITSV

ACT Input Load Table

INPUT UNIT LOAD

A0, A1 1

E 0.67

NOTE: Unit load is ∆ICClimit specified in DC ElectricalSpecifications
Table, e.g., 2.4mA max at 25oC.

4

CD74AC139, CD74ACT139

Switching Specifications Input t

, tf = 3ns, CL= 50pF (Worst Case)

r

-40oC TO 85oC -55oC TO 125oC

PARAMETER SYMBOL V

CC

(V)

AC TYPES

Propagation Delay, A0, A1 to
Outputs

t

PLH

, t

PHL

1.5 - - 119 - - 131 ns

3.3

3.9 - 13.4 3.7 - 14.7 ns

(Note 9)

5

2.8 - 9.5 2.6 - 10.5 ns

(Note 10)

Propagation Delay,
E to Outputs

t

PLH

, t

PHL

1.5 - - 119 - - 131 ns

3.1 3.9 - 13.4 3.7 - 14.7 ns
5 2.8 - 9.5 2.6 - 10.5 ns

Input Capacitance C
Power Dissipation Capacitance C

I

PD

- - -10- -10pF

- - 83 - - 83 - pF

(Note 11)

ACT TYPES

Propagation Delay, A0, A1 to
Outputs

Propagation Delay,

t

PLH

t

PLH

, t

PHL

5

3.1 - 10.5 2.9 - 11.5 ns

(Note 10)

, t

PHL

5 3.2 - 10.9 3 - 12 ns

E to Outputs
Input Capacitance C
Power Dissipation Capacitance C

I

PD

- - -10- -10pF

- - 83 - - 83 - pF

(Note 11)

NOTES:

8. Limits tested at 100%.

9. 3.3V Min at 3.6V, Max at 3V.

10. 5V Min at 5.5V, Max at 4.5V.

11. CPD is used to determine the dynamic power consumption per decoder/demultiplexer.
AC: PD = V
ACT: PD = V

2

fi(CPD + CL)

CC

2

fi(CPD + CL) + VCC∆ICC where fi = input frequency, CL = output load capacitance, VCC = supply voltage.

CC

UNITSMIN TYP MAX MIN TYP MAX

tr = 3ns

INPUT E

t

PLH

INPUT Y3

FIGURE 1.

tf = 3ns

t

PHL

90%
V

S

10%

V

3ns3ns

90%

V

S

INPUT
LEVEL

GND

S

10%

V

t

PHL

S

t

PLH

INPUT
LEVEL

A1
GND

OUTPUT

Y3

FIGURE 2.

5

DUT

OUTPUT

R

L

CD74AC139, CD74ACT139

(NOTE)
500Ω

OUTPUT

LOAD

C

L

50pF

NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.

CD74AC CD74ACT

Input Level V
Input Switching Voltage, V
Output Switching Voltage, V

S

S

0.5 V

0.5 V

CC

CC
CC

FIGURE 3. PROPAGATION DELAY TIMES

3V

1.5V

0.5 V

CC

6

IMPORTANT NOTICE

T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.

CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Copyright  1999, Texas Instruments Incorporated