• SCR-Latchup-Resistant CMOS Process and Circuit
Design
• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption
• Balanced Propagation Delays
• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply
• ±24mA Output Drive Current
- Fanout to 15 FAST™ ICs
- Drives 50Ω Transmission Lines
= 5V, TA = 25oC, CL = 50pF
CC
Pinout
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
(PDIP, SOIC)
TOP VIEW
V
A0
A1
A2
E1
E2
E3
AC/ACT138
AC/ACT238 Y7
Y7
GND
1
2
3
4
5
6
7
8
16
CC
Y0 AC/ACT138
15
Y0 AC/ACT238
Y1 AC/ACT138
14
Y1 AC/ACT238
Y2 AC/ACT138
13
Y2 AC/ACT238
Y3 AC/ACT138
12
Y3 AC/ACT238
Y4 AC/ACT138
11
Y4 AC/ACT238
Y5 AC/ACT138
10
Y5 AC/ACT238
9
Y6 AC/ACT138
Y6 AC/ACT238
3-to-8-Line Decoders/Demultiplexers
Description
TheCD74AC138,CD74ACT138,CD74AC238,and
CD74ACT238 are 3-to-8-line decoders/demultiplexers that
utilize the Harris Advanced CMOS Logic technology. Both
circuits have three binary select inputs (A0, A1, and A2). If
the device is enabled, these inputs determine which one of
the eight normally HIGH outputs of the AC/ACT138 will go
LOW or which on of the normally LOW outputs of the
AC/ACT238 will go HIGH. Two active LOW and one active
HIGH enables (
cascading of these devices.
Ordering Information
PART
NUMBER
CD74AC138E0 to 70oC, -40 to 85,
CD74ACT138E0 to 70oC, -40 to 85,
CD74AC238E0 to 70oC, -40 to 85,
CD74ACT238E0 to 70oC, -40 to 85,
CD74AC138M0 to 70oC, -40 to 85,
CD74ACT138M0 to 70oC, -40 to 85,
CD74AC238M0 to 70oC, -40 to 85,
CD74ACT238M0 to 70oC, -40 to 85,
NOTES:
17. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
18. Waferanddieforthis part number is availablewhich meets all electrical specifications. Please contact your local sales office or Harris
customer service for ordering information.
E1, E2 and E3) are provided to simplify the
TEMP.
RANGE (oC)PACKAGE
16 Ld PDIPE16.3
-55 to 125
16 Ld PDIPE16.3
-55 to 125
16 Ld PDIPE16.3
-55 to 125
16 Ld PDIPE16.3
-55 to 125
16 Ld SOICM16.15
-55 to 125
16 Ld SOICM16.15
-55 to 125
16 Ld SOICM16.15
-55 to 125
16 Ld SOICM16.15
-55 to 125
PKG.
NO.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
21. For up to 4 outputs per device, add ±25mA for each additional output.
22. Unless otherwise specified, all voltages are referenced to ground.
23. θJA is measured with the component mounted on an evaluation PC board in free air.
AdditionalSupplyCurrent per
Input Pin TTL Inputs High
I
CC
VCC or
GND
∆I
CC
V
CC
-2.1
05.5-8-80-160µA
-4.5 to
-2.4-2.8-3mA
5.5
1 Unit Load
NOTES:
24. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize
power dissipation.
o
25. Test verifies a minimum 50Ω transmission-line-drive capability at 85
C, 75Ω at 125oC.
-40oC TO
85oC
-55oC TO
125oC
UNITSV
ACT Input Load Table
INPUTUNIT LOAD
A0-A20.83
E1, E21
E30.42
NOTE: Unit load is ∆ICClimit specified in DC Electrical Specifications
Table, e.g., 2.4mA max at 25oC.
4
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
Switching Specifications Input t
PARAMETERSYMBOL V
AC TYPES
Propagation Delay,
An to Output
(CD74AC/ACT138)
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT138)
Propagation Delay,
E3 to Output
(CD74AC/ACT138)
Propagation Delay,
An to Output
(CD74AC/ACT238)
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT238)
Propagation Delay,
E3 to Output
(CD74AC/ACT238)
Input CapacitanceC
Power Dissipation CapacitanceC
ACT TYPES
Propagation Delay,
An to Output
(CD74AC/ACT138)
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT138)
Propagation Delay,
E3 to Output
(CD74AC/ACT138)
Propagation Delay,
An to Output
(CD74AC/ACT238)
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT238)
t
PLH
t
PLH
t
PLH
t
PLH
t
PLH
t
PLH
(Note 13)
t
PLH
t
PLH
t
PLH
t
PLH
t
PLH
, tf = 3ns, CL= 50pF (Worst Case)
r
(V)
CC
, t
PHL
1.5--125--138ns
3.3
4-143.9-15.4ns
(Note 11)
5
2.8-102.8-11ns
(Note 12)
, t
PHL
1.5--114--125ns
3.33.6-12.73.5-14ns
52.6-9.12.5-10ns
, t
PHL
1.5--125--138ns
3.34-143.9-15.4ns
52.8-102.8-11ns
, t
PHL
1.5--170--187ns
3.35.4-19.15.3-21ns
53.9-13.63.8-15ns
, t
PHL
1.5--135--149ns
3.34.3-15.24.2-16.7ns
53.1-10.73-11.9ns
, t
PHL
1.5--189--208ns
3.36-21.15.8-23.2ns
54.3-15.14.2-16.6ns
-- -10- -10pF
--110--110-pF
5
3.1-10.93-12ns
PD
, t
I
PHL
(Note 12)
, t
PHL
, t
PHL
, t
PHL
, t
PHL
52.7-9.52.6-10.5ns
52.8-102.8-11ns
54-14.23.9-15.6ns
53.7-12.93.6-14.2ns
-40oC TO 85oC-55oC TO 125oC
UNITSMINTYPMAXMINTYPMAX
5
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
Switching Specifications Input t
, tf = 3ns, CL= 50pF (Worst Case) (Continued)
r
-40oC TO 85oC-55oC TO 125oC
PARAMETERSYMBOL V
Propagation Delay,
t
PLH
, t
PHL
(V)
CC
53.5-12.43.4-13.6ns
E3 to Output
(CD74AC/ACT238)
Input CapacitanceC
Power Dissipation CapacitanceC
I
PD
-- -10- -10pF
--110--110-pF
(Note 13)
NOTES:
26. Limits tested at 100%.
27. 3.3V Min at 3.6V, Max at 3V.
28. 5V Min at 5.5V, Max at 4.5V.
29. CPD is used to determine the dynamic power consumption per package.
AC: PD = V
ACT: PD = V
tr = 3ns
INPUT
2
fi(CPD + CL)
CC
2
fi(CPD + CL) + VCC∆ICC where fi = input frequency, CL = output load capacitance, VCC = supply voltage.
CC
= 3ns
t
f
90%
V
S
10%
GND
E1, E2
E3
= 3ns
t
r
INPUT
= 3ns
t
f
UNITSMINTYPMAXMINTYPMAX
90%
V
S
GND
138 OUTPUT
238 OUTPUT
t
PLH
t
PHL
t
PLH
t
PHL
V
S
V
S
FIGURE 8. PROPAGATION DELAY TIMESFIGURE 9. PROPAGATION DELAY TIMES
OUTPUT
R
(NOTE)
L
C
L
50pF
500Ω
DUT
OUTPUT
LOAD
NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.
CD74ACCD74ACT
Input LevelV
Input Switching Voltage, V
Output Switching Voltage, V
S
S
0.5 V
0.5 V
CC
CC
CC
FIGURE 10. PROPAGATION DELAY TIMES
3V
1.5V
0.5 V
CC
138 OUTPUT
238 OUTPUT
t
t
PHL
PLH
t
PLH
t
PHL
V
S
V
S
6
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pertaining to warranty, patent infringement, and limitation of liability.
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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Copyright 1999, Texas Instruments Incorporated
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