TEXAS INSTRUMENTS CD74AC04 Technical data

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CD74A C04, CD74ACT04,

[ /Title
(CD74
AC04,
CD74
ACT04
,
CD74
AC05,
CD74
ACT05
)
/Sub­ject
(Hex
Invert­ers)
/Autho
r ()
/Key­words
(Har­ris
Semi­con­ductor,
Advan
ced
CMOS
,Harris
Semi­con­ductor,
Advan

Data sheet acquired from Harris Semiconductor
SCHS225

September 1998

Features

• CD74AC04, CD74ACT04 . . . . . . . . . . . . Active Outputs

• CD74AC05, CD74ACT05 . . . . . . . .Open-Drain Outputs

• Buffered Inputs

• Typical Propagation Delay

- 3.5ns at V

• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015

• SCR-Latchup-Resistant CMOS Process and Circuit
Design

• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption

• Balanced Propagation Delays

• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply

• ±24mA Output Drive Current

- Fanout to 15 FAST™ ICs

- Drives 50Ω Transmission Lines

= 5V, TA = 25oC, CL = 50pF

CC

Pinout

CD74AC04, CD74ACT04, CD74AC05, CD74ACT05

(PDIP, SOIC)

TOP VIEW

1A
1Y
2A
2Y
3A
3Y

GND

1
2
3
4
5
6
7

V

14

CC

6A

13

6Y

12
11

5A
5Y

10

9

4A
4Y

8

CD74A C05, CD74ACT05

Hex Inverters

Description

The CD74AC04, CD74ACT04, CD74AC05 and CD74ACT05
are hex inverters that utilize the Harris Advanced CMOS
Logic technology.

Ordering Information

PART

NUMBER

CD74AC04E -55 to 125 14 Ld PDIP E14.3
CD74ACT04E -55 to 125 14 Ld PDIP E14.3
CD74AC05E -55 to 125 14 Ld PDIP E14.3
CD74ACT05E -55 to 125 14 Ld PDIP E14.3
CD74AC04M -55 to 125 14 Ld SOIC M14.15
CD74ACT04M -55 to 125 14 Ld SOIC M14.15
CD74AC05M -55 to 125 14 Ld SOIC M14.15
CD74ACT05M -55 to 125 14 Ld SOIC M14.15

NOTES:

1. Whenordering,use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.

2. Wafer and die forthispart number is availablewhichmeetsallelec­trical specifications. Please contact your local sales office or Harris
customer service for ordering information.

Functional Diagram

1A

2A

3A

4A

5A

6A

CD74AC/ACT04 CD74AC/ACT05

INPUT OUTPUT INPUT OUTPUT

LHLZ

HLHL

Z = High Impedance

TEMP.

RANGE (oC) PACKAGE

1

3

5

9

11

13

TRUTH TABLE

2

4

6

8

10

12

GND = 7
V

CC

1Y

2Y

3Y

4Y

5Y

6Y

= 14

PKG.

NO.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.

Copyright

© Harris Corporation 1998

1

File Number 1945.1

CD74AC04, CD74ACT04, CD74AC05, CD74ACT05

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V

DC Input Diode Current, I

IK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, I

OK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC Output Source or Sink Current per Output Pin, I

O

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC VCC or Ground Current, I

CC orIGND

(Note 3) . . . . . . . . .±100mA

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, VCC (Note 4)

AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V

ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V

Input Rise and Fall Slew Rate, dt/dv

AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)

AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)

ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

3. For up to 4 outputs per device, add±25mA for each additional output.

4. Unless otherwise specified, all voltages are referenced to ground.

5. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 5) θJA (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175

Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC

CC

DC Electrical Specifications

PARAMETER SYMBOL

AC TYPES

High Level Input Voltage V

Low Level Input Voltage V

High Level Output Voltage
(04)

V

IH

IL

OH

TEST

CONDITIONS

(V) IO(mA) MIN MAX MIN MAX MIN MAX

I

V

CC

(V)

25

o

C

-40oC TO
85oC

-55oC TO
125oC

- - 1.5 1.2 - 1.2 - 1.2 - V
3 2.1 - 2.1 - 2.1 - V

5.5 3.85 - 3.85 - 3.85 - V

- - 1.5 - 0.3 - 0.3 - 0.3 V
3 - 0.9 - 0.9 - 0.9 V

5.5 - 1.65 - 1.65 - 1.65 V

VIH or V

-0.05 1.5 1.4 - 1.4 - 1.4 - V

IL

-0.05 3 2.9 - 2.9 - 2.9 - V

-0.05 4.5 4.4 - 4.4 - 4.4 - V

-4 3 2.58 - 2.48 - 2.4 - V

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

5.5 - - 3.85 - - - V

(Note 6, 7)

-50

5.5----3.85 - V

(Note 6, 7)

UNITSV

2