Texas Instruments CD74HCT32M96, CD74HCT32M, CD74HCT32E, CD74HC32M96, CD74HC32M Datasheet
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CD54HCT32, CD74HC32,
/
j
[ /Title
(CD54
HCT32
,
CD74
HC32,
CD74
HCT32
)
Subect
(High
Data sheet acquired from Harris Semiconductor
SCHS274
September 1997
Features
• Typical Propagation Delay: 7ns at VCC = 5V,
C
= 15pF, TA = 25oC
L
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
= 0.8V (Max), VIH = 2V (Min)
IL
- CMOS Input Compatibility, I
• Related Literature
- CD54HC32F3A and CD54HCT32F3A Military
Data Sheet, Document Number 3765
= 30%, NIH = 30% of V
IL
≤ 1µA at VOL, V
l
o
C to 125oC
CC
OH
CD74HCT32
High Speed CMOS Logic
Quad 2-Input OR Gate
Description
The Harris CD74HC32, CD74HCT32 contain four 2-input OR
gates in one package. Logic gates utilize silicon gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The 74HCT logic family is functionally pin
compatible with the standard 74LS logic family.
Ordering Information
TEMP.RANGE
PART NUMBER
CD74HC32E -55 to 125 14 Ld PDIP E14.3
CD74HCT32E -55 to 125 14 Ld PDIP E14.3
CD74HC32M -55 to 125 14 Ld SOIC M14.15
CD74HCT32M -55 to 125 14 Ld SOIC M14.15
CD54HCT32F -55 to 125 14 Ld CERDIP F14.3
CD54HC32W -55 to 125 Wafer
NOTES:
1. When ordering, use the entire part number.Add the suffix 96 to
obtain the variant in the tape and reel.
2. Die for this part number is available which meets all electrical
specifications. Please contact your local sales office or Harris
customer service for ordering information.
(oC) PACKAGE
PKG.
NO.
Pinout
CD54HCT32, CD74HC32, CD74HCT32
(PDIP, CERDIP, SOIC)
TOP VIEW
1A
1
2
1B
1Y
3
2A
4
2B
5
2Y
6
GND
7
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
1
V
14
CC
4B
13
4A
12
4Y
11
3B
10
3A
9
3Y
8
File Number 1643.2
Functional Diagram
CD54HCT32, CD74HC32, CD74HCT32
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
14
V
CC
13
4B
12
4A
11
4Y
10
3B
9
3A
8
3Y
TRUTH TABLE
INPUTS OUTPUT
nA nB nY
LLL
LHH
HLH
HHH
NOTE: H = High Voltage Level, L = Low Voltage Level
HC Logic Symbol HCT Logic Symbol
nA
nY
nB
nA
nB
nY
2
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