CD74HC139,
[ /Title
(CD74
HC139
,
CD74
HCT13
9)
Subect
(High
Speed
CMOS
Logic
Dual
2-to-4
Line
Decod
Data sheet acquired from Harris Semiconductor
SCHS148A
September 1997 - Revised May 1999
Features
• Multifunction Capability
- Binary to 1 of 4 Decoders or 1 to 4 Line
Demultiplexer
• Active Low Mutually Exclusive Outputs
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High NoiseImmunity: N
V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
= 0.8V (Max), VIH = 2V (Min)
IL
- CMOS Input Compatibility, I
• Memory Decoding, Data Routing, Code Conversion
= 30%, NIH= 30%of VCCat
IL
≤ 1µA at VOL, V
l
o
C to 125oC
OH
CD74HCT139
High-Speed CMOS Logic
Dual 2-to-4 Line Decoder/Demultiplexer
Description
The CD74HC139 and CD74HCT139 devices contain two
independent binary to one of four decoders each with a
single active low enable input (
inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four
normally high outputs to go low.
If the enable input is high all four outputs remain high. For
demultiplexer operation the enable input is the data input.
The enable input also functions as a chip select when these
devices are cascaded. This device is functionally the same
as the CD4556B and is pin compatible with it.
The outputs of these devices can drive 10 low power
Schottky TTL equivalent loads. The 74HCT logic family is
functionally as well as pin equivalent to the 74LS logic family.
Ordering Information
PART NUMBER TEMP. RANGE (oC) PACKAGE
CD74HC139E -55 to 125 16 Ld PDIP E16.3
CD74HCT139E -55 to 125 16 Ld PDIP E16.3
CD74HC139M -55 to 125 16 Ld SOIC M16.15
CD74HCT139M -55 to 125 16 Ld SOIC M16.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Die is available which meets all electrical specifications. Please
contact your local sales office or customer service for ordering
information.
1E or 2E). Data on the select
PKG.
NO.
Pinout
CD74HC139, CD74HCT139
(PDIP, SOIC)
TOP VIEW
16
1
1E
1A0
2
1A1
3
4
1Y0
5
1Y1
6
1Y2
7
1Y3
8
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Texas Instruments Incorporated 1999
1
V
CC
15
2E
14
2A0
13
2A1
12
2Y0
11
2Y1
10
2Y2
9
2Y3
Functional Diagram
CD74HC139, CD74HCT139
4 (12)
2 (14)
A0
3 (13)
A1
1 (15)
E
TRUTH TABLE
INPUTS ENABLE SELECT OUTPUTS
EA1A0Y3 Y2 Y1 Y0
0001110
0011101
0101011
5 (11)
6 (10)
7 (9)
Y0
Y1
Y2
Y3
Logic Diagram
0110111
1XX1111
NOTE: X = Don’t Care, Logic 1 = High, Logic 0 = Low
2 (14)
A0
3 (13)
A1
1 (15)
E
4 (12)
Y0
5 (11)
Y1
6 (10)
Y2
7 (9)
Y3
2