CD74HC132,
[ /Title
(CD74
HC132
,
CD74
HCT13
2)
Subect
(High
Speed
CMOS
Logic
Quad
2-Input
NAND
Schmit
Data sheet acquired from Harris Semiconductor
SCHS145
August 1997
Features
• Unlimited Input Rise and Fall Times
• Exceptionally High Noise Immunity
• Typical Propagation Delay: 10ns at V
C
= 15pF, TA = 25oC
L
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
= 37%, NIH = 51% of V
IL
CC
= 5V,
o
Pinout
Quad 2-Input NAND Schmitt Trigger
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
- CMOS Input Compatibility, I
• Related Literature
- CD54HC132F3A and CD54HCT132F3A Military
Data Sheet, Document Number 3778
C to 125oC
CD74HC132, CD74HCT132
Description
The Harris CD74HC132, CD74HCT132 each contain four
2-input NAND Schmitt Triggers in one package. This logic
device utilizes silicon gate CMOS technology to achieve
operating speeds similar to LSTTL gates with the low power
consumption of standard CMOS integrated circuits. All
devices have the ability to drive 10 LSTTL loads. The 74HCT
CC
(PDIP, SOIC)
TOP VIEW
CD74HCT132
High Speed CMOS Logic
= 0.8V (Max), VIH = 2V (Min)
l
≤ 1µA at VOL, V
OH
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
14
V
CC
4B
13
12
4A
4Y
11
3B
10
3A
9
3Y
8
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
1
File Number 1649.1
Functional Diagram
CD74HC132, CD74HCT132
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
14
V
CC
13
4B
12
4A
11
4Y
10
3B
9
3A
8
3Y
TRUTH TABLE
INPUTS OUTPUT
nA nB nY
LLH
LHH
HLH
Logic Symbol
HHL
NOTE: H = High Voltage Level, L = Low Voltage Level
nA
nY
nB
2
CD74HC132, CD74HCT132
Absolute Maximum Ratings Thermal Information
DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I
For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, I
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, I
IK
OK
CC orIGND
O
. . . . . . . . . . . . . . . . . .±50mA
Operating Conditions
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, V
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ms (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ms (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ms (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θJA is measured with the component mounted on an evaluation PC board in free air.
CC
Thermal Resistance (Typical, Note 3) θJA (oC/W)
PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
CC
DC Electrical Specifications
PARAMETER SYMBOL
HC TYPES
Input Switch Points
(Note 6)
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
VT+ - - 2 0.7 - 1.5 0.7 1.5 0.7 1.5 V
VT- - - 2 0.3 - 1 0.3 1 0.3 1 V
V
H
V
OH
TEST
CONDITIONS
VT+ or
VT-
25oC -40oC TO 85oC -55oC TO 125oC
VCC (V)
4.5 1.7 - 3.15 1.7 3.15 1.7 3.15 V
6 2.1 - 4.2 2.1 4.2 2.1 4.2 V
4.5 0.9 - 2.2 0.9 2.2 0.9 2.2 V
6 1.2 - 3 1.2 3 1.2 3 V
2 0.2 - 1 0.2 1 0.2 1 V
4.5 0.4 - 1.4 0.4 1.4 0.4 1.4 V
6 0.6 - 1.6 0.6 1.6 0.6 1.6 V
-0.02 2 1.9 - - 1.9 - 1.9 - V
-0.02 4.5 4.4 - - 4.4 - 4.4 - V
-0.02 6 5.9 - - 5.9 - 5.9 - V
-4 4.5 3.98 - - 3.84 - 3.7 - V
-5.2 6 5.48 - - 5.34 - 5.2 - V
UNITSVI(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX
3