Texas Instruments CD74HCT74M96, CD74HCT74M, CD74HCT74E, CD74HC74M96, CD74HC74M Datasheet

Data sheet acquired from Harris Semiconductor

/

SCHS124

January 1998

CD54HC74, CD74HC74,

CD74HCT74

Dual D Flip-Flop with Set and Reset

Positive-Edge Trigger

[ /Title
(CD54H
C74,
CD74H
C74,
CD74H
CT74)

Subject
(Dual D
Flip­Flop
with Set

Features

• Hysteresis on Clock Inputs for Improved Noise Immu­nity and Increased Input Rise and Fall Times

• Asynchronous Set and Reset

• Complementary Outputs

• Buffered Inputs

• Typical f
T

= 25oC

A

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL
Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: N

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V

= 0.8V (Max), VIH = 2V (Min)

IL

- CMOS Input Compatibility, I

= 50MHz at VCC = 5V, CL = 15pF,

MAX

= 30%, NIH = 30% of V

IL

≤ 1µA at VOL, V

l

o

C to 125oC

OH

CC

Description

The Harris CD54HC74, CD74HC74 and CD74HCT74 utilize
silicon gate CMOS technology to achieve operating speeds
equivalent to LSTTL parts. They exhibit the low power
consumption of standard CMOS integrated circuits, together
with the ability to drive 10 LSTTL loads.

This flip-flop has independent DATA,
CLOCK inputs and Q and

Q outputs. The logic level present

SET, RESET and

at the data input is transferred to the output during the
positive-going transition of the clock pulse.

SET and RESET
are independent of the clock and are accomplished by a low
level at the appropriate input.

The 74HCT logic family is functionally as well as pin
compatible with the standard 74LS logic family.

Ordering Information

TEMP. RANGE

PART NUMBER

CD54HC74F -55 to 125 14 Ld CERDIP F14.3
CD74HC74E -55 to 125 14 Ld PDIP E14.3
CD74HCT74E -55 to 125 14 Ld PDIP E14.3
CD74HC74M -55 to 125 14 Ld SOIC M14.15
CD74HCT74M -55 to 125 14 Ld SOIC M14.15

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.

2. Die is available which meets all electrical specifications. Please
contact your local sales office or Harris customer service for
ordering information.

(oC) PACKAGE

PKG.

NO.

Pinout

CD54HC74, CD74HC74, CD74HCT74

(PDIP, SOIC, CERDIP)

TOP VIEW

1R

1
2

1D

1CP

3

1

S

4

1Q

5

1

Q

6
7

GND

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright

© Harris Corporation 1998

14

V

CC

2R

13

2D

12

2CP

11

2

S

10

9

2Q

Q

8

2

1

File Number 1476.1

CD54HC74, CD74HC74, CD74HCT74

Functional Diagram

RESET

CLOCK

RESET

CLOCK

INPUTS OUTPUTS

SET RESET CP D Q Q

LHXXHL

H

L
H
H

L
L
H
H

HHLXQ0Q0

NOTE:
H = High Level (Steady State)
L = Low Level (Steady State)
X = Don’t Care

↑ = Low-to-High Transition

Q0 = the level of Q before the indicated input conditions were established.

3. This configuration is nonstable, that is, it will not persist when set and reset inputs return to their inactive (high) level.

1

R

D

F/F 1

CP

S

R

D

F/F 2

CP

S

5

Q

6

Q

9

Q

8

Q

GND = PIN 7
V

= PIN 14

CC

DAT A

SET

DAT A

SET

2

3

4

13

12

11

10

TRUTH TABLE

XXLH
X X H (Note 3) H (Note 3)

↑ HHL
↑LLH

2

CD54HC74, CD74HC74, CD74HCT74

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V

DC Input Diode Current, I

IK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Drain Current, per Output, I

O

For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±25mA

DC Output Diode Current, I

OK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Source or Sink Current per Output Pin, I

O

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA

DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA

Operating Conditions

Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, V

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V

HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V

Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)

4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

4. θJA is measured with the component mounted on an evaluation PC board in free air.

CC

Thermal Resistance (Typical, Note 4) θJA (oC/W) θJC (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . 90 -

SOIC Package. . . . . . . . . . . . . . . . . . . 120 -

CERDIP Package . . . . . . . . . . . . . . . . 130 55

Maximum Junction Temperature (Hermetic Package or Die) . . . 175oC

Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

CC

DC Electrical Specifications

PARAMETER SYMBOL

HC TYPES

High Level Input
Voltage

Low Level Input
Voltage

High Level Output
Voltage
CMOS Loads

High Level Output
Voltage
TTL Loads

Low Level Output
Voltage
CMOS Loads

Low Level Output
Voltage
TTL Loads

Input Leakage
Current

V

IH

V

IL

V

OH

V

OL

I

I

TEST

CONDITIONS

(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX

I

VCC (V)

o

25

C -40oC TO 85oC -55oC TO 125oC

- - 2 1.5 - - 1.5 - 1.5 - V

4.5 3.15 - - 3.15 - 3.15 - V
6 4.2 - - 4.2 - 4.2 - V

- - 2 - - 0.5 - 0.5 - 0.5 V

4.5 - - 1.35 - 1.35 - 1.35 V
6 - - 1.8 - 1.8 - 1.8 V

VIH or

V

-0.02 2 1.9 - - 1.9 - 1.9 - V

IL

4.5 4.4 - - 4.4 - 4.4 - V
6 5.9 - - 5.9 - 5.9 - V

---------V

-4 4.5 3.98 - - 3.84 - 3.7 - V

-5.2 6 5.48 - - 5.34 - 5.2 - V

VIH or

V

0.02 2 - - 0.1 - 0.1 - 0.1 V

IL

4.5 - - 0.1 - 0.1 - 0.1 V
6 - - 0.1 - 0.1 - 0.1 V

---------V

4 4.5 - - 0.26 - 0.33 - 0.4 V

5.2 6 - - 0.26 - 0.33 - 0.4 V

VCC or

-6--±0.1 - ±1-±1µA

GND

UNITSV

3