Data sheet acquired from Harris Semiconductor
SCHS219
August 1997
CD74HC7266
High Speed CMOS Logic
Quad 2-Input EXCLUSIVE NOR Gate
[ /Title
(CD74H
C7266)
Subject
(High
Speed
CMOS
Logic
Quad 2Input
EXCLUSIVE
Features
• Four Independent EXCLUSIVE NOR Gates
• Buffered Inputs and Outputs
• Logical Comparators
• Parity Generators and Checkers
• Adders/Subtracters
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
o
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High NoiseImmunity: N
V
= 5V
CC
= 30%, NIH= 30%of VCCat
IL
C to 125oC
Description
The Harris CD74HC7266 contains four independent
Exclusive NOR gates in one package. They provide the
system designer with a means for implementation of the
EXCLUSIVE NOR function.
This device is functionally the same as the TTL226. They
differ in that the HC7266 has active high and low outputs
whereas the 226 has open collector outputs.
Ordering Information
PKG.
PART NUMBER TEMP. RANGE (oC) PACKAGE
CD74HC7266E -55 to 125 14 Ld PDIP E14.3
CD74HC7266M -55 to 125 14 Ld SOIC M14.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Die for this part number is available which meets all electrical
specifications. Please contact your local sales office or Harris
customer service for ordering information.
NO.
Pinout
1A
1B
1Y
2Y
2A
2B
GND
CD74HC7266
(PDIP, SOIC)
TOP VIEW
1
2
3
4
5
6
7
14
V
CC
4B
13
12
4A
11
4Y
10
3Y
9
3B
8
3A
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
1
File Number 1780.1
Functional Diagram
CD74HC7266
1
1A
2
1B
5
2A
6
2B
8
3A
9
3B
12
4A
13
4B
TRUTH TABLE
INPUTS OUTPUT
nA nB nY
LLH
3
4
10
11
GND = 7
V
CC
1Y
2Y
3Y
4Y
= 14
Logic Symbol
LHL
HLL
HHH
NOTE: H = High Voltage Level, L = Low Voltage Level
nA
nY
nB
2