Texas Instruments CD74HC4050PWR, CD74HC4050M96, CD74HC4050M, CD74HC4050E, CD74HC4049PWR Datasheet

CD74HC4049,

/
j

[ /Title
(CD74H
C4049,
CD74H
C4050)

Sub-

ect
(High
Speed
CMOS
Logic
Hex

Data sheet acquired from Harris Semiconductor
SCHS205A

February 1998 - Revised June 1999

Features

• Typical Propagation Delay: 6ns at VCC = 5V,
C

= 15pF, TA = 25oC

L

• High-to-Low Voltage Level Converter for up to V

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . .–55

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL
Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: N

V

= 5V

CC

= 30%, NIH= 30%of VCCat

IL

o

= 16V

l

C to 125oC

CD74HC4050

High-Speed CMOS Logic

Hex Buffers, Inverting and Non-Inverting

Description

The CD74HC4049 and CD74HC4050 are fabricated with
high-speed silicon gate technology. They have a modified
input protection structure that enables these parts to be
used as logic level translators which convert high-level logic
to a low-level logic while operating off the low-level logic
supply. For example, 15-V input pulse levels can be down­converted to 0-V to 5-V logic levels. The modified input
protection structure protects the input from negative
electrostatic discharge. These parts also can be used as
simple buffers or inverters without level translation. The
CD74HC4049 and CD74HC4050 are enhanced versions of
equivalent CMOS types.

Ordering Information

TEMP. RANGE

PART NUMBER

CD74HC4049E –55 to 125 16 Ld PDIP E16.3

(oC) PACKAGE

PKG.

NO.

Pinout

CD74HC4050E –55 to 125 16 Ld PDIP E16.3
CD74HC4049M –55 to 125 16 Ld SOIC M16.15
CD74HC4050M –55 to 125 16 Ld SOIC M16.15
CD74HC4050PW –55 to 125 16 Ld TSSOP

NOTES:

1. When ordering, use the entire partnumber. Add the suffix 96 to
the M suffix or the R suffix to the PW package to obtain the
variant in the tape and reel.

2. Wafer and die is available which meets all electrical
specifications. Please contact your local sales office or
customer service for ordering information.

CD74HC4049, CD74HC4050

(PDIP, SOIC, TSSOP)

TOP VIEW

4049 4050 4050 4049

NC
6Y
6A
NC
5Y
5A
4Y
4A

NC
6Y
6A
NC
5Y
5A
4Y
4A

V

CC

1Y
1A
2Y
2A
3Y
3A

GND

V

CC

1Y
1A
2Y
2A
3Y
3A

GND

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright

© 1999 Texas Instruments Incorporated

1

Functional Diagram

CD74HC4049, CD74HC4050

Logic Diagrams

4050 4049 4049 4050

1Y

2Y

3Y

V

CC

1Y

1A

2Y

2A

3Y

3A

GND

1

2

3

4

5

6

7

8

16

NC

15

6Y

14

6A

13

NC

12

5Y

11

5A

10

4Y

9

4A

6Y

NC

5Y

HC4049 HC4050

A Y

AY

2