TEXAS INSTRUMENTS CD54HC4049 Technical data
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Data sheet acquired from Harris Semiconductor
SCHS205I
February 1998 - Revised February 2005
CD54HC4049, CD74HC4049,
CD54HC4050, CD74HC4050
High-Speed CMOS Logic
Hex Buffers, Inverting and Non-Inverting
[ /Title
(CD74H
C4049,
CD74H
C4050)
Sub-
ect
(High
Speed
CMOS
Logic
Hex
Features
• Typical Propagation Delay: 6ns at VCC = 5V,
C
= 15pF, TA = 25oC
L
• High-to-Low Voltage Level Converter for up to V
l
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . .–55
o
C to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
V
= 5V
CC
= 30%, NIH= 30%of VCCat
IL
Pinout
CD54HC4049, CD54HC4050
(CERDIP)
CD74HC4049, CD74HC4050
(PDIP, SOIC, SOP, TSSOP)
TOP VIEW
4049 4050 4050 4049
V
CC
1Y
1A
2Y
2A
3Y
3A
GND
V
CC
1Y
1A
2Y
2A
3Y
3A
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
6Y
6A
NC
5Y
5A
4Y
4A
NC
6Y
6A
NC
5Y
5A
4Y
4A
= 16V
Description
The ’HC4049 and ’HC4050 are fabricated with high-speed
silicon gate technology. They have a modified input
protection structure that enables these parts to be usedas
logic level translators which convert high-level logic to a lowlevel logic while operating off the low-level logic supply. For
example, 15-V input pulse levels can be down-converted to
0-V to 5-V logic levels. The modified input protection
structure protects the input from negative electrostatic
discharge. These parts also can be used as simple buffers
or inverters without level translation. The ’HC4049 and
’HC4050 are enhanced versions of equivalent CMOS types.
Ordering Information
TEMP. RANGE
PART NUMBER
CD54HC4049F3A –55 to 125 16 Ld CERDIP
CD54HC4050F3A –55 to 125 16 Ld CERDIP
CD74HC4049E –55 to 125 16 Ld PDIP
CD74HC4049M –55 to 125 16 Ld SOIC
CD74HCT4050MT –55 to 125 16 Ld SOIC
CD74HC4049M96 –55 to 125 16 Ld SOIC
CD74HC4049NSR –55 to 125 16 Ld SOP
CD74HC4049PW –55 to 125 16 Ld TSSOP
CD74HC4049PWR –55 to 125 16 Ld TSSOP
CD74HC4049PWT –55 to 125 16 Ld TSSOP
CD74HC4050E –55 to 125 16 Ld PDIP
CD74HC4050M –55 to 125 16 Ld SOIC
CD74HC4050MT –55 to 125 16 Ld SOIC
CD74HC4050M96 –55 to 125 16 Ld SOIC
(oC) PACKAGE
CD74HC4050NSR –55 to 125 16 Ld SOP
CD74HC4050PW –55 to 125 16 Ld TSSOP
CD74HC4050PWR –55 to 125 16 Ld TSSOP
CD74HC4050PWT –55 to 125 16 Ld TSSOP
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2005,Texas Instruments Incorporated
1
CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050
Functional Diagram
Logic Diagrams
4050 4049 4049 4050
1Y
2Y
3Y
V
CC
1Y
1A
2Y
2A
3Y
3A
GND
1
2
3
4
5
6
7
8
16
NC
15
6Y
14
6A
13
NC
12
5Y
11
5A
10
4Y
9
4A
6Y
NC
5Y
HC4049 HC4050
A Y
AY
2
CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050
Absolute Maximum Ratings Thermal Information
DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . –0.5V to 7V
Input Voltage Range. . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5V to 16V
DC Input Diode Current, I
IK
For VI < –0.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–20mA
DC Output Diode Current, I
OK
For VO < –0.5V or VO > VCC + 0.5V. . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, I
O
For VO > –0.5V or VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, I
CC orIGND
. . . . . . . . . . . . . . . . . .±50mA
Operating Conditions
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . .–55oC to 125oC
Supply Voltage Range, V
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input Voltage, VI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to 15V
DC Output Voltage, VO. . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to V
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
CC
Package Thermal Impedance, θJA(see Note 1):
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67oC/W
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73oC/W
NS (SOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64oC/W
PW (TSSOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . 108oC/W
Maximum Junction Temperature (Hermetic P ac kage or Die) . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . –65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . .300oC
CC
(SOIC - Lead Tips Only)
VOLTAGE
RELATIONSHIPS
MAXIMUM LIMITS
V
l
+16V
V
CC
+7V
DC Electrical Specifications
PARAMETER SYMBOL
HC TYPES
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
V
IH
V
IL
V
OH
V
OL
I
I
TEST
CONDITIONS
V
CC
25oC –40oC TO 85oC
(V)
–55oC TO
125oC
UNITSVI(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX
- - 2 1.5 - - 1.5 - 1.5 - V
4.5 3.15 - - 3.15 - 3.15 - V
6 4.2 - - 4.2 - 4.2 - V
- - 2 - - 0.5 - 0.5 - 0.5 V
4.5 - - 1.35 - 1.35 - 1.35 V
6 - - 1.8 - 1.8 - 1.8 V
VIHor VIL–0.02 2 1.9 - - 1.9 - 1.9 - V
–0.02 4.5 4.4 - - 4.4 - 4.4 - V
–0.02 6 5.9 - - 5.9 - 5.9 - V
–4 4.5 3.98 - - 3.84 - 3.7 - V
–5.2 6 5.48 - - 5.34 - 5.2 - V
VIHor VIL0.02 2 - - 0.1 - 0.1 - 0.1 V
0.02 4.5 - - 0.1 - 0.1 - 0.1 V
0.02 6 - - 0.1 - 0.1 - 0.1 V
4 4.5 - - 0.26 - 0.33 - 0.4 V
5.2 6 - - 0.26 - 0.33 - 0.4 V
VCC or
-6--±0.1 - ±1-±1 µA
GND
15 - 6 - - ±0.5 - ±5-±5
3
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