Texas Instruments CD74HCT365M96, CD74HCT365M, CD74HCT365E, CD74HC366M, CD74HC366E Datasheet

Data sheet acquired from Harris Semiconductor

/
j

SCHS180

November 1997

CD74HC365, CD74HCT365,

CD74HC366, CD74HCT366

High Speed CMOS Logic Hex Buffer/Line Driver,

Three-State Non-Inverting and Inverting

[ /Title
(CD74
HC365
,
CD74
HCT36
5,
CD74
HC366
,
CD74
HCT36

6)
Sub­ect

(High
Speed

Features

• Buffered Inputs

• High Current Bus Driver Outputs

• TypicalPropagation Delay t
C

= 15pF, TA = 25oC

L

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL
Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: N

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V

= 0.8V (Max), VIH = 2V (Min)

IL

- CMOS Input Compatibility, I

PLH,tPHL

= 30%, NIH = 30% of V

IL

= 8ns at VCC=5V,

≤ 1µA at VOL, V

l

o

C to 125oC

OH

Description

The Harris CD74HC365, CD74HCT365, CD74HC366, and
CD74HCT366 silicon gate CMOS three-state buffers are
general purpose high-speed non-inverting and inverting
buffers. They have high drive current outputs which enable
high speed operation even when driving large bus
capacitances. These circuits possess the low power
dissipation of CMOS circuitry, yet have speeds comparable to
low power Schottky TTL circuits. Both circuits are capable of
driving up to 15 low power Schottky inputs.

The CD74HC365 and CD74HCT365 are non-inverting buffers,
whereas the CD74HC366 and CD74HCT366 are inverting
buffers.These devices have two three-state control inputs (
and

OE2) which are NORed together to control all six gates.

The CD74HCT365 and CD74HCT366 logic families are speed,
function and pin compatible with the standard 74LS logic family .

Ordering Information

CC

PART NUMBER

CD74HC365E -55 to 125 16 Ld PDIP E16.3
CD74HCT365E -55 to 125 16 Ld PDIP E16.3
CD74HC366E -55 to 125 16 Ld PDIP E16.3
CD74HC365M -55 to 125 16 Ld SOIC M16.15
CD74HCT365M -55 to 125 16 Ld SOIC M16.15

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.

2. Wafer or die for this part number is available which meets all
electrical specifications. Please contact your local sales office or
Harris customer service for ordering information.

TEMP. RANGE

(oC) PACKAGE

OE1

PKG.

NO.

Pinout

CD74HC365, CD74HCT365, CD74HC366, CD74HCT366

(PDIP, SOIC)

TOP VIEW

V

1

OE1

2

1A

(1

(2

(3Y) 3Y

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright

© Harris Corporation 1997

Y) 1Y

2A

Y) 2Y

3A

GND

3
4
5
6
7
8

1

16
15
14
13
12
11
10

9

CC

OE2
6A
6Y (6Y)
5A
5Y (5
4A
4Y (4

Y)

Y)

File Number 1539.1

CD74HC365, CD74HCT365, CD74HC366, CD74HCT366

Functional Diagrams

CD74HC365, CD75HCT365 CD74HC366, CD75HCT366

OE1

1A

1Y

2A

2Y

3A

3Y

GND

1

2

3

4

5

6

7

8

16

V

CC

15

OE2

14

6A

13

6Y

12

5A

11

5Y

10

4A

9

4Y

TRUTH TABLE

OUTPUTS

INPUTS

(Y)

OE1 OE2 A HC/HCT365 HC/HCT366

LLL L H
LLH H L
XHX Z Z
HXX Z Ζ

NOTE:
H = High Voltage Level
L = Low Voltage Level
X = Don’t Care
Z = High Impedance (OFF) State

OE1

1A

1

2A

2

3A

3

GND

1

2

3

Y

4

5

Y

6

7

Y

8

16

V

CC

15

OE2

14

6A

13

Y

6

12

5A

11

5Y

10

4A

9

4

Y

2

Logic Diagram

CD74HC365, CD74HCT365, CD74HC366, CD74HCT366

V

CC

16

ONE OF SIX IDENTICAL CIRCUITS

2

1A

3

1Y

8

OE1

OE2

(NOTE)

GND

1

4

15

2A

3A

4A

5A

6A

6

10

12

14

5

2Y

7

3Y

9

4Y

11

5Y

13

6Y

NOTE: Inverter not included in HC/HCT365.

FIGURE 1. LOGIC DIAGRAM FOR THE HC/HCT365 AND HC/HCT366 (OUTPUTS FOR HC/HCT365 ARE COMPLEMENTS OF

THOSE SHOWN, i.e., 1Y, 2Y, ETC.)

3