Texas Instruments CD74HCT245M96, CD74HCT245M, CD74HCT245E, CD74HC245M96, CD74HC245M Datasheet

Data sheet acquired from Harris Semiconductor

/
j

SCHS119

November 1997

Features

• Buffered Inputs

CD54HC245, CD54HCT245,

CD74HC245, CD74HCT245

High Speed CMOS Logic Octal-Bus Transceiver,

Three-State, Non-Inverting

[ /Title
(CD54
HC245
,
CD54
HCT24
5,
CD74
HC245
,
CD74
HCT24

5)
Sub­ect

(High
Speed

• Three-State Outputs

• Bus Line Driving Capability

• Typical Propagation Delay (A to B, B to A) 9ns at V
= 5V, CL = 15pF, TA = 25oC

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL
Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: N

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V

= 0.8V (Max), VIH = 2V (Min)

IL

- CMOS Input Compatibility, I

= 30%, NIH = 30% of V

IL

≤ 1µA at VOL, V

l

o

C to 125oC

OH

CC

CC

Pinout

CD54HC245, CD54HCT245, CD74HC245, CD74HCT245

(CERDIP, PDIP, SOIC)

TOP VIEW

1

DIR

A0

2

A1

3

A2

4

A3

5

A4

6

A5

7
8

A6

9

A7

GND

10

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright

© Harris Corporation 1997

V

20

CC

OE

19

B0

18

B1

17

B2

16

B3

15

B4

14

B5

13
12

B6
B7

11

1

File Number 1651.1

CD54HC245, CD54HCT245, CD74HC245, CD74HCT245CD54HC245, CD54HCT245, CD74HC245, CD74HCT245

Description

The Harris CD54HC245, CD54HCT245, and CD74HC245,
CD74HCT245 are high-speed octal three-state bidirectional
transceivers intended for two-way asynchronous
communication between data buses. They have high drive
current outputs which enable high-speed operation while
driving large bus capacitances. They provide the low power
consumption of standard CMOS circuits with speeds and
drive capabilities comparable to that of LSTTL circuits.

The CD54HC245, CD54HCT245, CD74HC245 and
CD74HCT245 allow data transmission of the B bus or from
the B bus to the A bus. The logic level at the direction input
(DIR) determines the direction. The output enable input
(

OE), when high, puts the I/O ports in the high-impedance

state.
The HC/HCT245 is similar in operation to the HC/HCT640

Functional Diagram

A0

A1

A2

A3

A4

A5

A6

A7

2

3

4

5

6

7

8

9

and the HC/HCT643.

Ordering Information

TEMP.

PART NUMBER

RANGE (oC) PACKAGE

CD54HC245F -55 to 125 20 Ld CERDIP F20.3
CD54HCT245F -55 to 125 20 Ld CERDIP F20.3
CD74HC245E -55 to 125 20 Ld PDIP E20.3
CD74HCT245E -55 to 125 20 Ld PDIP E20.3
CD74HC245M -55 to 125 20 Ld SOIC M20.3
CD74HCT245M -55 to 125 20 Ld SOIC M20.3

NOTES:

1. When ordering,use theentire part number. Addthe suffix96 to
obtain the variant in the tape and reel.

2. Waferor die forthis part numberisavailable which meetsall elec­trical specifications. Please contact your local sales office or
Harris customer service for ordering information.

18

B0

17

B1

16

B2

15

B3

14

B4

13

B5

12

B6

11

B7

PKG.

NO.

DIR

OE

TRUTH TABLE

CONTROL INPUTS

OPERATIONOE DIR

L L B Data to A Bus
L H A Data to B Bus

H X Isolation

H = High Level, L = Low Level, X = Irrelevant
To prevent excess currents in the High-Z (Isolation) modes all I/O
terminals should be terminated with 10kΩ to 1MΩ resistors.

1

19

2

CD54HC245, CD54HCT245, CD74HC245, CD74HCT245CD54HC245, CD54HCT245, CD74HC245, CD74HCT245

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V

DC Input Diode Current, I

IK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, I

OK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA

DC Drain Current, per Output, I

O

For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±35mA

DC Output Source or Sink Current per Output Pin, I

O

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA

DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, V

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V

HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V

Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)

4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

CC

Thermal Resistance (Typical, Note 3). . . .θJA (oC/W) θJA (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . 125 N/A

SOIC Package. . . . . . . . . . . . . . . . . . . 120 N/A

CERDIP Package . . . . . . . . . . . . . . . . 100 40

Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . .150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

CC

DC Electrical Specifications

PARAMETER SYMBOL

HC TYPES

High Level Input
Voltage

Low Level Input
Voltage

High Level Output
Voltage
CMOS Loads

High Level Output
Voltage
TTL Loads

Low Level Output
Voltage
CMOS Loads

Low Level Output
Voltage
TTL Loads

Input Leakage
Current

V

IH

V

IL

V

OH

V

OL

I

I

TEST

CONDITIONS

(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX

I

V

CC

(V)

o

C -40oC TO 85oC -55oCTO125oC

25

UNITSV

- - 2 1.5 - - 1.5 - 1.5 - V

4.5 3.15 - - 3.15 - 3.15 - V
6 4.2 - - 4.2 - 4.2 - V

- - 2 - - 0.5 - 0.5 - 0.5 V

4.5 - - 1.35 - 1.35 - 1.35 V
6 - - 1.8 - 1.8 - 1.8 V

VIHor VIL-0.02 2 1.9 - - 1.9 - 1.9 - V

-0.02 4.5 4.4 - - 4.4 - 4.4 - V

-0.02 6 5.9 - - 5.9 - 5.9 - V

- - ---- - - - V

-4 4.5 3.98 - - 3.84 - 3.7 - V

-5.2 6 5.48 - - 5.34 - 5.2 - V

VIHor VIL0.02 2 - - 0.1 - 0.1 - 0.1 V

0.02 4.5 - - 0.1 - 0.1 - 0.1 V

0.02 6 - - 0.1 - 0.1 - 0.1 V

- - ---- - - - V
4 4.5 - - 0.26 - 0.33 - 0.4 V

5.2 6 - - 0.26 - 0.33 - 0.4 V

VCC or

-6--±0.1 - ±1-±1µA

GND

3