Texas Instruments CD74HCT08M96, CD74HCT08M, CD74HCT08E, CD74HC08M96, CD74HC08M Datasheet
...
CD54HC08, CD54HCT08,
/
j
[ /Title
(CD54H
C08,
CD54H
CT08,
CD74H
C08,
CD74H
CT08)
Subect
(High
Data sheet acquired from Harris Semiconductor
SCHS118
August 1997
Features
• Buffered Inputs
• Typical Propagation Delay: 7ns at V
C
= 15pF, TA = 25oC
L
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
= 30%, NIH = 30% of V
IL
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
= 0.8V (Max), VIH = 2V (Min)
IL
• CMOS Input Compatibility, I
≤ 1µA at VOL, V
l
CC
= 5V,
o
C to 125oC
CC
OH
CD74HC08, CD74HCT08
High Speed CMOS Logic
Description
The Harris CD54HC08, CD54HCT08, CD74HC08 and
CD74HCT08 logic gates utilize silicon gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The 74HCT logic family is functionally pin
compatible with the standard 74LS logic family.
Ordering Information
TEMP.RANGE
PART NUMBER
CD74HC08E -55 to 125 14 Ld PDIP E14.3
CD74HCT08E -55 to 125 14 Ld PDIP E14.3
CD74HC08M -55 to 125 14 Ld SOIC M14.15
CD74HCT08M -55 to 125 14 Ld SOIC M14.15
CD54HC08F -55 to 125 14 Ld CERDIP F14.3
CD54HCT08F -55 to 125 14 Ld CERDIP F14.3
CD54HC08W -55 to 125 Wafer
CD54HCT08W -55 to 125 Wafer
(oC) PACKAGE
PKG.
NO.
Pinout
CD54HC08H -55 to 125 Die
CD54HCT80H -55 to 125 Die
NOTE:
1. When ordering, use the entire part number.Add the suffix 96 to
obtain the variant in the tape and reel.
CD54HC08, CD54HCT08, CD74HC08, CD74HCT08
(PDIP, CERDIP, SOIC)
TOP VIEW
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
V
14
CC
4B
13
4A
12
4Y
11
3B
10
3A
9
3Y
8
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
1
File Number 1549.1
Functional Diagram
CD54HC08, CD54HCT08, CD74HC08, CD74HCT08
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
14
V
CC
13
4B
12
4A
11
4Y
10
3B
9
3A
8
3Y
TRUTH TABLE
INPUTS OUTPUT
nA nB nY
LLL
LHL
HLL
HHH
NOTE: H = High Voltage Level, L = Low Voltage Level
HC Logic Symbol HCT Logic Symbol
nA
nA
nB
nY
nB
nY
2
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