TEXAS INSTRUMENTS CD54ACT138 Technical data

55°C to 125°C

SOIC

ACT138M

查询CD54ACT138F3A供应商

CD54ACT138, CD74ACT138

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCHS329A – JANUARY 2003 – REVISED FEBRUARY 2003

Inputs Are TTL-Voltage Compatible

Speed of Bipolar F, AS, and S, With

CD54ACT138 ...F PACKAGE

CD74ACT138 ...E OR M PACKAGE

(TOP VIEW)

Significantly Reduced Power Consumption

Designed Specifically for High-Speed Memory Decoders and Data-Transmission Systems

Incorporate Three Enable Inputs to Simplify Cascading and/or Data Reception

Balanced Propagation Delays

±24-mA Output Drive Current – Fanout to 15 F Devices

SCR-Latchup-Resistant CMOS Process and

GND

4 5 6 7 8

16 15 14 13 12 11 10

Y0 Y1 Y2 Y3 Y4 Y5

Circuit Design

Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

description/ordering information

The ’ACT138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory . This means that the effective system delay introduced by the decoders is neg ligible.

The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications (see Application Information).

ORDERING INFORMATION

PDIP – E Tube CD74ACT138E CD74ACT138E

–

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

CDIP – F Tube CD54ACT138F3A CD54ACT138F3A

PACKAGE

–

†

Tube CD74ACT138M Tape and reel CD74ACT138M96

ORDERABLE

PART NUMBER

TOP-SIDE MARKING

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

CD54ACT138, CD74ACT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCHS329A – JANUARY 2003 – REVISED FEBRUARY 2003

FUNCTION TABLE

ENABLE INPUTS SELECT INPUTS OUTPUTS

G1 G2A G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

X H X X X X H H H H H H H H X XHXXXHHHHHHHH L XXXXXHHHHHHHH H LLLLLLHHHHHHH H LLLLHHLHHHHHH H LLLHLHHLHHHHH H LLLHHHHHLHHHH H LLHLLHHHHLHHH H LLHLHHHHHHLHH H LLHHLHHHHHHLH H L L H H H H H H H H H H L

logic diagram (positive logic)

Select Inputs

Enable

Inputs

Data

Outputs

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

CD54ACT138, CD74ACT138

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCHS329A – JANUARY 2003 – REVISED FEBRUARY 2003

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V Input clamp current, I Output clamp current, I Continuous output current, I Continuous current through V Package thermal impedance, θ

–0.5 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(VI < 0 V or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(VO < 0 V or VO > VCC) (see Note 1) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(VO > 0 V or VO < VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): E package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

M package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

recommended operating conditions (see Note 3)

CC CC

–55°C to

125°C

0 V 0 V

TA = 25°C MIN MAX MIN MAX MIN MAX

V V V V V I

∆t/∆v Input transition rise or fall rate 10 10 10 ns/V

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Supply voltage 4.5 5.5 4.5 5.5 4.5 5.5 V

High-level input voltage 2 2 2 V

Low-level input voltage 0.8 0.8 0.8 V

Input voltage 0 V

Output voltage 0 V

High-level output current –24 –24 –24 mA Low-level output current 24 24 24 mA

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

CC CC

–40°C to

85°C

0 V 0 V

CC CC

UNIT

V V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

CD54ACT138, CD74ACT138

or V

(INPUT)

(OUTPUT)

A, B, C

Any Y

G2A, G2B

Any Y

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCHS329A – JANUARY 2003 – REVISED FEBRUARY 2003

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS V

IOH = –50 µA 4.5 V 4.4 4.4 4.4

‡

†

‡

T est one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltage to minimize power dissipation. T est verifies a minimum 50-Ω transmission-line drive capability at 85°C and 75-Ω transmission-line drive capability at 125°C. Additional quiescent supply current per input pin, TTL inputs high, 1 unit load

VI = VCC or GND 5.5 V ±0.1 ±1 ±1 µA VI = VCC or GND, IO = 0 5.5 V 8 160 80 µA

VI = VCC – 2.1 V

IOH = –24 mA 4.5 V 3.94 3.7 3.8 IOH = –50 mA IOH = –75 mA IOL = 50 µA 4.5 V 0.1 0.1 0.1 IOL = 24 mA 4.5 V 0.36 0.5 0.44 IOL = 50 mA IOL = 75 mA

†

5.5 V 3.85

†

5.5 V 3.85

† †

5.5 V 1.65

4.5 V to

5.5 V

TA = 25°C MIN MAX MIN MAX MIN MAX

–55°C to

125°C

2.4 3 2.8 mA 10 10 10 pF

–40°C to

85°C

UNIT

ACT INPUT LOAD TABLE

INPUT

A, B, or C 0.83

G2A or G2B

G1 0.42

Unit Load is ∆ICC limit specified in electrical characteristics table (e.g., 2.4 mA at 25°C).

UNIT LOAD

switching characteristics over recommended operating free-air temperature range,

= 5 V ± 0.5 V, CL = 50 pF (unless otherwise noted) (see Figure 1)

PARAMETER

PLH

PHL

PLH

PHL

PLH

PHL

FROM

–55°C to

125°C

MIN MAX MIN MAX

3 12 3.1 10.9 3 12 3.1 10.9

2.8 11 2.8 10

2.6 10.5 2.7 9.5

–40°C to

operating characteristics, VCC = 5 V, TA = 25°C

PARAMETER TYP UNIT

Power dissipation capacitance 110 pF

85°C

UNIT

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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