TEXAS INSTRUMENTS CD54ACT02 Technical data
55°C to 125°C
SOIC
M
ACT02M
CD54ACT02, CD74ACT02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SCHS309B – JANUARY 2001 – REVISED MA Y 2002
D
Inputs Are TTL-Voltage Compatible
D
Speed of Bipolar F, AS, and S, With
CD54ACT02 ...F PACKAGE
CD74ACT02 ...E OR M PACKAGE
(TOP VIEW)
Significantly Reduced Power Consumption
D
Balanced Propagation Delays
D
±24-mA Output Drive Current
– Fanout to 15 F Devices
D
SCR-Latchup-Resistant CMOS Process and
Circuit Design
D
Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
1Y
1A
1B
2Y
2A
2B
GND
1
2
3
4
5
6
7
14
13
12
11
10
V
CC
4Y
4B
4A
3Y
9
3B
8
3A
description
The ’ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = ASB
or Y = A + B in positive logic.
ORDERING INFORMA TION
T
A
–
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
PACKAGE
PDIP – E Tube CD74ACT02E CD74ACT02E
–
CDIP – F Tube CD54ACT02F3A CD54ACT02F3A
†
Tube CD74ACT02M
Tape and reel CD74ACT02M96
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
logic diagram (positive logic)
2
1A
3
1B
5
2A
6
2B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FUNCTION TABLE
(each gate)
INPUTS
A B
H X L
X HL
L L H
1
1Y
4
2Y
OUTPUT
Y
3A
3B
4A
4B
8
9
11
12
10
13
3Y
4Y
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1
CD54ACT02, CD74ACT02
CC
V
V
V
or V
V
V
V
V
or V
V
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SCHS309B – JANUARY 2001 – REVISED MAY 2002
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through V
Package thermal impedance, θ
–0.5 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(V
< 0 or V
IK
I
(VO < 0 or VO > VCC) (see Note 1) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OK
O
> VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 2): E package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
†
M package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions (see Note 3)
CC
CC
–40°C TO
85°C
0 V
0 V
TA = 25°C
MIN MAX MIN MAX MIN MAX
V
V
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 10 10 10 ns/V
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Supply voltage 4.5 5.5 4.5 5.5 4.5 5.5 V
CC
High-level input voltage 2 2 2 V
IH
Low-level input voltage 0.8 0.8 0.8 V
IL
Input voltage 0 V
I
Output voltage 0 V
O
High-level output current –24 –24 –24 mA
Low-level output current 24 24 24 mA
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CC
CC
–55°C TO
125°C
0 V
0 V
CC
CC
UNIT
V
V
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS V
IOH = –50 µA 4.5 V 4.4 4.4 4.4
=
OH
OL
I
I
I
CC
∆I
CC
C
‡
i
T est one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltage to minimize
power dissipation. T est verifies a minimum 50-Ω transmission-line drive capability at 85°C and 75-Ω transmission-line drive capability at 125°C.
I
IH
IL
=
I
IH
IL
VI = VCC or GND 5.5 V ±0.1 ±1 ±1 µA
VI = VCC or GND, IO = 0 5.5 V 4 40 80 µA
VI = VCC – 2.1 V 4.5 V to 5.5 V 2.4 2.8 3 mA
IOH = –24 mA 4.5 V 3.94 3.8 3.7
IOH = –50 mA
IOH = –75 mA
IOL = 50 µA 4.5 V 0.1 0.1 0.1
IOL = 24 mA 4.5 V 0.36 0.44 0.5
IOL = 50 mA
IOL = 75 mA
‡
‡
‡
‡
5.5 V 3.85
5.5 V 3.85
5.5 V 1.65
5.5 V 1.65
TA = 25°C
MIN MAX MIN MAX MIN MAX
–40°C TO
85°C
10 10 10 pF
–55°C TO
125°C
UNIT
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
(INPUT)
(OUTPUT)
A or B
Y
ns
CD54ACT02, CD74ACT02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SCHS309B – JANUARY 2001 – REVISED MAY 2002
ACT INPUT LOAD TABLE
INPUT UNIT LOAD
A or B 0.32
Unit load is ∆ICC limit specified
in electrical characteristics
table (e.g., 2.4 mA at 25°C).
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V, CL = 50 pF (unless otherwise noted) (see Figure 1)
V
CC
PARAMETER
t
PLH
t
PHL
FROM
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TYP UNIT
C
Power dissipation capacitance 55 pF
pd
TO
–40°C TO
85°C
MIN MAX MIN MAX
3.1 11.1 3.1 12.2
3.1 11.1 3.1 12.2
–55°C TO
125°C
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
CD54ACT02, CD74ACT02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SCHS309B – JANUARY 2001 – REVISED MAY 2002
PARAMETER MEASUREMENT INFORMATION
r
CC
f
1.5 V
S1
t
t
PHL
t
PLH
rec
50%
From Output
Under Test
CL = 50 pF
(see Note A)
CLR
Input
CLK
VOLTAGE WAVEFORMS
RECOVERY TIME
Input
In-Phase
Output
Out-of-Phase
Output
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
1.5 V 1.5 V
t
PLH
50%
t
PHL
VOLTAGE WAVEFORMS
R1 = 500 Ω Open
R2 = 500 Ω
LOAD CIRCUIT
1.5 V
90% 90%
t
50% V
10% 10%
t
2 × V
GND
CC
3 V
0 V
3 V
0 V
50% V
10%10%
90%90%
TEST S1
t
w
1.5 V
Open
2 × V
GND
t
h
20% V
80% V
CC
CC
CC
1.5 V
10%10%
t
PLZ
20% V
t
PHZ
80% V
t
f
CC
CC
3 V
0 V
3 V
0 V
≈V
V
V
≈0 V
3 V
0 V
3 V
0 V
CC
OL
OH
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Input
Reference
Input
Data
1.5 V
Input
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
3 V
0 V
V
OH
CC
V
OL
t
f
V
OH
V
OL
t
r
Output
Control
Output
Waveform 1
S1 at 2 × V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
OUTPUT ENABLE AND DISABLE TIMES
CC
1.5 V 1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
t
su
90% 90%
t
r
VOLTAGE WAVEFORMS
1.5 V 1.5 V
t
PZL
t
PZH
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
Phase relationships between waveforms are arbitrary.
D. For clock inputs, f
E. The outputs are measured one at a time with one input transition per measurement.
F. t
G. t
H. t
PLH
PZL
PLZ
and t
and t
and t
PHL
PZH
PHZ
is measured with the input duty cycle at 50%.
max
are the same as tpd.
are the same as ten.
are the same as t
dis
.
Figure 1. Load Circuit and Voltage Waveforms
4
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