Texas Instruments CD74ACT139M96, CD74ACT139E, CD74AC139M96, CD74AC139E, CD54AC139F3A Datasheet

CD74AC139,

[ /Title
(CD74
AC139
,
CD74
ACT13

9)
/Sub­ject
(Dual
2-to-4­Line
Decod
er/Dem
ulti­plexer)
/Autho
r ()
/Key­words
(Har­ris
Semi­con­ductor,
Advan
ced
CMOS
)
/Cre­ator ()
/DOCI
NFO

Data sheet acquired from Harris Semiconductor
SCHS235

September 1998

Features

• Buffered Inputs

• Typical Propagation Delay

- 5.4ns at V

• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015

• SCR-Latchup-Resistant CMOS Process and Circuit
Design

• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption

• Balanced Propagation Delays

• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply

• ±24mA Output Drive Current

- Fanout to 15 FAST™ ICs

- Drives 50Ω Transmission Lines

= 5V, TA = 25oC, CL = 50pF

CC

Pinout

1A0
1A1
1Y0
1Y1
1Y2
1Y3

GND

Dual 2-to-4-Line Decoder/Demultiplexer

Description

The CD74AC139 and CD74ACT139 are dual 2-to-4-line
decoders/demultiplexers that utilize the Harris Advanced
CMOS Logic technology. These devices contain two inde­pendent binary to one-of-four decoders, each with a single
active LOW enable input (
inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four
normally HIGH outputs to go LOW.

If the enable inputisHIGH,allfour outputs remain HIGH. For
demultiplexer operation, the enable input is the data input.
The enable input also functions as a chip select when these
devices are cascaded.

Ordering Information

PART

NUMBER

CD74AC139E 0 to 70oC, -40 to 85,

CD74ACT139E 0 to 70oC, -40 to 85,

CD74AC139M96 0 to 70oC, -40 to 85,

CD74ACT139M 0 to 70oC, -40 to 85,

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.

2. Wafer and die for this part number is availablewhich meets all elec­trical specifications. Please contact your local sales office or Harris
customer service for ordering information.

CD74AC139, CD74ACT139

(PDIP, SOIC)

TOP VIEW

V

1E

1
2
3
4
5
6
7
8

16
15

2E

14

2A0

13

2A1

12

2Y0

11

2Y1

10

2Y2

9

2Y3

CD74ACT139

1E or 2E). Data on the select

TEMP.

RANGE (oC) PACKAGE

16 Ld PDIP E16.3

-55 to 125
16 Ld PDIP E16.3

-55 to 125
16 Ld SOIC M16.15

-55 to 125
16 Ld SOIC M16.15

-55 to 125

CC

PKG.

NO.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.

Copyright

© Harris Corporation 1998

1

File Number 1953.1

Functional Diagram

CD74AC139, CD74ACT139

1A0

1A1

1

2A0

2A1

2

2

DECODER

1

3
1

E

14

DECODER

2

13
15

E

4

1Y0

5

1

6

1

7

1Y3

12

2Y0

11

2

10

2Y2

9

2Y3

GND = 8
V

= 16

CC

Y1
Y2

Y1

TRUTH TABLE

INPUTS

OUTPUTSENABLE SELECT

EA1A0Y3 Y2 Y1 Y0

L LLHHHL
L LHHHLH
L HLHLHH
L HHLHHH
H XXHHHH

X = Don’t Care

2

CD74AC139, CD74ACT139

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V

DC Input Diode Current, I

IK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, I

OK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC Output Source or Sink Current per Output Pin, I

O

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC VCC or Ground Current, I

CC orIGND

(Note 3) . . . . . . . . .±100mA

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, VCC (Note 4)

AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V

ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V

Input Rise and Fall Slew Rate, dt/dv

AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)

AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)

ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

3. For up to 4 outputs per device, add ±25mA for each additional output.

4. Unless otherwise specified, all voltages are referenced to ground.

5. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 5) θJA (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

CC

DC Electrical Specifications

PARAMETER SYMBOL

AC TYPES

High Level Input Voltage V

Low Level Input Voltage V

High Level Output Voltage V

IH

IL

OH

TEST

CONDITIONS

(V) IO(mA) MIN MAX MIN MAX MIN MAX

I

V

CC

(V)

25

o

C

-40oC TO
85oC

-55oC TO
125oC

- - 1.5 1.2 - 1.2 - 1.2 - V
3 2.1 - 2.1 - 2.1 - V

5.5 3.85 - 3.85 - 3.85 - V

- - 1.5 - 0.3 - 0.3 - 0.3 V
3 - 0.9 - 0.9 - 0.9 V

5.5 - 1.65 - 1.65 - 1.65 V

VIH or V

-0.05 1.5 1.4 - 1.4 - 1.4 - V

IL

-0.05 3 2.9 - 2.9 - 2.9 - V

-0.05 4.5 4.4 - 4.4 - 4.4 - V

-4 3 2.58 - 2.48 - 2.4 - V

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

5.5 - - 3.85 - - - V

(Note 6, 7)

-50

5.5----3.85 - V

(Note 6, 7)

UNITSV

3