Texas Instruments CD4066B Service Manual

Control

V

C

(1)

V

DD

V

SS

V

SS

n

n

p

Out
V

os

Control

Switch

In

n

p

V

is

CMOS Protection Network

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SCHS051H –NOVEMBER 1998–REVISED FEBRUARY 2020

CD4066B CMOS Quad Bilateral Switch

CD4066B

1 Features

1

• 15-V Digital or ±7.5-V Peak-to-Peak Switching

• 125-Ω Typical On-State Resistance for
15-V Operation

• Switch On-State Resistance Matched to Within
5 Ω Over 15-V Signal-Input Range

• On-State Resistance Flat Over Full
Peak-to-Peak Signal Range

• High On or Off Output-Voltage Ratio:
80 dB Typical at fis= 10 kHz, RL= 1 kΩ

• High Degree of Linearity: <0.5% Distortion Typical
at fis= 1 kHz, Vis= 5-V

p-p

VDD– VSS≥ 10-V, RL= 10 kΩ

• Extremely Low Off-State Switch Leakage,
Resulting in Very Low Offset Current and High
Effective Off-State Resistance: 10 pA Typical at
VDD– VSS= 10-V, TA= 25°C

• Extremely High Control Input Impedance
(Control Circuit Isolated From Signal Circuit):
1012Ω Typical

• Low Crosstalk Between Switches: –50 dB Typical
at fis= 8 MHz, RL= 1 kΩ

• Matched Control-Input to Signal-Output
Capacitance: Reduces Output Signal Transients

• Frequency Response,
Switch On = 40 MHz Typical

• 100% Tested for Quiescent Current at 20-V

• 5-V, 10-V, and 15-V Parametric Ratings

2 Applications

• Analog Signal Switching and Multiplexing: Signal
Gating, Modulators, Squelch Controls,
Demodulators, Choppers, Commutating Switches

• Digital Signal Switching and Multiplexing

• Transmission-Gate Logic Implementation

• Analog-to-Digital and Digital-to-Analog
Conversions

• Digital Control of Frequency, Impedance, Phase,
and Analog-Signal Gain

• Building Automation

3 Description

The CD4066B device is a quad bilateral switch
intended for the transmission or multiplexing of
analog or digital signals. It is pin-for-pin compatible
with the CD4016B device, but exhibits a much lower
on-state resistance. In addition, the on-state
resistance is relatively constant over the full signal­input range.

The CD4066B device consists of four bilateral
switches, each with independent controls. Both the p
and the n devices in a given switch are biased on or
off simultaneously by the control signal. As shown in

Figure 17, the well of the n-channel device on each

switch is tied to either the input (when the switch is
on) or to VSS(when the switch is off). This
configuration eliminates the variation of the switch­transistor threshold voltage with input signal and,
thus, keeps the on-state resistance low over the full
operating-signal range.

The advantages over single-channel switches include
peak input-signal voltage swings equal to the full
supply voltage and more constant on-state
impedance over the input-signal range. However, for
sample-and-hold applications, the CD4016B device is
recommended.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)

PDIP (14) 19.30 mm × 6.35 mm
CDIP (14) 19.50 mm × 6.92 mm

CD4066B

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

SOIC (14) 8.65 mm × 3.91 mm
SOP (14) 10.30 mm × 5.30 mm
TSSOP (14) 5.00 mm × 4.40 mm

Bidirectional Signal Transmission Via Digital

Control Logic

(1)

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

CD4066B

SCHS051H –NOVEMBER 1998–REVISED FEBRUARY 2020

www.ti.com

Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics........................................... 5

6.6 Switching Characteristics.......................................... 8

6.7 Typical Characteristics.............................................. 9

7 Parameter Measurement Information ................ 10

8 Detailed Description............................................ 14

8.1 Overview ................................................................. 14

8.2 Functional Block Diagram....................................... 14

8.3 Feature Description................................................. 14

8.4 Device Functional Modes........................................ 14

9 Application and Implementation ........................ 15

9.1 Application Information............................................ 15

9.2 Typical Application ................................................. 15

10 Power Supply Recommendations..................... 17

11 Layout................................................................... 17

11.1 Layout Guidelines ................................................. 17

11.2 Layout Example .................................................... 17

12 Device and Documentation Support ................. 18

12.1 Receiving Notification of Documentation Updates 18

12.2 Community Resources.......................................... 18

12.3 Trademarks........................................................... 18

12.4 Electrostatic Discharge Caution............................ 18

12.5 Glossary................................................................ 18

13 Mechanical, Packaging, and Orderable

Information........................................................... 18

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision G (June 2017) to Revision H Page

• Added Junction Temperature details to the Absolute Maximum Ratings table...................................................................... 4

Changes from Revision F (March 2017) to Revision G Page

• Changed From: VSSTo: Hi-Z in the SIG OUT/IN column of ................................................................................................ 14

Changes from Revision E (September 2016) to Revision F Page

• Corrected the ronVDD= 10 V values in the Electrical Characteristics table. .......................................................................... 7

• Corrected the y axis scale in Figure 6 ................................................................................................................................... 9

Changes from Revision D (September 2003) to Revision E Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and

Mechanical, Packaging, and Orderable Information section ................................................................................................. 1

• Deleted Ordering Information table, see POA at the end of the data sheet........................................................................... 1

• Changed values in the Thermal Information table to align with JEDEC standards ............................................................... 4

2

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1

2

3

4

5

6

7

14

13

12

11

10

9

8

SIG A IN/OUT
SIG A OUT/IN
SIG B OUT/IN
SIG B IN/OUT

CONTROL B
CONTROL C

V

SS

V

DD

CONTROL A
CONTROL D
SIG D IN/OUT
SIG D OUT/IN
SIG C OUT/IN
SIG C IN/OUT

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5 Pin Configuration and Functions

N, J, D, NS, or PW Packages

14-Pin PDIP, CDIP, SOIC, SO, or TSSOP

PIN

NO. NAME

I/O DESCRIPTION

1 SIG A IN/OUT I/O Input/Output for Switch A
2 SIG A OUT/IN I/O Output/Input for Switch A
3 SIG B OUT/IN I/O Output/Input for Switch B
4 SIG B IN/OUT I/O Input/Output for Switch B
5 CONTROL B I Control pin for Switch B
6 CONTROL C I Control pin for Switch C
7 V

SS

— Low Voltage Power Pin
8 SIG C IN/OUT I/O Input/Output for Switch C
9 SIG C OUT/IN I/O Output/Input for Switch C
10 SIG D OUT/IN I/O Output/Input for Switch D
11 SIG D IN/OUT I/O Input/Output for Switch D
12 CONTROL D I Control Pin for D
13 CONTROL A I Control Pin for A
14 V

DD

— Power Pin

Top View

Pin Functions

CD4066B

SCHS051H –NOVEMBER 1998–REVISED FEBRUARY 2020

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CD4066B

SCHS051H –NOVEMBER 1998–REVISED FEBRUARY 2020

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6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)

V

DD

V

is

I

IN

T

JMAX1

T

JMAX2

T

stg

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

DC supply-voltage Voltages referenced to VSSpin –0.5 20 V
Input voltage All inputs –0.5 VDD+ 0.5 V
DC input current Any one input ±10 mA
Maximum junction temperature, ceramic package 175 °C
Maximum junction temperature, plastic package 150 °C
Storage temperature –65 150 °C

6.2 ESD Ratings

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all

(1)

V

(ESD)

Electrostatic discharge

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

pins
Charged device model (CDM), per JEDEC specification JESD22-

C101, all pins

(2)

(1)

MIN MAX UNIT

VALUE UNIT

±500

V

±1500

6.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

V

DD

T

A

Supply voltage 3 18 V
Operating free-air temperature –55 125 °C

6.4 Thermal Information

CD4066B

THERMAL METRIC

(1)

N

(PDIP)

14 PINS 14 PINS 14 PINS 14 PINS

R

θJA

R

θJC(top)

R

θJB

ψ

JT

ψ

JB

Junction-to-ambient thermal resistance 53.7 89.5 88.2 119.5 °C/W
Junction-to-case (top) thermal resistance 41.0 49.7 46.1 48.2 °C/W
Junction-to-board thermal resistance 33.6 43.8 47.0 61.2 °C/W
Junction-to-top characterization parameter 25.8 17.4 16.3 5.5 °C/W
Junction-to-board characterization parameter 33.5 43.5 46.6 60.6 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

D

(SOIC)

NS

(SO)

PW

(TSSOP)

UNIT

4

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6.5 Electrical Characteristics

Over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VDD= 5 V
Vis= 0 V

VDD= 5 V
Vis= 5 V

VDD= 10 V

V

os

Switch output voltage

On-state resistance

Δr

on

difference between any
two switches

THD Total harmonic distortion

–3-dB cutoff frequency
(switch on)

–50-dB feedthrough
frequency (switch off)

–50-dB crosstalk
frequency

C

is

C

os

C

ios

V

IHC

Input capacitance VDD= 5 V, VC= VSS= –5 V 8 pF
Output capacitance VDD= 5 V, VC= VSS= –5 V 8 pF
Feedthrough VDD= 5 V, VC= VSS= –5 V 0.5 pF

Control input, high voltage See Figure 7

Crosstalk
(control input to signal
output)

Turnon and turnoff
propagation delay

Maximum control input
repetition rate

C

I

Input capacitance 5 7.5 pF

Vis= 0 V
VDD= 10 V

Vis= 10 V
VDD= 15 V

Vis= 0 V
VDD= 15 V

Vis= 15 V

VDD= 5 V 15

RL= 10 kΩ, VC= V

DD

VDD= 15 V 5

VC= VDD= 5 V, VSS= –5 V,
V

= 5 V (sine wave centered on 0 V),

is(p-p)

RL= 10 kΩ, fis= 1-kHz sine wave
VC= VDD= 5 V, VSS= –5 V, V

(sine wave centered on 0 V), RL= 1 kΩ
VC= VSS= –5 V, V

(sine wave centered on 0 V), RL= 1 kΩ

is(p-p)

is(p-p)

= 5 V

VC(A) = VDD= 5 V,
VC(B) = VSS= –5 V,
Vis(A) = 5 V

RL= 1 kΩ

, 50-Ω source,

p-p

VDD= 5 V 3.5

VDD= 15 V 11

VC= 10 V (square wave),
tr, tf= 20 ns, RL= 10 kΩ
VDD= 10 V

VDD= 5 V 35 70

VIN= VDD, tr, tf= 20 ns,
CL= 50 pF, RL= 1 kΩ

VDD= 15 V 15 30

Vis= VDD, VSS= GND,
RL= 1 kΩ to GND,
CL= 50 pF,

VDD= 5 V 6
VDD= 10 V 9

VC= 10 V (square wave
centered on 5 V), tr, tf= 20 ns,

VDD= 15 V 9.5

Vos= 1/2 Vosat 1 kHz

= 5 V

CD4066B

SCHS051H –NOVEMBER 1998–REVISED FEBRUARY 2020

0.4 V

4.6 V

0.5 V

9.5 V

1.5 V

13.5 V

ΩVDD= 10 V 10

0.4%

40 MHz

1 MHz

8 MHz

VVDD= 10 V 7

50 mV

nsVDD= 10 V 20 40

MHz

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CD4066B

SCHS051H –NOVEMBER 1998–REVISED FEBRUARY 2020

Electrical Characteristics (continued)

Over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

TA= –55°C 0.64

VDD= 5 V
Vis= 0 V

VDD= 5 V
Vis= 5 V

VDD= 10 V
Vis= 0 V

I

is

Switch input current

VDD= 10 V
Vis= 10 V

VDD= 15 V
Vis= 0 V

VDD= 15 V
Vis= 15 V

TA= –40°C 0.61
TA= 25°C 0.51
TA= 85°C 0.42
TA= 125°C 0.36

TA= –55°C

TA= –40°C
TA= 25°C –0.51
TA= 85°C

TA= 125°C
TA= –55°C 1.6

TA= –40°C 1.5
TA= 25°C 1.3
TA= 85°C 1.1
TA= 125°C 0.9
TA= –55°C –1.6
TA= –40°C –1.5
TA= 25°C –1.3
TA= 85°C –1.1
TA= 125°C –0.9
TA= –55°C 4.2
TA= –40°C 4
TA= 25°C 3.4
TA= 85°C 2.8
TA= 125°C 2.4
TA= –55°C –4.2
TA= –40°C –4
TA= 25°C –3.4
TA= 85°C –2.8
TA= 125°C –2.4

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mA

–0.6

4

–0.6

1

mA

–0.4

2

–0.3

6

mA

mA

mA

mA

6

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V

DD

V

SS

-

(

)

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Electrical Characteristics (continued)

Over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

TA= –55°C 0.25

VIN= 0 to 5 V
VDD= 5 V

VIN= 0 to 10 V
VDD= 10 V

I

DD

Quiescent device current

VIN= 0 to 15 V
VDD= 15 V

VIN= 0 to 20 V
VDD= 20 V

r

on

On-state resistance (max)

to
VC= V

DD,

RL= 10 kΩ returned Vis= V
to V

DD

TA= –40°C 0.25
TA= 25°C 0.01 0.25
TA= 85°C 7.5
TA= 125°C 7.5
TA= –55°C 0.5
TA= –40°C 0.5
TA= 25°C 0.01 0.5
TA= 85°C 15
TA= 125°C 15
TA= –55°C 1
TA= –40°C 1
TA= 25°C 0.01 1
TA= 85°C 30
TA= 125°C 30
TA= –55°C 5
TA= –40°C 5
TA= 25°C 0.02 5
TA= 85°C 150
TA= 125°C 150

VDD= 5 V

VDD= 10 V

SS

VDD= 15 V

CD4066B

SCHS051H –NOVEMBER 1998–REVISED FEBRUARY 2020

µA

µA

µA

µA

TA= –55°C 800
TA= –40°C 850
TA= 25°C 470 1050
TA= 85°C 1200
TA= 125°C 1300
TA= –55°C 310
TA= –40°C 330
TA= 25°C 180 400
TA= 85°C 500
TA= 125°C 500
TA= –55°C 200
TA= –40°C 210
TA= 25°C 125 240
TA= 85°C 300
TA= 125°C 320

Ω

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CD4066B

SCHS051H –NOVEMBER 1998–REVISED FEBRUARY 2020

Electrical Characteristics (continued)

Over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VDD= 5 V

V

ILC

I

IN

Control input,
low voltage (max)

Input current (max)

|Iis| < 10 µA,
Vis= VSS, VOS= VDD, and

Vis= VDD, VOS= V

SS

Vis≤ VDD, VDD– VSS= 18 V,
VCC≤ VDD– V
VDD= 18 V

SS

VDD= 10 V

VDD= 15 V

TA= –55°C ±0.1
TA= –40°C ±0.1
TA= 25°C ±10–5±0.1
TA= 85°C ±1
TA= 125°C ±1

TA= –55°C 1
TA= –40°C 1
TA= 25°C 1
TA= 85°C 1
TA= 125°C 1
TA= –55°C 2
TA= –40°C 2
TA= 25°C 2
TA= 85°C 2
TA= 125°C 2
TA= –55°C 2
TA= –40°C 2
TA= 25°C 2
TA= 85°C 2
TA= 125°C 2

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V

µA

6.6 Switching Characteristics

TA= 25°C

PARAMETER FROM TO TEST CONDITIONS V

t

pd

t

plh

t

phl

Signal input Signal output

Signal input Signal output

Signal input Signal output

VIN= VDD, tr, tf= 20 ns,
CL= 50 pF, RL= 1 kΩ

VIN= VDD, tr, tf= 20 ns,
CL= 50 pF, RL= 1 kΩ

VIN= VDD, tr, tf= 20 ns,
CL= 50 pF, RL= 1 kΩ

CC

MIN TYP MAX UNIT

5 V 20 40

15 V 7 15

5 V 35 70

15 V 15 30

5 V 35 70

15 V 15 30

ns10 V 10 20

ns10 V 20 40

ns10 V 20 40

8

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3

2

1

0

−1

−2

−3

−3 −2 −1 0 1 2 3 4

VI− Input Voltage − V

92CS-30919

Output Voltage − V

V −

V

DD

VC= V

DD

V

is

V

os

R

L

V

SS

All unused terminals are
connected to V

SS

CD4066B

1 of 4

Switches

O

10

10

2

10

3

10

10

2

10

3

10

4

f − Switching Frequency − kHz

Power Dissipation Per Package − W

D

µ

6

4

2

6

4

2

6

4

2

2 4

2 4 6

P −

TA= 25°C

5 V

10 V

Supply Voltage

(VDD) = 15 V

6

V

SS

V

DD

5

6

13

12

7

CD4066B

14

8

8

Vis− Input Signal Voltage − V

300

250

200

150

100

50

0

−10 −7.5 −5 −2.5 0 2.5 5 7.5 10

Supply Voltage (VDD− VSS) = 15 V

TA= 125°C

+25 C°

−55 C°

92CS-27329RI

− Channel On-State Resistance −
on

Ω

r

Vis− Input Signal Voltage − V

600

500

400

300

200

100

0

−10 −7.5 −5 −2.5 0 2.5 5 7.5 10

Supply Voltage (VDD− VSS) = 5 V

TA= 125°C

10 V

−15 V

92CS-27330RI

− Channel On-State Resistance −
on

Ω

r

300

250

200

150

100

50

0

−10 −7.5 −5 −2.5 0 2.5 5 7.5 10

Supply Voltage (VDD− VSS) = 10 V

TA= 125°C

Vis− Input Signal Voltage − V

+25 C°

−55 C°

92CS-27327RI

− Channel On-State Resistance −
on

Ω

r

Vis− Input Signal Voltage − V

600

500

400

300

200

100

0

−4 −3 −2 −1 0 1 2 3 4

92CS-27326RI

TA= 125°C

+25 C°

−55 C°

Supply Voltage (VDD− VSS) = 5 V

− Channel On-State Resistance −
on

Ω

r

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6.7 Typical Characteristics

CD4066B

SCHS051H –NOVEMBER 1998–REVISED FEBRUARY 2020

Figure 1. Typical ON-State Resistance vs Input Signal

Voltage (All Types)

Figure 3. Typical ON-State Resistance vs Input Signal

Voltage (All Types)

Figure 2. Typical ON-State Resistance vs Input Signal

Voltage (All Types)

Figure 4. Typical ON-State Resistance vs Input Signal

Voltage (All Types)

Figure 5. Typical ON Characteristics for 1 of 4 Channels

Figure 6. Power Dissipation per Package vs Switching

Frequency

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VDD= 5 V

VC= −5 V

V

SS = −5 V

C

ios

C

is

C

os

CD4066B

1 of 4

Switches

Measured on Boonton capacitance bridge, model 75a (1 MHz);
test-fixture capacitance nulled out.

92CS-30921

X-Y

Plotter

1-kΩ

Range

TG
On

Keithley

160 Digital

Multimeter

H. P.
Moseley
7030A

X

V

SS

V

DD

10 kΩ

92CS-22716

Y

Copyright © 2016, Texas Instruments Incorporated

CD4066B

1 of 4 Switches

I

is

V

is

V

os

|Vis íVos|

|Iis|

ron =

CD4066B

SCHS051H –NOVEMBER 1998–REVISED FEBRUARY 2020

7 Parameter Measurement Information

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Figure 7. Determination of ronas a Test Condition for Control-Input High-Voltage (V

Figure 8. Channel On-State Resistance Measurement Circuit

) Specification

IHC

Figure 9. Typical On Characteristics for One of Four Channels

10

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