Texas Instruments CC2520RHDT, CC2520 Datasheet
CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
APPLICATIONS
•
IEEE 802.15.4 systems
•
ZigBee® systems
•
Industrial monitoring and control
•
Home and building automation
•
Automatic Meter Reading
•
Low-power wireless sensor networks
•
Set-top boxes and remote controls
•
Consumer electronics
KEY FEATURES
•
State-of-the-art selectivity/co-existence
Adjacent channel rejection: 49 dB
Alternate channel rejection: 54 dB
•
Excellent link budget (103dB)
400 m Line-of-sight range
•
Extended temp range (-40 to +125°C)
•
Wide supply range: 1.8 V – 3.8 V
•
Extensive IEEE 802.15.4 MAC hardware
support to offload the microcontroller
•
AES-128 security module
•
CC2420 interface compatibility mode
Low Power
•
RX (receiving frame, -50 dBm) 18.5 mA
•
TX 33.6 mA @ +5 dBm
•
TX 25.8 mA @ 0 dBm
•
<1µA in power down
General
•
Clock output for single crystal systems
•
RoHS compliant 5 x 5 mm QFN28 (RHD)
package
Radio
•
IEEE 802.15.4 compliant DSSS baseband
modem with 250 kbps data rate
•
Excellent receiver sensitivity (-98 dBm)
•
Programmable output power up to +5 dBm
•
RF frequency range 2394-2507 MHz
•
Suitable for systems targeting compliance
with worldwide radio frequency
regulations: ETSI EN 300 328 and EN
300 440 class 2 (Europe), FCC CFR47 Part
15 (US) and ARIB STD-T66 (Japan)
Microcontroller Support
•
Digital RSSI/LQI support
•
Automatic clear channel assessment for
CSMA/CA
•
Automatic CRC
•
768 bytes RAM for flexible buffering and
security processing
•
Fully supported MAC security
•
4 wire SPI
•
6 configurable IO pins
•
Interrupt generator
•
Frame filtering and processing engine
•
Random number generator
Development Tools
•
Reference design
•
IEEE 802.15.4 MAC software
•
ZigBee® stack software
•
Fully equipped development kit
•
Packet sniffer support in hardware
DESCRIPTION
The CC2520 is TI's second generation ZigBee® /
QFN28 (RHD) PACKAGE
TOP VIEW
IEEE 802.15.4 RF transceiver for the 2.4 GHz
unlicensed ISM band. This chip enables industrial
grade applications by offering state-of-the-art
selectivity/co-existence, excellent link budget,
operation up to 125°C and low voltage operation.
In addition, the CC2520 provides extensive
hardware support for frame handling, data
buffering, burst transmissions, data encryption,
data authentication, clear channel assessment,
link quality indication and frame timing
information. These features reduce the load on
the host controller.
In a typical system, the CC2520 will be used
together with a microcontroller and a few
additional passive components.
SO
CSn
GPIO5
GPIO4
GPIO3
GPIO2
SCLK
28272625242322
1
2
SI
3
4
CC2520
5
6
7
8
DVDD
DCOUPL
VREG_EN
RESETn
9
1011121314
GPIO1
GPIO0
AVDD5
AVDD_GUARD
XOSC32M_Q2
RBIAS
AVDD4
AVDD3
XOSC32M_Q1
21
NC
20
AVDD1
19
RF_N
18
NC
17
RF_P
16
AVDD2
15
NC
AGND
exposed die
attached pad
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers threto appear at the end of this datasheet.
ZigBee® is a registered trademark owned by ZigBee Alliance, Inc.
Copyright © 2007, Texas Instruments Incorporated
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1
CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
TABLE OF CONTENTS
1 Abbreviations ...............................................................................................................................5
2 References................................................................................................................................... 7
3 Features.......................................................................................................................................8
4 Absolute Maximum Ratings ....................................................................................................... 10
5 Electrical Characteristics............................................................................................................ 11
5.1
5.2
5.3
5.4
5.5
5.6
5.6.1
5.7
5.8
5.9
5.10
5.10.1 Low-Current RX Mode Parameters ............................................................................ 19
5.11
5.11.1 Using the Temperature Sensor .................................................................................. 21
6 Crystal Specific Parameters....................................................................................................... 22
6.1
6.2
7 Pinout.........................................................................................................................................23
8 Functional Introduction............................................................................................................... 25
8.1
8.2
8.3
9 Application Circuit ......................................................................................................................29
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
10 Serial Peripheral Interface (SPI) ................................................................................................ 33
10.1
10.2
10.3
10.4
10.5
11 GPIO .......................................................................................................................................... 35
11.1
11.2
11.3
11.4
11.5
12 Power Modes ............................................................................................................................. 40
12.1
12.2
Recommended Operating Conditions ............................................................................11
DC Characteristics .........................................................................................................11
Wake-Up and Timing ..................................................................................................... 11
Current Consumptions ...................................................................................................11
Receive Parameters....................................................................................................... 12
Frequency Synthesizer Parameters............................................................................... 12
Transmit Parameters..................................................................................................12
RSSI/CCA Parameters................................................................................................... 13
FREQEST Parameters................................................................................................... 13
Typical Performance Curves.......................................................................................... 14
Low-Current Mode RX.................................................................................................... 19
Optional Temperature Compensation of TX................................................................... 20
Crystal Requirements..................................................................................................... 22
On-chip Crystal Frequency Tuning................................................................................. 22
Integrated 2.4 GHz IEEE 802.15.4 Compliant Radio .....................................................25
Comparison to CC2420.................................................................................................. 25
Block Diagram................................................................................................................ 26
Input / Output Matching.................................................................................................. 29
Bias Resistor .................................................................................................................. 30
Crystal ............................................................................................................................ 30
Digital Voltage Regulator................................................................................................ 30
Power Supply Decoupling and Filtering .........................................................................30
Board Layout Guidelines................................................................................................ 30
Antenna Considerations................................................................................................. 31
Choosing the Most Suitable Interconnection with a Microcontroller............................... 31
Interfacing CC2520 and MSP430F2618 ........................................................................31
CSn ................................................................................................................................ 33
SCLK..............................................................................................................................33
SI....................................................................................................................................33
SO .................................................................................................................................. 34
SPI Timing Requirements ..............................................................................................34
Reset Configuration of GPIO Pins.................................................................................. 35
GPIO as Input ................................................................................................................ 35
GPIO as Output.............................................................................................................. 36
Switching Direction on GPIO.......................................................................................... 36
GPIO Configuration........................................................................................................ 36
Switching Between Power Modes.................................................................................. 40
Power Up Sequence Using RESETn (recommended)...................................................41
2
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12.3
Power Up With SRES .................................................................................................... 41
13 Instruction Set ............................................................................................................................ 43
13.1
Definitions ......................................................................................................................43
13.2
Instruction Descriptions.................................................................................................. 43
13.3
Instruction Set Summary................................................................................................ 51
13.4
Status Byte.....................................................................................................................53
13.5
Command Strobes ......................................................................................................... 53
13.6
Command Strobe Buffer ................................................................................................ 53
14 Exceptions .................................................................................................................................55
14.1
Exceptions on GPIO Pins............................................................................................... 56
14.2
Predefined Exception Channels..................................................................................... 56
14.3
Binding Exceptions to Instructions (command strobes) .................................................57
15 Memory Map .............................................................................................................................. 59
15.1
FREG ............................................................................................................................. 60
15.2
SREG ............................................................................................................................. 60
15.3
TX FIFO .........................................................................................................................60
15.4
RX FIFO .........................................................................................................................60
15.5
MEM...............................................................................................................................60
15.6
Frame Filtering and Source Matching Memory Map ...................................................... 60
16 Frequency and Channel Programming ...................................................................................... 62
17 IEEE 802.15.4-2006 Modulation Format.................................................................................... 63
18 IEEE 802.15.4-2006 Frame Format........................................................................................... 65
18.1
PHY Layer......................................................................................................................65
18.2
MAC Layer .....................................................................................................................65
19 Transmit Mode ........................................................................................................................... 67
19.1
TX Control ......................................................................................................................67
19.2
TX State Timing .............................................................................................................67
19.3
TX FIFO Access............................................................................................................. 67
19.3.1 Retransmission........................................................................................................... 68
19.3.2 Error Conditions .........................................................................................................68
19.4
TX Flow Diagram ........................................................................................................... 69
19.5
Frame Processing .......................................................................................................... 70
19.5.1 Synchronization Header ............................................................................................. 70
19.5.2 Frame Length Field .................................................................................................... 70
19.5.3 Frame Check Sequence............................................................................................. 70
19.6
Exceptions......................................................................................................................71
19.7
Clear Channel Assessment............................................................................................ 71
19.8
Output Power Programming........................................................................................... 71
19.9
Tips And Tricks .............................................................................................................. 72
20 Receive Mode ............................................................................................................................ 73
20.1
RX Control......................................................................................................................73
20.2
RX State Timing ............................................................................................................. 73
20.3
Frame Processing .......................................................................................................... 73
20.3.1 Synchronization Header And Frame Length Fields.................................................... 74
20.3.2 Frame Filtering ........................................................................................................... 74
20.3.3 Source Address Matching .......................................................................................... 77
20.3.4 Frame Check Sequence............................................................................................. 80
20.3.5 Acknowledgement Transmission................................................................................ 81
20.4
RX FIFO Access ............................................................................................................ 82
20.4.1 Using the FIFO and FIFOP Signals............................................................................ 82
20.4.2 Error Conditions .........................................................................................................83
20.5
RSSI...............................................................................................................................83
20.6
Link Quality Indication .................................................................................................... 84
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
CC2520 DATASHEET
SWRS068 – DECEMBER 2007
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CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
21 Radio Control State Machine .....................................................................................................85
22 Crystal Oscillator........................................................................................................................87
23 External Clock Output ................................................................................................................ 88
24 Random Number Generation.....................................................................................................89
25 Memory Management Instructions............................................................................................. 91
25.1
RXBUFMOV................................................................................................................... 92
25.2
TXBUFCP ...................................................................................................................... 92
25.3
MEMCP..........................................................................................................................92
25.4
MEMCPR ....................................................................................................................... 92
25.5
MEMXCP ....................................................................................................................... 92
26 Security Instructions................................................................................................................... 93
26.1
Decoding of the Flags Field in CC2520.......................................................................... 93
26.2
INC ................................................................................................................................. 94
26.3
ECB................................................................................................................................94
26.4
ECBO ............................................................................................................................. 95
26.5
ECBX .............................................................................................................................95
26.6
CTR / UCTR................................................................................................................... 96
26.7
CBC-MAC ...................................................................................................................... 97
26.8
CCM / UCCM .................................................................................................................97
26.8.1 Inputs to the CCM and UCCM Instructions ................................................................ 97
26.9
Examples from IEEE802.15.4-2006 ............................................................................... 98
26.9.1 Authentication Only Using CCM* ...............................................................................99
26.9.2 Encryption Only Using CCM* ..................................................................................... 99
26.9.3 Combination of Encryption and Authentication Using CCM*.................................... 100
27 Packet Sniffing ......................................................................................................................... 101
28 Registers..................................................................................................................................102
28.1
Register Settings Update ............................................................................................. 103
28.2
Register Access Modes................................................................................................ 103
28.3
Register Descriptions ................................................................................................... 105
29 Datasheet Revision History...................................................................................................... 126
30 Packaging Information .............................................................................................................127
30.1
Mechanical Data .......................................................................................................... 128
4
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1 Abbreviations
AAF Anti Aliasing Filter
ACK Acknowledge
ADC Analog to Digital Converter
ADI Analog-Digital Interface
AES Advanced Encryption Standard
AGC Automatic Gain Control
AM Active Mode
ARIB Association of Radio Industries and Businesses
BER Bit Error Rate
BIST Built In Self Test
CBC-MAC Cipher Block Chaining Message Authentication Code
CCA Clear Channel Assessment
CCM Counter mode + CBC-MAC
CDM Charged Device Model
CFR Code of Federal Regulations
CHP Charge Pump
CMOS Complementary Metal Oxide Semiconductor
CRC Cyclic Redundancy Check
CSMA-CA Carrier Sense Multiple Access with Collision Avoidance
CTR Counter mode (encryption)
CW Continuous Wave
DAC Digital to Analog Converter
DC Direct Current
DPU Data Processing Unit
DSSS Direct Sequence Spread Spectrum
ECB Electronic Code Book (mode of AES operation)
ESD Electro Static Discharge
ESR Equivalent Series Resistance
ETSI European Telecommunications Standards Institute
EU European Union
EVM Error Vector Magnitude
FCC Federal Communications Commission
FCF Frame Control Field
FCS Frame Check Sequence
FFCTRL FIFO and Frame Control
FIFO First In First Out
FS Frequency Synthesizer
FSM Finite State Machine
GPIO General Purpose Input/Output
HBM Human Body Model
HSSD High Speed Serial Debug
I/O Input / Output
I/Q In-phase / Quadrature-phase
IEEE Institute of Electrical and Electronics Engineers
IF Intermediate Frequency
ISM Industrial, Scientific and Medical
ITU-T International Telecommunication Union –
kbps kilo bits per second
LB Loop Back
LF Loop Filter
LNA Low-Noise Amplifier
LO Local Oscillator
LPF Low Pass Filter
LPM Low-Power Mode
CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
Telecommunication Standardization Sector
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5
CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
LQI Link Quality Indication
LSB Least Significant Bit / Byte
LUT Look-Up Table
MAC Medium Access Control
MCU Micro Controller Unit
MFR MAC Footer
MHR MAC Header
MIC Message Integrity Code
MISO Master In Slave Out
MM Machine Model
MOSI Master Out Slave In
MPDU MAC Protocol Data Unit
MSB Most significant Bit / Byte
MSDU MAC Service Data Unit
NA Not Available
NC Not Connected
O-QPSK Offset - Quadrature Phase Shift Keying
PA Power Amplifier
PAN Personal Area Network
PCB Printed Circuit Board
PD Power Down, Phase Detector
PER Packet Error Rate
PHR PHY Header
PHY Physical Layer
PLL Phase Locked Loop
PQFP Plastic Quad FlatPack
PSDU PHY Service Data Unit
PUE Pull-Up Enable
QLP Quad Leadless Package
RAM Random Access Memory
RBW Resolution BandWidth
RF Radio Frequency
RHD Not actually an acronym. This is the package name used in TI.
RISC Reduced Instruction Set Computer
RoHS Restriction of Hazardous Substances Directive
ROM Read Only Memory
RSSI Received Signal Strength Indicator
RX Receive
SFD Start of Frame Delimiter
SHR Synchronization Header
SI Serial In
SO Serial Out
SPI Serial Peripheral Interface
S-PQFP Plastic Quad Flat Pack
T/R Transmit / Receive
TBD To Be Decided / To Be Defined
TX Transmit
UI User Interface
VCO Voltage Controlled Oscillator
VGA Variable Gain Amplifier
XOSC Crystal Oscillator
LR Low Rate
NaN Not any Number
6
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CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
2 References
[1] IEEE std. 802.15.4 - 2003: Wireless Medium Access Control (MAC) and Physical Layer (PHY)
specifications for Low Rate Wireless Personal Area Networks (LR-WPANs)
http://standards.ieee.org/getieee802/download/802.15.4-2003.pdf
[2] IEEE std. 802.15.4 - 2006: Wireless Medium Access Control (MAC) and Physical Layer (PHY)
specifications for Low Rate Wireless Personal Area Networks (LR-WPANs)
http://standards.ieee.org/getieee802/download/802.15.4-2006.pdf
[3] CC2420 datasheet
http://www.ti.com/lit/pdf/swrs041
[4] NIST FIPS Pub 197: Advanced Encryption Standard (AES), Federal Information Processing Standards
Publication 197, US Department of Commerce/N.I.S.T., November 26, 2001.
http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf
[5] CC2520 reference designs
http://focus.ti.com/docs/prod/folders/print/cc2520.html#applicationnotes
[6] CC2520 Errata note
http://www.ti.com/lit/pdf/swrz024
[7] CC2520 Product folder
http://focus.ti.com/docs/prod/folders/print/cc2520.html
[8] NIST software package for randomness testing:
http://csrc.nist.gov/rng/
[9] The diehard software package for randomness testing:
http://stat.fsu.edu/~geo/diehard.html
[10] MSP430F2618 Product folder
http://focus.ti.com/docs/prod/folders/print/msp430f2618.html
[11] 2.4 GHz Inverted F Antenna
http://www.ti.com/lit/pdf/swru120
[12] Antenna selection guide
http://www.ti.com/lit/pdf/swra161
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7
CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
3 Features
2394-2507MHz transceiver
• DSSS transceiver
• 250kbps data rate, 2 MChip/s chip rate
• O-QPSK with half sine pulse shaping modulation
• Very low current consumption
RX (receiving frame, -50 dBm): 18.5 mA
RX (waiting for frame): 22.3 mA
TX (+5 dBm output power): 33.6 mA
TX (0 dBm output power): 25.8 mA
• Three flexible power modes for reduced power consumption
• Low power fully static CMOS design
• Very good sensitivity (-98dBm)
• High adjacent channel rejection (49 dB)
• High alternate channel rejection (54 dB)
• On chip VCO, LNA, PA and filters.
• Low supply voltage (1.8 - 3.8 V)
• Programmable output power up to +5 dBm
• I/Q direct conversion transceiver
Small Size
• QFN 28 (RHD) package, 5 x 5 mm
• Very few external components
o minimized number of passives
o Only reference crystal needed
• Clock output for other ICs to limit the number of crystals needed in a system
• No external filters needed.
Easy and Flexible User Interface
• 4-wire SPI
• Serial clock up to 8 MHz
• 6 GPIO pins with full flexibility
• Interrupt generator
• Full control of automatic responses to different events
• Embedded packet sniffer mode
• CC2420 compatibility mode
Data Processing Unit For Advanced Data Handling
• Spacious (768 byte) on-chip RAM allows powerful on-chip frame processing
• 128 byte transmit data FIFO
• 128 byte receive data FIFO
• Full read and write access to RAM
• 128 bit AES
IEEE 802.15.4 MAC Hardware Support
• Automatic preamble generator
• Synchronization word insertion and detection
• CRC-16 computation and verification over the MAC payload
• Frame filtering
• Automatic ACK and setting of the pending-bit
• Clear Channel Assessment (CCA)
• Energy detection / RSSI
• Link Quality Indication (LQI)
• Fully automatic MAC security (CTR, CBC-MAC, CCM)
8
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2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
Development Tools
• See product folder [7]
Suited For Use in Systems That Target Compliance to the Following Standards
• IEEE 802.15.4 PHY
• ETSI EN 300 328
• ETSI EN 300 440 class 2
• FCC CFR47 part 15
• ARIB STD-T66
CC2520 DATASHEET
SWRS068 – DECEMBER 2007
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CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
4 Absolute Maximum Ratings
over operating free-air temperature range unless otherwise noted
PARAMETER LIMITS UNIT
Supply voltage
(2)
-0.3 to 3.9 V
Voltage on any digital pin -0.3 to VDD + 0.3 (Max 3.9) V
Voltage on 1.8 V pins -0.3 to 2.0 V
Input RF level +10 dBm
Storage temperature range -50 to 150 °C
Reflow soldering temperature 260 °C
ESD HBM 800 V
ESD CDM 500 V
ESD MM 100 V
1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated under
“recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
2) All voltage values are with respect to network ground terminal.
This device has limited built-in gate protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1)
10
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CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
5 Electrical Characteristics
Note that these characteristics are only valid when using the recommended register settings presented in
section 28.1.
5.1 Recommended Operating Conditions
PARAMETER MIN NOM MAX UNIT
Operating supply voltage 1.8 3.8 V
Ambient temperature
5.2 DC Characteristics
T
=25°C, VDD=3.0 V, fc=2440 MHz if nothing else stated. All parameters measured on Texas Instruments’ CC2520 EM 2.1 reference design with 50 Ω load.
A
PARAMETER CONDITIONS MIN TYP MAX UNIT
Logic "1" input voltage Valid for all pads (both GPIOs and fixed-input pads) 80% of VDD
Logic "0" input voltage Valid for all pads (both GPIOs and fixed-input pads) 30% of VDD
Input pad hysteresis Only for fixed-input pads like RESET_N, CSn etc 0.5 V
Logic "0" input current Input equals 0V -25 25 nA
Logic "1" input current Input equals VDD -25 25 nA
-40 125
°C
5.3 Wake-Up and Timing
T
=25°C, VDD=3.0 V, fc =2440 MHz if nothing else stated. All parameters measured on Texas Instruments’ CC2520 EM 2.1 reference design with 50 Ω load.
A
PARAMETER COMMENTS MIN TYP MAX UNIT
LPM2 Æ AM time Internal regulator startup time + XOSC startup time 0.3 ms
LPM1 Æ AM time XOSC startup time 0.2 ms
AM Æ RX time 192
AM Æ TX time 192
RX/TX turnaround time 192
TX/RX turnaround time 192
Radio bit rate 250 kbps
Radio chip rate 2.0 MChip/s
µs
µs
µs
µs
5.4 Current Consumptions
T
=25°C, VDD=3.0 V, fc =2440 MHz if nothing else stated. All parameters measured on Texas Instruments’ CC2520 EM 2.1 reference design with 50 Ω load.
A
PARAMETER CONDITIONS MIN TYP MAX UNIT
Wait for sync 22.3 24.8 mA
Receive current
Transmit current
Active Mode current
Wait for sync, Low-current RX setting 18.8 mA
Receving frame, -50 dBm input level 18.5 mA
0 dBm setting 25.8 28.8 mA
+5 dBm setting 33.6 37.2 mA
XOSC on, digital regulator on. 1.6 1.9 mA
TA=-40 to 125°C, VDD=1.8 to 3.8 V, fc =2394 to 2507 MHz 26.3 mA
T
=-40 to 125°C, VDD=1.8 to 3.8 V, fc =2394 to 2507 MHz 37.5 mA
A
T
=-40 to 125°C, VDD=1.8 to 3.8 V, fc =2394 to 2507 MHz 2.6 mA
A
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CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
PARAMETER CONDITIONS MIN TYP MAX UNIT
LPM1 current
LPM2 current
XOSC off, digital regulator on. State retention. 175 250
T
=-40 to 125°C, VDD=1.8 to 3.8 V, fc =2394 to 2507 MHz 1000
A
XOSC off, digital regulator off. No state retention. 30 120 nA
T
=-40 to 125°C, VDD=1.8 to 3.8 V, fc =2394 to 2507 MHz 4.5
A
µA
µA
µA
5.5 Receive Parameters
T
=25°C, VDD=3.0 V, fc =2440 MHz if nothing else stated. All parameters measured on Texas Instruments’ CC2520 EM 2.1 reference design with 50 Ω load.
A
PARAMETER CONDITIONS MIN TYP MAX UNIT
Receiver sensitivity
Saturation [2] requires -20 dBm 6 dBm
[2] requires -85 dBm -99 -98 -95 dBm
=-40 to 125°C, VDD=1.8 to 3.8V, fc =2394 to 2507 MHz -88 dBm
T
A
Wanted signal 3 dB above the sensitivity level, 802.15.4 modulated
interferer at 802.15.4 channels:
±5 MHz from wanted signal. [2] requires 0 dB 49 dB
Interferer Rejection
±10 MHz from wanted signal. [2] requires 30 dB 54 dB
±20MHz or above. Wanted signal at -82dBm. 55 dB
Maximum Spurious
Emission
Conducted measurement in
a 50Ω single ended load.
Complies with EN 300 328,
EN 300 440 class 2, FCC
CFR47, Part 15 and ARIB
STD-T-66
Frequency error
tolerance
30 – 1000 MHz < -80 dBm
1 – 12.75 GHz -56 dBm
Input level is 3 dB above sensitivity level. +/-400 kHz
IIP3 -24 dBm
5.6 Frequency Synthesizer Parameters
T
=25°C, VDD=3.0 V, fc =2440 MHz if nothing else stated. All parameters measured on Texas Instruments’ CC2520 EM 2.1 reference design with 50 Ω load.
A
PARAMETER CONDITIONS MIN TYP MAX UNIT
Phase noise.
Unmodulated carrier
RF Frequency range
At ±1 MHz offset from carrier -111 dBc/Hz
At ±2 MHz offset from carrier -118 dBc/Hz
At ±5 MHz offset from carrier -128 dBc/Hz
Programmable in 1 MHz steps. Use 5 MHz steps for compliance
2394 2507 MHz
with [2].
5.6.1 Transmit Parameters
T
=25°C, VDD=3.0 V, fc =2440 MHz if nothing else stated. All parameters measured on Texas Instruments’ CC2520 EM 2.1 reference design with 50 Ω load.
A
PARAMETER CONDITIONS MIN TYP MAX UNIT
Output power
Note: to reduce the output
power variation over
temperature, it is suggested
that different settings are
used at different
temperatures. The on-chip
temperature sensor can be
used for this purpose.
Please see section 5.11 for
more information.
12
0 dBm setting -3 1 5 dBm
+5 dBm setting 2 5 7 dBm
TA=-40 to 85°C, VDD=2.0 to 3.8 V, fc =2394 to 2507 MHz -3 8 dBm
TA=-40 to 85°C , VDD=1.8 to 3.8 V, fc =2394 to 2507 MHz -4 8 dBm
TA=-40 to 125°C, VDD=2.0 to 3.8 V, fc =2394 to 2507 MHz -6 8 dBm
TA=-40 to 125°C, VDD=1.8 to 3.8 V, fc =2394 to 2507 MHz -9 8 dBm
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CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
PARAMETER CONDITIONS MIN TYP MAX UNIT
Largest spurious
emission at maximum
output power.
Texas Instruments CC2520
EM reference design
complies with EN 300 328,
EN 300 440, FCC CFR47
Part 15 and ARIB STDT-66.
Transmit on 2480 MHz
under FCC at +5 dBm is
supported by duty-cycling,
or by reducing output
power.
The peak conducted
spurious emission might
violate ETSI and FCC
restricted band limits at
frequencies below 1GHz.
All radiated spurious
emissions are within the
limits of ETSI/FCC/ARIB.
Applications that must pass
conducted requirements
are suggested to use a
simple 50 Ω high pass filter
between matching network
and RF connector.
25 MHz – 1 GHz (outside restricted bands) -40 dBm
25 MHz – 1 GHz (within FCC restricted bands) -53 dBm
47-74, 87.5-118, 174-230, 470-862 MHz (ETSI restricted bands) -42 dBm
1800 MHz-1900 MHz (ETSI restricted band) -56 dBm
5150 MHz-5300 MHz (ETSI restricted band) -54 dBm
At 2483.5 MHz and above (FCC restricted band)
fc=2480 MHz, +5 dBm -37 dBm
fc=2480 MHz, 0 dBm -41 dBm
At 2·RF and 3·RF (FCC restricted band) -54 dBm
Error Vector Magnitude
(EVM)
+5 dBm setting. fc =IEEE 802.15.4 channels 6 %
0 dBm setting. f
=IEEE 802.15.4 channels 2 %
c
5.7 RSSI/CCA Parameters
[2] requires max. 35%. Measured as defined by [2].
T
=25°C, VDD=3.0 V, fc =2440 MHz if nothing else stated. All parameters measured on Texas Instruments’ CC2520 EM 2.1 reference design with 50 Ω load.
A
PARAMETER COMMENTS MIN TYP MAX UNIT
RSSI range 100 dB
RSSI/CCA accuracy
RSSI/CCA offset Real RSSI = Register value - offset
LSB value
+/-4 dB
76 dB
1 dB
5.8 FREQEST Parameters
T
=25°C, VDD=3.0 V, fc =2440 MHz if nothing else stated. All parameters measured on Texas Instruments’ CC2520 EM 2.1 reference design with 50 Ω load.
A
PARAMETER COMMENTS MIN TYP MAX UNIT
FREQEST range +/-300 kHz
FREQEST accuracy +/-10 kHz
FREQEST offset Real frequency offset = FREQEST value - offset 64 kHz
LSB value 7.8 kHz
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5.9 Typical Performance Curves
T
=25°C, VDD=3.0 V, fc =2440 MHz if nothing else stated. All parameters measured on Texas Instruments’ CC2520 EM 2.1 reference design with 50 Ω load.
A
-92
SENSITIVITY VS TEMPERATURE
-90.0
SENSITIVITY VS EVM
-94
-96
SENSITIVITY (dBm)
-98
-100
-40 10 60 110
TEMPERATURE (ºC)
SENSITIVITY VS SUPPLY VOLTAGE
-90
-92
-94
-96
SENSITIVITY (dBm)
-98
-100
1.8 2.3 2.8 3.3 3.8
VOLTAGE (V)
-92.0
-94.0
-96.0
SENSITIVITY (dBm)
-98.0
-100.0
0 % 10 % 20 % 30 % 40 % 50 % 60 %
ERROR VECTOR MAGNITUDE (% RMS)
SENSITIVITY VS CARRIER FREQUENCY OFFSET
0.0
-40.0
-80.0
SENSITIVITY (dBm)
-120.0
-1000 -500 0 500 1000
FREQUENCY OFFSET (kHz)
-94
-96
-98
SENSITIVITY (dBm)
-100
SENSITIVITY VS CARRIER FREQUENCY
2394 2414 2434 2454 2474 2494
FREQUENCY (MHz)
OUTPUT POWER VS TEMPERATURE
8
4
0
-4
OUTPUT POWER (dBm)
-8
-40 10 60 110
5dBm (0xF7)
0dBm (0x32)
TEMPERATURE (ºC)
14
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OUTPUT POWER VS SUPPLY VOLTAGE
6
5dBm (0xF7)
4
2
0dBm (0x32)
0
OUTPUT POWER (dBm)
-2
1.8 2.3 2.8 3.3 3.8
VOLTAGE (V)
TX (5dBm setting, 0xF7) CURRENT VS TEMPERATURE
35
34
33
CURRENT (mA)
AM CURRENT VS TEMPERATURE
1.9
1.8
1.7
CURRENT (mA)
1.6
1.5
-40 10 60 110
TEMPERATURE (ºC)
LPM1 CURRENT VS TEMPERATURE
400
300
200
CURRENT (uA)
100
32
-40 10 60 110
TEMPERATURE (ºC)
RX CURRENT VS TEMPERATURE
25
24
23
CURRENT (mA)
22
21
-40 10 60 110
TEMPERATURE (ºC)
0
-40 10 60 110
TEMPERATURE (ºC)
LPM2 CURRENT VS TEMPERATURE
2
1.6
1.2
0.8
CURRENT (uA)
0.4
0
-40 10 60 110
TEMPERATURE (ºC)
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TX (+5dBm SETTING, 0xF7) CURRENT VS SUPPLY VOLTAGE
33.5
33
32.5
CURRENT (mA)
32
31.5
1.8 2.3 2.8 3.3 3.8
VOLTAGE (V)
RX CURRENT VS SUPPLY VOLTAGE
22.8
22.4
22
CURRENT (mA)
21.6
LPM1 CURRENT VS SUPPLY VOLTAGE
300
200
100
CURRENT (uA)
0
1.8 2.3 2.8 3.3 3.8
VOLTAGE (V)
LPM2 CURRENT VS SUPPLY VOLTAGE
100
70
40
CURRENT (nA)
21.2
1.8 2.3 2.8 3.3 3.8
VOLTAGE (V)
AM CURRENT VS SUPPLY VOLTAGE
1.8
1.7
1.6
CURRENT (uA)
1.5
1.8 2.3 2.8 3.3 3.8
VOLTAGE (V)
10
1.8 2.3 2.8 3.3 3.8
VOLTAGE (V)
RX CURRENT VS INPUT LEVEL
24
21
18
CURRENT (mA)
15
-100 -80 -60 -40 -20 0
INPUT LEVEL (dBm)
16
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INTERFERER REJECTION (802.15.4 INTERFERER) VS
INTERFERER FREQUENCY. CARRIER AT -82dBm/2440MHz.
75
50
25
0
INTERFERER REJECTION (dB)
-25
2400 2420 2440 2460 2480
INTERFERER FREQUENCY (MHz)
ADJACENT CHANNEL REJECTION (802.15.4 INTERFERER)
55
50
45
ACR (dB)
40
35
30
-95 -90 -85 -80 -75 -70 -65 -60
VS CARRIER LEVEL
CARRIER LEVEL (dBm)
INTERFERER REJECTION VS 802.11g
CARRIER AT -82dBm/2440MHz
80
60
40
20
INTERFERER REJECTION (dB)
0
2412 2422 2432 2442 2452 2462 2472 2482
INTERFERER FREQUENCY (MHz)
INTERFERER REJECTION VS 802.11g
CARRIER AT -82dBm/2480MHz
80
60
40
20
INTERFERER REJECTION (dB)
0
2412 2422 2432 2442 2452 2462 2472 2482
INTERFERER FREQUENCY (MHz)
INTERFERER REJECTION VS 802.11g
CARRIER AT -82dBm/2405MHz
80
60
40
20
INTERFERER REJECTION (dB)
0
2412 2422 2432 2442 2452 2462 2472 2482
INTERFERER FREQUENCY (MHz)
FALSE PACKET RATE AND SENSITIVITY
vs CORRELATION THRESHOLD
1000
.
100
10
1
FALSE PACKETS PER MIN
0.1
Sensitivity
0.01
0x0B 0x0F 0x13 0x17
False packets/min
CORRELATION THRESHOLD (MDMCTRL1)
-91
-92
-93
-94
-95
-96
-97
-98
SENSITIVITY (dBm)
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500
400
300
200
100
FREQEST (kHz)
-100
-200
-300
FREQEST VS ACTUAL OFFSET FREQUENCY
0
-500 -300 -100 100 300 500
ACTUAL FREQUENCY OFFSET (kHz)
OFFSET CORRECTED RSSI VS INPUT LEVEL
0
-20
-40
-60
-80
-100
OFFSET CORRECTED RSSI (dBm)
-120
-100 -80 -60 -40 -20 0
INPUT LEVEL (dBm)
TEMPERATURE SENSOR OUTPUT VS SUPPLY VOLTAGE
0.820
0.810
0.800
0.790
TEMPERATURE SENSOR (V)
0.780
1.8 2.3 2.8 3.3 3.8
112
108
104
100
96
CORRELATION VALUE (decimal)
92
0 % 10 % 20 % 30 % 40 % 50 % 60 % 70 %
(TEMPERATURE = 25ºC)
VOLTAGE (V)
CORRELATION VALUE VS ERROR VECTOR
MAGNITUDE OF INPUT SIGNAL
EVM (% RMS)
TEMPERATURE SENSOR OUTPUT VS TEMPERATURE
1.100
1.000
0.900
0.800
0.700
TEMP SENSOR VOLTAGE (V)
0.600
-40 10 60 110
(SUPPLY VOLTAGE = 3V)
TEMPERATURE (ºC)
18
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5.10 Low-Current Mode RX
Applications that spend more time waiting for an input
signal than actually receiving it, might benefit from using
INTERFERER REJECTION (802.15.4 INTERFERER) VS
CARRIER LEVEL WHEN USING RX_LOCUR
60
the special low-current RX mode. This mode draws less
current at the expense of sensitivity.
40
Note that when using this mode, neither RSSI nor CCA
is valid. This means that these settings can not be used
in conjunction with STXONCCA, for instance. Also note
20
that the interferer rejection will drop at stronger input
signal levels compared to when using the regular
recommended settings.
INTERFERER REJECTION (dB)
0
-87 -78 -69 -60 -51
CARRIER LEVEL (dBm)
Important: The low-current RX mode is only valid from -40 to 85ºC !
5.10.1 Low-Current RX Mode Parameters
T
=25°C, VDD=3.0 V, fc=2440 MHz if nothing else stated. All parameters measured on Texas Instruments’ CC2520 EM 2.1 reference design with 50 Ω load.
A
PARAMETER CONDITIONS MIN TYP MAX UNIT
RX current Wait for sync 18.8 mA
Sensitivity [2] requires -85 dBm -90 dBm
Interferer Rejection
Wanted signal 3 dB above the sensitivity level, 802.15.4 modulated
interferer at 802.15.4 channels:
±5 MHz from wanted signal. [2] requires 0 dB 52 dB
±10 MHz from wanted signal. [2] requires 30 dB 54 dB
±20MHz or above. 55 dB
Table 1: Low-current RX mode. Use in addition to regular recommended settings.
Register Setting (hex) Comment
RXCTRL 33 Reduces sensitivity and current consumption
FSCTRL 12 Reduces current consumption and valid temperature range
AGCCTRL2 EB Reduces sensitivity and current consumption
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5.11 Optional Temperature Compensation of TX
Using the on-chip temperature sensor (or any other sensor), it is possible to adapt the settings to the actual
temperature. This will reduce the variation in output power over temperature, which in the range -40ºC to
125ºC can be significant.
For this purpose, a TX setting only suited for high-temperature operation has been found (F7125deg). This
setting should only be used above 70 degrees, but will significantly reduce the drop in output power at high
temperatures.
Table 2: F7125deg setting, only suited for high temperature operation (only changes from
recommended settings shown)
Register Setting (hex) Comment
TXCTRL 94 Increased output power at high temperatures.
FSCTRL 7B Increased output power at high temperatures.
Table 3: Suggested TXPOWER register settings for different temperatures
Temperature -40 -30 -20 -10 10 30 50 70 90 110 125 ºC
Recommended
Setting
Typical Output
Power
13 13 AB AB F2 F7 F7 F7125deg F7125deg F7125deg F7125deg -
3.6 3.3 4.3 4.1 4.2 4.3 3.5 3.6 2.7 1.9 1.1 dBm
TYPICAL OUTPUT POWER WITH AND WITHOUT
8.0
4.0
With compensation
0.0
OUTPUT POWER (dBm)
-4.0
-40 10 60 110
TEMPERATURE COMPENSATION
Without compensation
(+5dBm setting)
TEMPERATURE (ºC)
OUTPUT POWER (dBm)
MINIMUM OUTPUT POWER WITH AND WITHOUT
8.0
4.0
0.0
-4.0
-8.0
-12.0
-40 10 60 110
TEMPERATURE COMPENSATION
With
compensation
TEMPERATURE (ºC)
Without compensation
(+5dBm setting)
20
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5.11.1 Using the Temperature Sensor
The on-chip temperature sensor can be accessed via the GPIO0 and GPIO1 pins by following this procedure:
• Configure GPIO0 and GPIO1 as inputs by writing 0x80 to the GPIOCTRL0 and GPIOCTRL1 registers.
• Enable analog output functionality for these two pins by setting GPIOCTRL.GPIO_ACTRL=’1’.
• Select temperature sensor output by writing 0x01 to the ATEST register. This will make GPIO1 output
GND and GPIO0 will output a voltage proportional to the temperature.
• Use an ADC in the microcontroller to measure the output voltage on GPIO0 and then calculate the
temperature.
The output from the temperature sensor is shown in graph form in section 5.9, but as a basis for calculating
the temperature, the following numbers can be used:
Tc=-40 – 125°C, VDD=1.8 – 3.8 V
Parameter Min Typ Max Unit
Temp sensor voltage at 25°C 0.8 V
Temp. sens. output vs temperature 25 mV/10°C
Temp. sens. output vs supply voltage 6 mV/V
Temp. sens accuracy no calibration (at fixed voltage) +/-12 °C
Temp, sens. accuracy with 1-point calibration (at fixed voltage) +/-1 °C
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6 Crystal Specific Parameters
6.1 Crystal Requirements
PARAMETER CONDITIONS MIN TYP MAX UNIT
Crystal frequency 32 MHz
Crystal frequency accuracy
requirement
ESR 60 Ohm
C0 7 pF
CL 16 pF
6.2 On-chip Crystal Frequency Tuning
PARAMETER CONDITIONS MIN TYP MAX UNIT
Crystal tuning range (C
Crystal tuning step size
Crystal tuning drift In % of applied tuning
Start-up time
Crystal tuning step size
Crystal tuning range
Start-up time
Crystal tuning step size
Crystal tuning range
) Only adding capacitance is possible
tune
CRYSTAL TUNING USING CC2520 EM 2.1 REFERENCE DESIGN (NX3225DA, CL = 16 pF) :
CRYSTAL TUNING USING OTHER CRYSTALS, ALL NUMBERS ARE ESTIMATES :
Including initial tolerance, aging and
temperature dependency, as specified by [2].
Can be relaxed using on-chip crystal tuning
(see below).
- 40
40 ppm
7 pF
0.4 pF
+/-10 %
0.2 ms
NDK crystal NX3225DA, C
=16 pF
L
3 ppm
-45 ppm
0.2 ms
NDK crystal NX4025DA, C
=13 pF
L
8 ppm
-120 ppm
Start-up time
Crystal tuning step size
Crystal tuning range
NDK crystal NX5032SA, C
=10 pF
L
See section 22 for further details on using the crystal oscillator.
0.1 ms
10 ppm
-160 ppm
22
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7 Pinout
SO
SI
CSn
GPIO5
GPIO4
GPIO3
GPIO2
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SCLK
DCOUPL
VREG_EN
RESETn
AVDD_GUARD
RBIAS
AVDD4
28
27
26
25
24
23
22
21
NC
20
14
19
18
17
16
15
AVDD1
RF_N
NC
RF_P
AVDD2
NC
2
3
4
CC2520
5
6
7
8
9
10
11
12
13
AGND
DVDD
GPIO1
GPIO0
AVDD5
XOSC32M_Q2
XOSC32M_Q1
exposed die
attached pad
AVDD3
Figure 1: Pinout of CC2520 (top view)
Table 4: CC2520 Pinout
Signal Pin # Type Description
SPI
SCLK 28 I SPI interface: Serial Clock. Maximum 8 MHz
SO 1 O SPI interface: Serial Out
SI 2 I SPI interface: Serial In
CSn 3 I SPI interface: Chip Select, active low
General Purpose digital I/O
GPIO0 10 IO General purpose digital I/O
GPIO1 9 IO General purpose digital I/O
GPIO2 7 IO General purpose digital I/O
GPIO3 6 IO General purpose digital I/O
GPIO4 5 IO General purpose digital I/O
GPIO5 4 IO General purpose digital I/O
Misc
RESETn 25 I External reset pin, active low
VREG_EN 26 I When high, digital voltage regulator is active.
NC 15,
18, 21
Not Connected.
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Signal Pin # Type Description
RBIAS 23 Analog IO
RF_N 19 RF IO Negative RF input signal to LNA in receive mode
RF_P 17 RF IO Positive RF input signal to LNA in receive mode
XOSC32M_Q1 13 Analog IO Crystal oscillator pin 1
XOSC32M_Q2 12 Analog IO Crystal oscillator pin 2
AVDD 11,
AVDD_GUARD 24 Power
DCOUPL 27 Power
DVDD 8 Power
AGND Die
14,
16,
20, 22
pad
Power
(Analog)
(Analog)
(Digital)
O
(Digital)
Ground
(Analog)
Analog
External precision bias resistor for reference current. 56 kΩ, ±1%
Negative RF output signal from PA in transmit mode
Positive RF output signal from PA in transmit mode
Power/ground
1.8 V to 3.8 V analog power supply connections
Power supply connection for digital noise isolation and digital voltage regulator.
1.6 V to 2.0 V digital power supply output for decoupling.
Note: this pin can not be used to supply any external devices.
1.8 V to 3.8 V digital power supply for digital pads.
24
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8 Functional Introduction
8.1 Integrated 2.4 GHz IEEE 802.15.4 Compliant Radio
CC2520 features a Direct Conversion Transceiver operating in the 2.4 GHz band with excellent receiver
sensitivity and robustness to interferers. The CC2520 radio complies with the IEEE 802.15.4 PHY
specification. The radio has 250 kbps data rate, 2 Mchip/s chip rate, and is suitable for systems targeting
compliance with worldwide radio frequency regulations covered by ETSI EN 300 328 and EN 300 440 class
2 (Europe), FCC CFR47 Part 15 (US) and ARIB STD-T66 (Japan).
8.2 Comparison to CC2420
CC2520 represents significant improvement over the CC2420 features and performance. A comparison is
given in the table below.
Table 5: Comparison of CC2420 and CC2520
Feature CC2420 CC2520
Standard IEEE 802.15.4-2003 IEEE 802.15.4-2006
Maximum output power 0 dB +5 dB
Typical sensitivity -95 dBm -98 dBm
General clock output No Yes, configurable frequency 1-16MHz
User interface Command strobes and configuration
registers. All user control goes through the
SPI.
Register access Possible without crystal oscillator running. Only possible when crystal oscillator is
Digital inputs No Schmitt triggers Schmitt triggers on all digital inputs.
Digital outputs Fixed configuration Highly flexible and configurable
Start up Manual start of XOSC XOSC starts automatically after reset (by
Crystal frequency 16 MHz 32 MHz
Packet sniffing No hardware support Hardware support for non-intrusive sniffing
Maximum SPI clock speed 10 MHz 8 MHz
RAM size 364 byte 768 byte
Operating voltage 2.1 – 3.6 V 1.8 – 3.8 V
Maximum operating temperature 85°C 125°C
Security Limited flexibility Highly flexible security instructions. More
Package QLP-48, 7x7 mm QFN 28 (RHD), 5x5 mm
RF frequency range 2400-2483.5 MHz 2394-2507 MHz
Instruction set (which includes the command
strobes as a subset) and configuration
registers. Command strobes may be
triggered by GPIO pins, which gives
excellent timing control. Improved status
information.
running.
reset_n pin). Manual start of XOSC after
SRES instruction.
of both transmitted and received frames.
RAM available allows more flexible
processing.
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8.3 Block Diagram
SO
SI
CSn
GPIO5
GPIO4
GPIO3
GPIO2
SCLK
SPI
Instruction
decoder
Exception
controller
IO
Bus controller
DCOUPL
Vreg
Frame
filtering and
source
matching
AES
DPU
RAM
VREG_EN
RX MIX
AGC
ADC
AAF
RESETn
Clock/
reset
Demod
ADI
ADC
ADI
PS
FS
SynthesizerFSM
Modulator
DAC
TX MIX
RBIAS
BIAS
RF_core
DAC
LPF
GPIO1
GPIO0
XOSC
XOSC32M_Q2
Atest
LNA
REF
DIV
XOSC32M_Q1
PA
RF_N
RF_P
Figure 2: CC2520 block diagram
CC2520 is typically controlled by a microcontroller connected to the SPI and some GPIOs. The
microcontroller will send instructions to CC2520 and it is the responsibility of the instruction decoder to
execute the instructions or pass them on to other modules.
The execution of an instruction or external events (e.g. reception of a frame) may result in one or more
exceptions. The exceptions provide a very flexible mechanism for automating tasks. They can for instance
be used to trigger execution of other instructions or they can be routed out to GPIO pins and used as
interrupt signals to the microcontroller. The exception controller is responsible for handling of the
exceptions.
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The microcontroller will typically be connected to one or more of the GPIO pins. The function of each pin is
independently controlled by the IO module based on register settings. It is possible to observe a large
number of internal signals on the GPIO pins. The GPIO pins can also be configured as inputs and used to
trigger the execution of certain instructions. This would typically be used when the microcontroller needs to
precisely control the timing of an instruction.
The RAM module contains memory which is used for receive and transmit FIFOs (in fixed address ranges)
and temporary storage for other data. There are separate instructions for general memory access and FIFO
access.
The data processing unit (DPU) is responsible for execution of the more advanced instructions. The DPU
includes an AES core, which is used while executing the security instructions. Memory management
(copying, incrementing etc.) is also performed by the DPU.
The Clock/Reset module generates the internal clocks and reset signals.
The RF core contains several submodules that support and control the analog radio modules.
The FSM submodule controls the RF transceiver state, the transmitter and receiver FIFOs and most of the
dynamically controlled analog signals such as power up / down of analog modules. The FSM is used to
provide the correct sequencing of events (such as performing an FS calibration before enabling the
receiver). Also, it provides step by step processing of incoming frames from the demodulator: reading the
frame length, counting the number of bytes received, checks the FCS, and finally, optionally handles
automatic transmission of ACK frames after successful frame reception. It performs similar tasks in TX
including performing an optional CCA before transmission and automatically going to RX after the end of
transmission to receive an ACK frame. Finally, the FSM controls the transfer of data between
modulator/demodulator and the TXFIFO/RXFIFO in RAM.
The modulator transforms raw data into I/Q signals to the transmitter DAC. This is done in compliance with
the IEEE 802.15.4 standard.
The demodulator is responsible for retrieving the sent data from the received signal.
The amplitude information from the demodulator is used by the automatic gain control (AGC). The AGC
adjusts the gain of the analog LNA so that the signal level within the receiver is approximately constant..
The frame filtering and source matching supports the FSM in RF_core by performing all operations
needed in order to do frame filtering and source address matching, as defined by IEEE 802.15.4.
The xosc module interfaces the crystal which is connected to the XOSC32M_Q1 and XOSC32M_Q2 pins.
The xosc module generates a clock for the digital part and RF system, and implements the programmable
crystal frequency tuning.
The BIAS module generates voltage and current references. It relies on a high precision (1%) 56kΩ external
resistor which is shown in the application circuit in Figure 3.
The TX DACs convert the digital baseband signal to analog signals.
After LPF the signal is fed to the TXMIX module, which is an up-converting complex mixer.
The PA amplifies the RF signal up to a maximum of ~5dBm during TX.
The LNA amplifies the received RF signal. The gain is controlled by the digital AGC module so that optimum
sensitivity and interferer rejection is achieved.
The RXMIX module is a complex down-mixer that converts the RF signal to a baseband signal.
A passive anti-aliasing filter (AAF) low pass filters the signal after down mixing.
The low pass filtered I and Q signals and digitized by the ADC.
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The frequency synthesizer (FS) generates the carrier wave for the RF signal.
The voltage regulator (Vreg) provides a 1.8V supply voltage to the digital core. It contains a current limiter,
which is enabled for currents above ~32mA.
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9 Application Circuit
Very few external components are required for the operation of CC2520. A typical application circuit is
shown in Figure 4. Note that it does not show how the board layout should be done. The board layout will
greatly influence the RF performance of CC2520.
This section is meant as an introduction only. For further details, see the reference design, which includes
complete board layouts and bill of materials with manufacturer and part numbers. The reference design can
be downloaded from the CC2520 product folder [7].
Note that decoupling capacitors are not shown in the figure below. See the reference design for complete
bill of materials.
28
27
26
25
24
23
22
SCLK
DCOUPL
VREG_EN
RESETn
RBIAS
AVDD_GUARD
AVDD4
Digital interface
DVDD
GPIO1
GPIO0
AVDD5
XOSC32M_Q2
XOSC32M_Q1
8
9
10
11
12
AVDD3
13
14
Figure 3: Typical application circuit with transmission line balun for single-ended operation
See the antenna selection guide [12] for further details on other compact and low-cost alternatives.
9.1 Input / Output Matching
The RF input/output is high impedance and differential.
When using an unbalanced antenna such as a monopole, a balun should be used in order to optimize
performance. The balun can be implemented using low-cost discrete inductors and capacitors only or in
combination with transmission lines replacing the discrete inductors.
Figure 4 shows the balun implemented in a two-layer reference design. It consists of three transmission
lines (L1, L2 and L3) and the discrete components C191, C171, C192, C173 and C174. The circuit will
present the optimum RF termination to CC2520
with a 50Ω load on the antenna connection.
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29
CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
C191C171
CC2520
C172
C192
Figure 4: Actual board layout of the RF section of the reference design (rev 2.1).
SMA
connector
R201
PCB
antenna
C173 C174
9.2 Bias Resistor
The bias resistor R231 is used to set an accurate bias current. A high precision (±1%) 56kΩ resistor should
be used.
9.3 Crystal
An external 32MHz crystal with two loading capacitors (C121 and C131) is used for the crystal oscillator.
It is possible to feed a single-ended signal to the XOSC32M_Q1 pin and thus not use a crystal.
9.4 Digital Voltage Regulator
The on chip voltage regulator supplies 1.8 V to the digital part of CC2520. C271 is a decoupling capacitor for
the voltage regulator. Note that this should not be used to provide power to other IC’s.
9.5 Power Supply Decoupling and Filtering
Proper power supply decoupling must be used for optimum performance. This is shown as a lumped
capacitor C1 in Figure 4. The placement and size of the decoupling capacitors and the power supply filtering
are very important to achieve the best performance in an application. TI provides a compact reference
design that should be followed very closely.
9.6 Board Layout Guidelines
It is highly recommended to copy the board layout from the reference design [5].
• It is recommended to use star topology for the power supplies to CC2520.
• The power supply decoupling capacitor C1 is a lumped component. On the actual board layout
there should be separate decoupling capacitors as close to each of the power pins as possible.
• The balun is highly layout sensitive. The inductors in Figure 4 are actually transmission lines
embedded in the PCB and their values must be adapted according to the board layout. The values
of the capacitors C192, C172, C173 and C174 must also be adapted to the actual board layout.
• The GPIO pins can be configured to use internal pull-up resistors. They are not enabled after a
reset or in LPM2. Remember to take the default GPIO configuration into consideration when
connecting these signals, because there will be some time before the MCU is able to change the
configuration. In LPM2 GPIO5 (which is configured as an input) should be connected to either
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