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SWRS154B –OCTOBER 2013–REVISED OCTOBER 2014

CC1201 Low-Power, High-Performance RF Transceiver

1 Device Overview

1.1 Features

• RF Performance and Analog Features: • Digital Features: – High-Performance, Single-Chip Transceiver – WaveMatch: Advanced Digital Signal

• Excellent Receiver Sensitivity: – –120 dBm at 1.2 kbps – –109 dBm at 50 kbps

• Blocking Performance: 85 dB at 10 MHz

• Adjacent Channel Selectivity: Up to 62 dB at 50-kHz Offset

• Very Low Phase Noise: –114 dBc/Hz at 10-kHz Offset (169 MHz)

– Programmable Output Power Up to +16 dBm

With 0.4-dB Step Size – Automatic Output Power Ramping – Supported Modulation Formats:

2-FSK, 2-GFSK, 4-FSK, 4-GFSK, MSK, OOK – Supports Data Rate Up to 1.25 Mbps in

Transmit and Receive

• Low Current Consumption: – Enhanced Wake-On-Radio (eWOR)

Functionality for Automatic Low-Power Receive Polling

– Power Down: 0.12 μA (0.5 μA With eWOR

Timer Active)

• RX: 0.5 mA in RX Sniff Mode

• RX: 19 mA Peak Current in Low-Power Mode

• RX: 23 mA Peak Current in HighPerformance Mode

• TX: 46 mA at +14 dBm

• Other: – Data FIFOs: Separate 128-Byte RX and TX – Support for Seamless Integration With the

CC1190 Device for Increased Range Providing up to 3-dB Improvement in RX Sensitivity and up to +27 dBm TX Output Power

Processing for Improved Sync Detect

Performance – Autonomous Image Removal – Security: Hardware AES128 Accelerator – Data FIFOs: Separate 128-Byte RX and TX – Includes Functions for Antenna Diversity

Support – Support for Retransmission – Support for Auto-Acknowledge of Received

Packets – Automatic Clear Channel Assessment (CCA) for

Listen-Before-Talk (LBT) Systems – Built-in Coding Gain Support for Increased

Range and Robustness – Digital RSSI Measurement – Improved OOK Shaping for Less Occupied

Bandwidth, Enabling Higher Output Power While

Meeting Regulatory Requirements

• Dedicated Packet Handling for 802.15.4g: – CRC 16/32 – FEC, Dual Sync Detection (FEC and non-FEC

Packets)

– Whitening

• General: – RoHS-Compliant 5-mm × 5-mm No-Lead QFN

32-Pin Package (RHB)

– Pin-Compatible With the CC1120 Device

• Regulations – Suitable for Systems Targeting Compliance With:

– Europe: ETSI EN 300 220 – US: FCC CFR47 Part 15 – Japan: ARIB STD-T108

CC1201

1.2 Applications

• Low-Power, High-Performance, Wireless Systems • Home and Building Automation With Data Rate up to 1250 kbps

• ISM/SRD Bands: 169, 433, 868, 915, and 920 MHz

• Possible Support for Additional Frequency Bands: 137 to 158.3 MHz, 205 to 237.5 MHz, and 274 to

316.6 MHz

• Smart Metering (AMR/AMI)

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

• Wireless Alarm and Security Systems

• Industrial Monitoring and Control

• Wireless Healthcare Applications

• Wireless Sensor Networks and Active RFID

• IEEE 802.15.4g Applications

BIAS

RBIAS

XOSC_Q1

XOSC_Q2

XOSC

LNA

FREQ

SYNTH

ADC

DEMODULATOR

PACKET HANDLER

RXFIFO

MODULATOR

TXFIFO

RADIO CONTROL & POWER MANAGEMENT

LNA_P

LNA_N

EXT_XOSC

LFC1

CS_N

SO (GPIO0)

SCLK

GPIO2

GPIO1

GPIO3

DIGITAL INTERFACE TO MCU

LFC0

CC120x

MARC

Main Radio Control unit

Ultra low power 16 bit

MCU

256 byte

FIFO RAM

buffer

4 kbyte

ROM

RF and DSP frontend

Packet handler

and FIFO control

Configuration and

status registers

eWOR

Enhanced ultra low power

Wake On Radio timer

SPI

Serial configuration

and data interface

Interrupt and

IO handler

System bus

PAout

LNA_P

LNA_N

90 dB dynamic

range ADC

90 dB dynamic

range ADC

High linearity

LNA

+16 dBm high

efficiency PA

Channel

filter

XOSC

Cordic

AGC

Automatic Gain Control, 60dB VGA range

RSSI measurements and carrier sense detection

Highly flexible FSK / OOK

demodulator

(optional bit clock)

(optional low jitter serial data output for legacy protocols)

Data interface with

signal chain access

XOSC_Q1

XOSC_Q2

Ultra low power 40 kHz

auto-calibrated RC oscillator

(optional 40 kHz

clock input)

CSn (chip select)

SI (serial input)

SO (serial output)

SCLK (serial clock)

(optional GPIO3/2/0)

Modulator

Fully integrated fractional-N

frequency synthesizer

Output power ramping and OOK / ASK modulation

IF amp

(optional auto detected external XOSC / TCXO)

(optional GPIO for

antenna diversity)

Battery sensor /

temp sensor

Power on reset

AES-128

accelerator

CC1201

SWRS154B –OCTOBER 2013–REVISED OCTOBER 2014

1.3 Description

The CC1201 device is a fully integrated single-chip radio transceiver designed for high performance at very low-power and low-voltage operation in cost-effective wireless systems. All filters are integrated, thus removing the need for costly external SAW and IF filters. The device is mainly intended for the ISM (Industrial, Scientific, and Medical) and SRD (Short Range Device) frequency bands at 164–190 MHz, 410–475 MHz, and 820–950 MHz.

The CC1201 device provides extensive hardware support for packet handling, data buffering, burst transmissions, clear channel assessment, link quality indication, and Wake-On-Radio. The main operating parameters of the CC1201 device can be controlled through an SPI interface. In a typical system, the CC1201 device will be used with a microcontroller and only few external passive components.

The CC1201 offers the same performance as the CC1200 for channel filter bandwidths of 50 kHz or more, and therefore presents a lower cost option for applications that do not require narrowband support.

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PART NUMBER PACKAGE BODY SIZE

CC1201RHB VQFN (32) 5.00 mm x 5.00 mm

(1) For more information, see Section 8, Mechanical Packaging and Orderable Information

1.4 Functional Block Diagram

Figure 1-1 shows the system block diagram of the CC120x family of devices.

(1)

Device Information

Figure 1-1. System Block Diagram

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SWRS154B –OCTOBER 2013–REVISED OCTOBER 2014

1 Device Overview ......................................... 1 4.15 40-MHz Clock Input (TCXO)........................ 16

1.1 Features .............................................. 1 4.16 32-kHz Clock Input.................................. 17

1.2 Applications........................................... 1 4.17 40-kHz RC Oscillator................................ 17

1.3 Description............................................ 2 4.18 I/O and Reset ....................................... 17

1.4 Functional Block Diagram ............................ 2 4.19 Temperature Sensor ................................ 17

2 Revision History ......................................... 4 4.20 Typical Characteristics.............................. 18

3 Terminal Configuration and Functions.............. 5 5 Detailed Description ................................... 21

3.1 Pin Diagram .......................................... 5 5.1 Block Diagram....................................... 21

3.2 Pin Configuration ..................................... 6 5.2 Frequency Synthesizer.............................. 21

4 Specifications ............................................ 7 5.3 Receiver............................................. 22

4.1 Absolute Maximum Ratings .......................... 7 5.4 Transmitter .......................................... 22

4.2 Handling Ratings ..................................... 7 5.5 Radio Control and User Interface................... 22

4.3 Recommended Operating Conditions (General

Characteristics) ....................................... 7

4.4 Thermal Resistance Characteristics for RHB

Package .............................................. 7

4.5 RF Characteristics.................................... 8

4.6 Regulatory Standards ................................ 8

4.7 Current Consumption, Static Modes ................. 9

4.8 Current Consumption, Transmit Modes .............. 9

4.9 Current Consumption, Receive Modes.............. 10

4.10 Receive Parameters................................. 11

4.11 Transmit Parameters................................ 14

4.12 PLL Parameters..................................... 15

4.13 Wake-up and Timing................................ 16

4.14 40-MHz Crystal Oscillator........................... 16

5.6 Enhanced Wake-On-Radio (eWOR)................ 22

5.7 RX Sniff Mode....................................... 23

5.8 Antenna Diversity ................................... 23

5.9 WaveMatch.......................................... 24

6 Typical Application Circuit........................... 25

7 Device and Documentation Support ............... 26

7.1 Device Support...................................... 26

7.2 Documentation Support............................. 27

7.3 Community Resources.............................. 27

7.4 Trademarks.......................................... 27

7.5 Electrostatic Discharge Caution..................... 27

7.6 Glossary............................................. 27

8 Mechanical Packaging and Orderable

Information .............................................. 28

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2 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

This data manual revision history highlights the changes made to the SWRS154A device-specific data manual to make it an SWRS154B revision.

Changes from Revision A (June 2014) to Revision B Page

• Added Ambient to the temperature range condition and removed Tj from Temperature range ........................... 7

• Added data to TCXO table......................................................................................................... 16

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3 Terminal Configuration and Functions

3.1 Pin Diagram

Figure 3-1 shows pin names and locations for the CC1201 device.

CC1201

SWRS154B –OCTOBER 2013–REVISED OCTOBER 2014

Figure 3-1. Package 5-mm × 5-mm QFN

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3.2 Pin Configuration

The following table lists the pin-out configuration for the CC1201 device.

PIN NO. PIN NAME TYPE / DIRECTION DESCRIPTION

1 VDD_GUARD Power 2.0–3.6 V VDD 2 RESET_N Digital input Asynchronous, active-low digital reset 3 GPIO3 Digital I/O General-purpose I/O 4 GPIO2 Digital I/O General-purpose I/O 5 DVDD Power 2.0–3.6 VDD to internal digital regulator 6 DCPL Power Digital regulator output to external decoupling capacitor 7 SI Digital input Serial data in 8 SCLK Digital input Serial data clock 9 SO(GPIO1) Digital I/O Serial data out (general-purpose I/O) 10 GPIO0 Digital I/O General-purpose I/O 11 CSn Digital input Active-low chip select 12 DVDD Power 2.0–3.6 V VDD 13 AVDD_IF Power 2.0–3.6 V VDD 14 RBIAS Analog External high-precision resistor 15 AVDD_RF Power 2.0–3.6 V VDD 16 N.C. Not connected 17 PA Analog Single-ended TX output (requires DC path to VDD)

18 TRX_SW Analog 19 LNA_P Analog Differential RX input (requires DC path to ground)

20 LNA_N Analog Differential RX input (requires DC path to ground) 21 DCPL_VCO Power Pin for external decoupling of VCO supply regulator 22 AVDD_SYNTH1 Power 2.0–3.6 V VDD 23 LPF0 Analog External loopfilter components 24 LPF1 Analog External loopfilter components 25 AVDD_PFD_CHP Power 2.0–3.6 V VDD 26 DCPL_PFD_CHP Power Pin for external decoupling of PFD and CHP regulator 27 AVDD_SYNTH2 Power 2.0–3.6 V VDD 28 AVDD_XOSC Power 2.0–3.6 V VDD 29 DCPL_XOSC Power Pin for external decoupling of XOSC supply regulator

30 XOSC_Q1 Analog

31 XOSC_Q2 Analog

32 EXT_XOSC Digital input – GND Ground pad The ground pad must be connected to a solid ground plane.

TX and RX switch. Connected internally to GND in TX and floating (highimpedance) in RX.

Crystal oscillator pin 1 (must be grounded if a TCXO or other external clock connected to EXT_XOSC is used)

Crystal oscillator pin 2 (must be left floating if a TCXO or other external clock connected to EXT_XOSC is used)

Pin for external clock input (must be grounded if a regular crystal connected to XOSC_Q1 and XOSC_Q2 is used)

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4 Specifications

All measurements performed on CC1200EM_868_930 rev.1.0.0, CC1200EM_420_470 rev.1.0.1, or CC1200EM_169 rev.1.2.

CC1201

SWRS154B –OCTOBER 2013–REVISED OCTOBER 2014

4.1 Absolute Maximum Ratings

(1)(2)

over operating free-air temperature range (unless otherwise noted)

PARAMETER MIN MAX UNIT CONDITION

Supply voltage (VDD, AVDD_x) –0.3 3.9 V All supply pins must have the same voltage Input RF level +10 dBm Voltage on any digital pin –0.3 VDD+0.3 V max 3.9 V Voltage on any analog Pin

(including DCPL pins)

–0.3 2.0 V

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to VSS, unless otherwise noted.

4.2 Handling Ratings

MIN MAX UNIT

stg

ESD

Storage temperature range –40 125 °C Electrostatic Human body model (HBM), per ANSI/ESDA/JEDEC JS001

discharge (ESD) performance:

Charged device model (CDM), per JESD22-

(2)

C101

All pins –500 500 V

(1)

–2 2 kV

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V HBM allows safe manufacturing with a standard ESD control process.

4.3 Recommended Operating Conditions (General Characteristics)

PARAMETER MIN TYP MAX UNIT CONDITION

Voltage supply range 2.0 3.6 V All supply pins must have the same voltage Voltage on digital inputs 0 VDD V Temperature range –40 85 °C Ambient

4.4 Thermal Resistance Characteristics for RHB Package

(1)

Rθ Rθ Rθ Psi Psi Rθ

°C/W

JC JB JA

Junction-to-case (top) 21.1 0.00 Junction-to-board 5.3 0.00 Junction-to-free air 31.3 0.00 Junction-to-package top 0.2 0.00

Junction-to-board 5.3 0.00

Junction-to-case (bottom) 0.8 0.00

AIR FLOW (m/s)

(1) These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [RΘJC] value, which is based on a

JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see these EIA/JEDEC standards:

• JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air)

• JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages

• JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages

• JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements Power dissipation of 40 mW and an ambient temperature of 25ºC is assumed.

(2) m/s = meters per second

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(2)

CC1201

SWRS154B –OCTOBER 2013–REVISED OCTOBER 2014

4.5 RF Characteristics

PARAMETER MIN TYP MAX UNIT CONDITION

820 950 MHz 410 475 MHz

Frequency bands

Frequency resolution 15 Hz In 410–475 MHz band

Data rate

164 190 MHz (274) (316.6) MHz (205) (237.5) MHz (137) (158.3) MHz

30 Hz In 820–950 MHz band

6 Hz In 164–190 MHz band 0 1250 kbps Packet mode 0 625 kbps Transparent mode

Contact TI for more information about the use of these frequency bands.

4.6 Regulatory Standards

PERFORMANCE MODE

High-performance mode ETSI EN 300 220 receiver categories

Low-power mode

FREQUENCY BAND SUITABLE FOR COMPLIANCE COMMENTS

820–950 MHz 2 and 3

410–475 MHz allowed output power in the

164–190 MHz ETSI EN 300 220 allowed output power in the

820–950 MHz

410–475 MHz 164–190 MHz ETSI EN 300 220

ETSI EN 300 220 receiver categories

WITH

ARIB STD-T108

FCC PART 15.247 FCC PART 15.249

2 and 3

2 and 3 FCC PART 15.247 FCC PART 15.249

2 and 3

Performance also suitable for systems targeting maximum allowed output power in the respective bands, using a range extender such as the CC1190

Performance also suitable for systems targeting maximum

respective bands, using a range extender

Performance also suitable for systems targeting maximum

respective bands, using a range extender

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4.7 Current Consumption, Static Modes

TA= 25°C, VDD = 3.0 V (unless otherwise noted)

PARAMETER MIN TYP MAX UNIT CONDITION

Power down with retention

XOFF mode 180 µA Crystal oscillator / TCXO disabled IDLE mode 1.5 mA Clock running, system waiting with no radio activity

0.12 1 µA

0.5 µA Low-power RC oscillator running

4.8 Current Consumption, Transmit Modes

4.8.1 868-, 915-, and 920-MHz Bands (High-Performance Mode)

TA= 25°C, VDD = 3.0 V (unless otherwise noted)

PARAMETER MIN TYP MAX UNIT CONDITION

TX current consumption +14 dBm 46 mA TX current consumption +10 dBm 36 mA

4.8.2 433-MHz Band (High-Performance Mode)

TA= 25°C, VDD = 3.0 V (unless otherwise noted)

PARAMETER MIN TYP MAX UNIT CONDITION

TX current consumption +15 dBm 49 mA TX current consumption +14 dBm 46 mA TX current consumption +10 dBm 35 mA

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4.8.3 169-MHz Band (High Performance Mode)

TA= 25°C, VDD = 3.0 V (unless otherwise noted)

PARAMETER MIN TYP MAX UNIT CONDITION

TX current consumption +15 dBm 54 mA TX current consumption +14 dBm 50 mA TX current consumption +10 dBm 39 mA

4.8.4 Low-Power Mode

TA= 25°C, VDD = 3.0 V, fc= 869.5 MHz (unless otherwise noted)

PARAMETER MIN TYP MAX UNIT CONDITION

TX Current Consumption +10 dBm 33.6 mA

4.9 Current Consumption, Receive Modes

4.9.1 High-Performance Mode

TA= 25°C, VDD = 3.0 V, fc= 869.5 MHz (unless otherwise noted)

PARAMETER MIN TYP MAX UNIT CONDITION

RX wait for sync Using RX Sniff Mode, where the receiver wakes up

1.2 kbps, 4-byte preamble 0.5 mA

38.4 kbps, 12-byte preamble 3.5 mA 50 kbps, 24-byte preamble 2.1 mA

RX peak current

1.2 kbps 23.6 mA Average current consumption

Check for data packet every 1 second using 8 µA eWOR

(1) See the sniff mode design note for more information (SWRA428)

at regular intervals looking for an incoming packet. Sniff mode configured to terminate on carrier sense, and is measured using RSSI_VALID _COUNT = 1 (0 for 1.2 kbps), AGC_WIN_SIZE = 0, and SETTLE_WAIT = 1.

Peak current consumption during packet reception

50 kbps, 5-byte preamble, 40-kHz RC oscillator used as eWOR timer

(1)

4.9.2 Low-Power Mode

TA= 25°C, VDD = 3.0 V, fc= 869.5 MHz (unless otherwise noted)

PARAMETER MIN TYP MAX UNIT CONDITION

RX Peak current low-power RX mode 50 kbps 19 mA

Peak current consumption during packet reception at the sensitivity limit

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4.10 Receive Parameters

All RX measurements made at the antenna connector, to a bit error rate (BER) limit of 1%. Selectivity and blocking is measured with the desired signal 3 dB above the sensitivity level.

4.10.1 General Receive Parameters (High-Performance Mode)

TA= 25°C, VDD = 3.0 V, fc= 869.5 MHz (unless otherwise noted)

PARAMETER MIN TYP MAX UNIT CONDITION

Saturation +10 dBm Digital channel filter programmable

bandwidth IIP3 –14 dBm At maximum gain

Data rate offset tolerance

Spurious emissions 1–13 GHz (VCO leakage at 3.5 GHz) < –56 dBm 30 MHz to 1 GHz < –57 dBm Optimum source impedance 868-, 915-, and 920-MHz bands 60 + j60 / 30 + j30 Ω 433-MHz band 100 + j60 / 50 + j30 Ω 169-MHz band 140 + j40 / 70 + j20 Ω

50 1600 kHz

±14 % With carrier sense detection enabled

±1600 ppm With carrier sense detection disabled

Radiated emissions measured according to ETSI EN 300 220, fc= 869.5 MHz

(Differential or Single-Ended RX Configurations)

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4.10.2 RX Performance in 868-, 915-, and 920-MHz Bands (High-Performance Mode)

TA= 25°C, VDD = 3.0 V (unless otherwise noted)

PARAMETER MIN TYP MAX UNIT CONDITION

–119 dBm 1.2 kbps 2-FSK, DEV=20 kHz CHF=50 kHz –113 dBm 4.8 kbps OOK CHF=128 kHz

32.768 kbps 2-GFSK, DEV=50 kHz CHF=208

(1)

kHz

Sensitivity

–108 dBm –110 dBm 38.4 kbps 2-GFSK, DEV=20 kHz CHF=104 kHz

–109 dBm 50 kbps 2-GFSK, DEV=25 kHz, CHF=104 kHz

–97 dBm 500 kbps 2-GMSK, CHF=833 kHz –97 dBm 1 Mbps 4-GFSK, DEV=400 kHz, CHF=1.66 MHz

Blocking and selectivity

1.2-kbps 2-FSK, 50-kHz channel separation, 20-kHz deviation, 50-kHz channel filter

Blocking and selectivity

32.768-kbps 2-GFSK, 200-kHz channel separation, 50-kHz deviation, 208-kHz channel filter

Blocking and selectivity

38.4-kbps 2-GFSK, 100-kHz channel separation, 20-kHz deviation, 104-kHz channel filter

Blocking and selectivity 50-kbps 2-GFSK, 200-kHz channel separation, 25-kHz deviation, 104-kHz channel filter (Same modulation format as

802.15.4g Mandatory Mode)

50 dB ± 50 kHz (adjacent channel) 50 dB ± 100 kHz (alternate channel) 75 dB ± 2 MHz 80 dB ± 10 MHz 38 dB ± 200 kHz 46 dB ± 400 kHz 66 dB ± 2 MHz 70 dB ± 10 MHz 44 dB + 100 kHz (adjacent channel) 44 dB ± 200 kHz (alternate channel) 64 dB ± 2 MHz 72 dB ± 10 MHz 41 dB ± 200 kHz (adjacent channel) 46 dB ± 400 kHz (alternate channel) 65 dB ± 2 MHz 71 dB ± 10 MHz 45 dB ± 400 kHz (adjacent channel)

Blocking and selectivity 100-kbps 2-GFSK, 50-kHz deviation, 208-kHz channel filter

54 dB ± 800 kHz (alternate channel) 63 dB ± 2 MHz 68 dB ± 10 MHz

42 dB + 1 MHz (adjacent channel) Blocking and selectivity 500-kbps GMSK, 833-kHz channel filter

42 dB ± 2 MHz (alternate channel)

57 dB ± 10 MHz Blocking and selectivity

46 dB ± 2 MHz (adjacent channel) 1-Mbps 4-GFSK, 400-kHz deviation, 52 dB ± 4 MHz (alternate channel)

1.6-MHz channel filter

59 dB ± 10 MHz

(1) DEV is short for deviation, CHF is short for Channel Filter Bandwidth

(1)

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(1)

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+ 26 hidden pages

Texas Instruments CC1201 Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

1 Device Overview

1.1 Features

1.2 Applications

1.3 Description

1.4 Functional Block Diagram

Table of Contents

2 Revision History

3 Terminal Configuration and Functions

3.1 Pin Diagram

3.2 Pin Configuration

4 Specifications

4.1 Absolute Maximum Ratings

4.2 Handling Ratings

4.3 Recommended Operating Conditions (General Characteristics)

4.4 Thermal Resistance Characteristics for RHB Package

4.5 RF Characteristics

4.6 Regulatory Standards

4.7 Current Consumption, Static Modes

4.8 Current Consumption, Transmit Modes

4.8.1 868-, 915-, and 920-MHz Bands (High-Performance Mode)

4.8.2 433-MHz Band (High-Performance Mode)

4.8.3 169-MHz Band (High Performance Mode)

4.8.4 Low-Power Mode

4.9 Current Consumption, Receive Modes

4.9.1 High-Performance Mode

4.9.2 Low-Power Mode

4.10 Receive Parameters

4.10.1 General Receive Parameters (High-Performance Mode)

4.10.2 RX Performance in 868-, 915-, and 920-MHz Bands (High-Performance Mode)