Using the Fast Serial Interface (FSI) With Multiple
Devices in an Application
Aki Li and Kevin Allen
ABSTRACT
In industrial applications, it is often necessary for multiple devices to communicate with each other in a fast, low
latency, and synchronized manner. One example is in a decentralized / distributed control system architecture. A
new communication peripheral created for C2000™ Real-Time Control Microcontrollers (MCU), the Fast Serial
Interface (FSI) can expand its reliable high-speed communication features to multiple devices in a system. This
application report demonstrates how to implement a daisy-chain or star network topology using FSI. Test results
are provided to validate the high-speed communication capability of FSI with different configuration methods.
You can quickly verify and design FSI in different applications using the provided source code, which can be
downloaded from C2000WARE.
The target processors for the corresponding software include the TMS320F28002x, TMS320F28004x, and
TMS320F2838x. The implementation methods and software can be applied and ported to future C2000
processors that include FSI. Example code discussed in this document can be found in the latest C2000WARE
release, located within the following local directory after installation:
1 Introduction to the FSI Module..............................................................................................................................................3
3.2 Star Handshake Mechanism.............................................................................................................................................. 9
4 Sending and Receiving FSI Data Frames........................................................................................................................... 10
4.1 FSI Data Frame Configuration APIs.................................................................................................................................10
4.2 Start Transmitting Data Frames....................................................................................................................................... 10
5.1 Two Device FSI Communication......................................................................................................................................13
5.2 Three Device FSI Communication................................................................................................................................... 17
6 Star Topology Tests..............................................................................................................................................................20
Figure 1-1. FSITX and FSIRX CPU Interface.............................................................................................................................. 4
Using the Fast Serial Interface (FSI) With Multiple Devices in an Application1
Trademarks
Figure 3-2. Star Handshake Sequence....................................................................................................................................... 9
Figure 5-1. Software Flow Chart With Different Project Settings...............................................................................................12
Figure 5-2. Test Platform for Two Device Communication.........................................................................................................13
Figure 5-3. Data Transmission Test Using CPU Control............................................................................................................14
Figure 5-4. FSI Communication Using DMA Control................................................................................................................. 15
Figure 5-5. Test Platform for Three Devices Communication.................................................................................................... 17
Figure 5-6. FSI Communication With CPU Control Among Three Devices...............................................................................18
Figure 5-7. Time of Data Going Through One Device - CPU Control........................................................................................18
Figure 5-8. FSI Communication with DMA Control Among Three Devices............................................................................... 19
Figure 5-9. Time of Data Going Through One Device - DMA Control....................................................................................... 19
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List of Tables
Table 5-1. Example Projects Description - Daisy-Chain.............................................................................................................11
Table 5-2. Data Frame Structure............................................................................................................................................... 15
Table 5-3. Calculated Transmission Time for 8 Words.............................................................................................................. 15
Table 5-4. Comparison of Using CPU Control and DMA Control in FSI for Two Devices..........................................................16
Table 5-5. Comparison of Using CPU Control and DMA Control in FSI Among Three Devices................................................20
Table 6-1. Software Example Projects - Star Topology..............................................................................................................20
Trademarks
C2000™ and Code Composer Studio™ are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
2Using the Fast Serial Interface (FSI) With Multiple Devices in an ApplicationSPRACM3C – SEPTEMBER 2020 – REVISED OCTOBER 2020
The FSI module is a serial communication peripheral capable of reliable and robust high-speed communications,
up to 200 Mbps. Utilizing very few unidirectional signals, FSI provides a low cost way of communicating across
an isolation barrier when leveraging digital isolation devices. Thus, FSI enables new ways of distributing the
powerful sensing, processing, and actuation capabilities of C2000 MCUs in industrial applications, where realtime control with critical communication speed is required.
Generally, FSI can be implemented in two kinds of system conditions:
•Wired communications between MCUs that exist on the same voltage and ground planes.
•Wired communications across an isolation barrier, leveraging digital isolators (like ISO77xx), commonly used
for MCUs placed on the hot-side needing to communicate with MCUs on the cold-side, or between boards
with different voltage and ground planes.
There are a number of real-time systems that can benefit from the FSI peripheral. A multi-axis servo drive can be
constructed with C2000 device nodes controlling each axis. Having FSI serve as the communication link, control
loop information can be quickly transmitted and received between the devices to maintain precise motion control.
For an example of this system see the Distributed Multi-axis Servo Drive over Fast Serial Interface (FSI)
reference design.
Additionally, with increasing global power consumption, the need for higher efficiency power supplies, in
conjunction with the availability of wide bandgap GaN and SiC products, is driving the use of more sophisticated
power distribution architectures. Decentralized power control solutions using C2000 MCUs can be connected
and made flexible with FSI to meet these requirements. For a discussion on such power related systems see the
Distributed Power Control Architecture with Multiple MCUs Over FSI white paper.
The FSI peripheral offers a broad range of features, including programmable data length, hardware managed
CRC, ECC support, and more. A PING watchdog and Frame watchdog can enable automatic line-break
detection. The unique delay line control feature implemented within the FSI receive module can adjust for
channel-to-channel skew introduced by trace-length mismatch, transceivers, or digital isolation ICs, allowing FSI
to maintain high-speed and robust communication.
The FSI consists of the independent transmitter (FSITX) and receiver (FSIRX) cores, which are configured and
operated independently. Because of this, the FSI protocol does not have a notion of master and slave, unlike
some other synchronous communication protocols, and allows for simultaneous full speed communications in
both directions. Figure 1-1 shows the CPU interface of each FSI module. Each module owns up to three signal
lines: one clock and two data signals, where the second data lines, FSITXyD1 and FSIRXyD1, are optional, and
can be enabled for multi-lane transmission and double the speed for data bits. Thus, at least four signal lines are
needed to create 2-way point-to-point communication. Considering the timing spec for FSITX (see the devicespecific data sheets referenced in Section 7 ), the maximum data rate of 200 Mbps can be achieved with the
maximum clock of 50 MHz, using two data lines, since the data is transmitted on both edges of the clock signal.
For a full overview of FSI including all features and functions available, see the device-specific Technical
Reference Manual (TRM).
In terms of the trend in power electronic applications, the increasing demand for higher power levels makes
multiple power modules in parallel much more popular. Examples of such applications include industrial drives,
telecom rectifiers, server power supplies, on-board chargers, and so forth. Meanwhile, to achieve a complex
system with high performance, multiple MCUs are commonly used and must operate in a synchronized fashion.
Thus, critical data, including protection signals, sampling parameters, and even control loop data, needs to be
transferred with the fastest speed and least amount of latency among multiple devices/modules. FSI will be more
suitable to handle this when compared to the traditional Controller Area Network (CAN), Serial Peripheral
Interface (SPI) or Universal Asynchronous Receiver/Transmitter (UART).
There are a number of communication network topologies for connecting multiple devices, each with their own
benefits. A ring topology can be created by connecting multiple devices with FSI communication in a daisy-chain
fashion. The advantages of a ring topology are that each device only needs one FSI transmitter and receiver and
also the simplicity from a physical connection perspective. Figure 2-1 shows a daisy-chain connection system for
N (N≥2) node devices, where each device (index i) connects with the FSITX of device i-1 and FSIRX of device i
+1.
Figure 2-1. Daisy-Chain Connection Example
One disadvantage of the above daisy-chain topology is that if one device in the chain fails then the entire
communication link is broken. Another downside is that devices must forward data along to the next device in the
chain if the received data is intended for a subsequent device. This can add to the overall latency of when a data
packet is transmitted and when the respective device in the chain receives the data.
One communication topology that solves the broken link issue and can reduce the device-to-device latency is a
star topology, where several nodes connect directly to one central host device. Figure 2-2 shows a star topology
system with N (N≥2) node devices.
Using the Fast Serial Interface (FSI) With Multiple Devices in an Application5
FSI Applications
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Figure 2-2. Star Topology Example
The host device's FSI transmitter is connected to the FSI receiver of each node device in order for the host to
broadcast data packets to all nodes simultaneously. The node device transmitter's, on the other hand, are
connected to independent receivers of the host device enabling them to send data directly back to the host at
any time. This star implementation comes with a resource cost as the host needs N number of independent FSI
receiver modules. The F2838x family of C2000 devices fit into the host socket with having two FSI transmitters
and eight FSI receivers.
6Using the Fast Serial Interface (FSI) With Multiple Devices in an ApplicationSPRACM3C – SEPTEMBER 2020 – REVISED OCTOBER 2020
A handshake mechanism can be implemented in order to configure the devices and validate the link in an FSI
communication topology. The different handshake sequences are discussed in the following sections.
3.1 Daisy-Chain Handshake Mechanism
Once the FSITX and FSIRX modules of each device have been configured, the handshake mechanism should
be implemented to prepare each device in the chain before actual data transmission, since devices may power
up in an arbitrary order in a real scenario.
In order to simplify the data flow, one device is assigned as the lead, working as the driver of the handshake
sequence, and the other N-1 devices, within the daisy-chain loop, are assigned as nodes. Following the example
in Figure 2-1, Device 1 will be the lead device. It should be noted that the other N-1 node devices will share the
same handshake configuration.
The handshake process can be described as follows:
1. For all devices, configure the Frame Type of FSITX as Ping Frame, and enable the receiver interrupts for
Ping Frame Received event on the FSI INT1 vector to detect the incoming transmission.
2. Begin the ping loop 0:
a. The lead device sends the flush sequence to the second device followed by a ping frame with Tag0(0000);
wait for some time. If the lead device receives a valid ping frame tag Tag0, continue to the second loop;
otherwise iterate the ping loop 0 again.
b. The node devices enter a wait loop for a receiver interrupt. If a valid ping frame tag of Tag0 is received
from the previous device, continue to the loop 1; otherwise iterate the ping loop 0 again.
3. Begin the ping loop 1:
a. The lead device sends a ping frame with Tag1(0001); wait for some time. If the lead device receives a
valid ping frame Tag1 the handshake sequence is complete and the application can continue; otherwise
iterate the ping loop 1 again.
b. The node devices send the flush sequence followed by a ping frame Tag0 and wait for a receiver interrupt.
If a valid ping frame Tag1 is received send a ping frame Tag1 to signal the completion of the handshake
sequence; or else iterate the ping loop 1 again.